blob: 9c0f1479f33a3db6c4f8a00732fecb77319aee79 [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Neil Armstrongaf76e802016-09-09 12:23:11 +02002/*
3 * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
4 * Copyright (c) 2003 ARM Limited
5 * All Rights Reserved
Neil Armstrongaf76e802016-09-09 12:23:11 +02006 */
7#include <linux/linkage.h>
8#include <linux/init.h>
9
10 __INIT
11
12/*
13 * OX820 specific entry point for secondary CPUs.
14 */
15ENTRY(ox820_secondary_startup)
16 mov r4, #0
17 /* invalidate both caches and branch target cache */
18 mcr p15, 0, r4, c7, c7, 0
19 /*
20 * we've been released from the holding pen: secondary_stack
21 * should now contain the SVC stack for this core
22 */
23 b secondary_startup