| Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Platform data for Arizona devices |
| 4 | * |
| 5 | * Copyright 2012 Wolfson Microelectronics. PLC. |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef _ARIZONA_PDATA_H |
| 9 | #define _ARIZONA_PDATA_H |
| 10 | |
| Charles Keepax | 4901033 | 2015-02-25 15:37:13 +0000 | [diff] [blame] | 11 | #include <dt-bindings/mfd/arizona.h> |
| Richard Fitzgerald | aaa84e6 | 2017-04-18 11:43:52 +0100 | [diff] [blame] | 12 | #include <linux/regulator/arizona-ldo1.h> |
| Richard Fitzgerald | 22161f3 | 2017-04-18 11:43:49 +0100 | [diff] [blame] | 13 | #include <linux/regulator/arizona-micsupp.h> |
| Charles Keepax | 4901033 | 2015-02-25 15:37:13 +0000 | [diff] [blame] | 14 | |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 15 | #define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */ |
| 16 | #define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */ |
| 17 | #define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */ |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 18 | #define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */ |
| 19 | #define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */ |
| 20 | #define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */ |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 21 | #define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */ |
| 22 | #define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */ |
| 23 | #define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */ |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 24 | #define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */ |
| 25 | #define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */ |
| 26 | #define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */ |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 27 | #define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */ |
| 28 | #define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */ |
| 29 | #define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */ |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 30 | #define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */ |
| 31 | #define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */ |
| 32 | #define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */ |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 33 | #define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */ |
| 34 | #define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */ |
| 35 | #define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */ |
| 36 | #define ARIZONA_GPN_FN_MASK 0x007F /* GPN_FN - [6:0] */ |
| 37 | #define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */ |
| 38 | #define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */ |
| 39 | |
| 40 | #define ARIZONA_MAX_GPIO 5 |
| 41 | |
| Mark Brown | e102bef | 2012-07-10 12:37:58 +0100 | [diff] [blame] | 42 | #define ARIZONA_MAX_INPUT 4 |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 43 | |
| Mark Brown | 3d91f82 | 2013-01-29 00:47:37 +0800 | [diff] [blame] | 44 | #define ARIZONA_MAX_MICBIAS 3 |
| 45 | |
| Mark Brown | e102bef | 2012-07-10 12:37:58 +0100 | [diff] [blame] | 46 | #define ARIZONA_MAX_OUTPUT 6 |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 47 | |
| Mark Brown | c94aa30 | 2013-01-17 16:35:14 +0900 | [diff] [blame] | 48 | #define ARIZONA_MAX_AIF 3 |
| 49 | |
| Mark Brown | 9dd555e | 2012-11-26 21:17:21 +0000 | [diff] [blame] | 50 | #define ARIZONA_HAP_ACT_ERM 0 |
| 51 | #define ARIZONA_HAP_ACT_LRA 2 |
| 52 | |
| Mark Brown | 2a51da0 | 2012-07-09 19:33:14 +0100 | [diff] [blame] | 53 | #define ARIZONA_MAX_PDM_SPK 2 |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 54 | |
| 55 | struct regulator_init_data; |
| Charles Keepax | c186046 | 2018-03-12 15:52:00 +0000 | [diff] [blame] | 56 | struct gpio_desc; |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 57 | |
| Mark Brown | 3d91f82 | 2013-01-29 00:47:37 +0800 | [diff] [blame] | 58 | struct arizona_micbias { |
| 59 | int mV; /** Regulated voltage */ |
| 60 | unsigned int ext_cap:1; /** External capacitor fitted */ |
| 61 | unsigned int discharge:1; /** Actively discharge */ |
| Charles Keepax | f773fc6 | 2013-05-21 14:56:58 +0100 | [diff] [blame] | 62 | unsigned int soft_start:1; /** Disable aggressive startup ramp rate */ |
| Mark Brown | 544c7aa | 2013-01-29 18:44:41 +0800 | [diff] [blame] | 63 | unsigned int bypass:1; /** Use bypass mode */ |
| Mark Brown | 3d91f82 | 2013-01-29 00:47:37 +0800 | [diff] [blame] | 64 | }; |
| 65 | |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 66 | struct arizona_micd_config { |
| 67 | unsigned int src; |
| 68 | unsigned int bias; |
| 69 | bool gpio; |
| 70 | }; |
| 71 | |
| Mark Brown | 6fed4d8 | 2013-04-01 22:03:06 +0100 | [diff] [blame] | 72 | struct arizona_micd_range { |
| 73 | int max; /** Ohms */ |
| 74 | int key; /** Key to report to input layer */ |
| 75 | }; |
| 76 | |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 77 | struct arizona_pdata { |
| Charles Keepax | c186046 | 2018-03-12 15:52:00 +0000 | [diff] [blame] | 78 | struct gpio_desc *reset; /** GPIO controlling /RESET, if any */ |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 79 | |
| 80 | /** Regulator configuration for MICVDD */ |
| Richard Fitzgerald | 22161f3 | 2017-04-18 11:43:49 +0100 | [diff] [blame] | 81 | struct arizona_micsupp_pdata micvdd; |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 82 | |
| 83 | /** Regulator configuration for LDO1 */ |
| Richard Fitzgerald | aaa84e6 | 2017-04-18 11:43:52 +0100 | [diff] [blame] | 84 | struct arizona_ldo1_pdata ldo1; |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 85 | |
| 86 | /** If a direct 32kHz clock is provided on an MCLK specify it here */ |
| 87 | int clk32k_src; |
| 88 | |
| Mark Brown | f8a0941 | 2013-03-22 12:59:33 +0100 | [diff] [blame] | 89 | /** Mode for primary IRQ (defaults to active low) */ |
| 90 | unsigned int irq_flags; |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 91 | |
| 92 | /* Base GPIO */ |
| 93 | int gpio_base; |
| 94 | |
| 95 | /** Pin state for GPIO pins */ |
| Charles Keepax | 6e00ff0 | 2015-03-29 12:45:42 +0100 | [diff] [blame] | 96 | unsigned int gpio_defaults[ARIZONA_MAX_GPIO]; |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 97 | |
| Mark Brown | c94aa30 | 2013-01-17 16:35:14 +0900 | [diff] [blame] | 98 | /** |
| 99 | * Maximum number of channels clocks will be generated for, |
| 100 | * useful for systems where and I2S bus with multiple data |
| 101 | * lines is mastered. |
| 102 | */ |
| Charles Keepax | 00b6e9f | 2015-06-19 11:24:27 +0100 | [diff] [blame] | 103 | unsigned int max_channels_clocked[ARIZONA_MAX_AIF]; |
| Mark Brown | c94aa30 | 2013-01-17 16:35:14 +0900 | [diff] [blame] | 104 | |
| Mark Brown | 92a4987 | 2013-01-11 08:55:39 +0900 | [diff] [blame] | 105 | /** GPIO5 is used for jack detection */ |
| 106 | bool jd_gpio5; |
| 107 | |
| Mark Brown | e56a0a5 | 2013-04-01 19:03:52 +0100 | [diff] [blame] | 108 | /** Internal pull on GPIO5 is disabled when used for jack detection */ |
| 109 | bool jd_gpio5_nopull; |
| 110 | |
| Richard Fitzgerald | a288d64 | 2014-05-23 12:54:57 +0100 | [diff] [blame] | 111 | /** set to true if jackdet contact opens on insert */ |
| 112 | bool jd_invert; |
| 113 | |
| Mark Brown | dd235ee | 2013-01-11 08:55:51 +0900 | [diff] [blame] | 114 | /** Use the headphone detect circuit to identify the accessory */ |
| 115 | bool hpdet_acc_id; |
| 116 | |
| Mark Brown | 9c2ba27 | 2013-02-25 23:42:31 +0000 | [diff] [blame] | 117 | /** Check for line output with HPDET method */ |
| 118 | bool hpdet_acc_id_line; |
| 119 | |
| Mark Brown | 1eda6aa | 2013-01-11 08:55:54 +0900 | [diff] [blame] | 120 | /** GPIO used for mic isolation with HPDET */ |
| 121 | int hpdet_id_gpio; |
| 122 | |
| Inha Song | 9e86b2a | 2015-05-04 13:42:13 +0900 | [diff] [blame] | 123 | /** Channel to use for headphone detection */ |
| 124 | unsigned int hpdet_channel; |
| 125 | |
| Charles Keepax | e76e397 | 2015-09-16 10:42:13 +0100 | [diff] [blame] | 126 | /** Use software comparison to determine mic presence */ |
| 127 | bool micd_software_compare; |
| 128 | |
| Mark Brown | cd59e79 | 2013-04-01 19:21:48 +0100 | [diff] [blame] | 129 | /** Extra debounce timeout used during initial mic detection (ms) */ |
| Charles Keepax | 00b6e9f | 2015-06-19 11:24:27 +0100 | [diff] [blame] | 130 | unsigned int micd_detect_debounce; |
| Mark Brown | cd59e79 | 2013-04-01 19:21:48 +0100 | [diff] [blame] | 131 | |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 132 | /** GPIO for mic detection polarity */ |
| 133 | int micd_pol_gpio; |
| 134 | |
| Mark Brown | b17e546 | 2013-01-11 08:55:24 +0900 | [diff] [blame] | 135 | /** Mic detect ramp rate */ |
| Charles Keepax | 00b6e9f | 2015-06-19 11:24:27 +0100 | [diff] [blame] | 136 | unsigned int micd_bias_start_time; |
| Mark Brown | b17e546 | 2013-01-11 08:55:24 +0900 | [diff] [blame] | 137 | |
| Mark Brown | 2e033db | 2013-01-21 17:36:33 +0900 | [diff] [blame] | 138 | /** Mic detect sample rate */ |
| Charles Keepax | 00b6e9f | 2015-06-19 11:24:27 +0100 | [diff] [blame] | 139 | unsigned int micd_rate; |
| Mark Brown | 2e033db | 2013-01-21 17:36:33 +0900 | [diff] [blame] | 140 | |
| 141 | /** Mic detect debounce level */ |
| Charles Keepax | 00b6e9f | 2015-06-19 11:24:27 +0100 | [diff] [blame] | 142 | unsigned int micd_dbtime; |
| Mark Brown | 2e033db | 2013-01-21 17:36:33 +0900 | [diff] [blame] | 143 | |
| Mark Brown | 7abd4e2 | 2013-04-01 19:25:55 +0100 | [diff] [blame] | 144 | /** Mic detect timeout (ms) */ |
| Charles Keepax | 00b6e9f | 2015-06-19 11:24:27 +0100 | [diff] [blame] | 145 | unsigned int micd_timeout; |
| Mark Brown | 7abd4e2 | 2013-04-01 19:25:55 +0100 | [diff] [blame] | 146 | |
| Mark Brown | bbbd46e | 2013-01-10 19:38:43 +0000 | [diff] [blame] | 147 | /** Force MICBIAS on for mic detect */ |
| 148 | bool micd_force_micbias; |
| 149 | |
| Mark Brown | 6fed4d8 | 2013-04-01 22:03:06 +0100 | [diff] [blame] | 150 | /** Mic detect level parameters */ |
| 151 | const struct arizona_micd_range *micd_ranges; |
| 152 | int num_micd_ranges; |
| 153 | |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 154 | /** Headset polarity configurations */ |
| 155 | struct arizona_micd_config *micd_configs; |
| 156 | int num_micd_configs; |
| 157 | |
| 158 | /** Reference voltage for DMIC inputs */ |
| 159 | int dmic_ref[ARIZONA_MAX_INPUT]; |
| 160 | |
| Mark Brown | 3d91f82 | 2013-01-29 00:47:37 +0800 | [diff] [blame] | 161 | /** MICBIAS configurations */ |
| 162 | struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS]; |
| 163 | |
| Richard Fitzgerald | fc027d1 | 2015-05-01 16:15:12 +0100 | [diff] [blame] | 164 | /** |
| 165 | * Mode of input structures |
| 166 | * One of the ARIZONA_INMODE_xxx values |
| Richard Fitzgerald | 6887b04 | 2015-07-03 16:16:35 +0100 | [diff] [blame] | 167 | * wm5102/wm5110/wm8280/wm8997: [0]=IN1 [1]=IN2 [2]=IN3 [3]=IN4 |
| 168 | * wm8998: [0]=IN1A [1]=IN2A [2]=IN1B [3]=IN2B |
| Richard Fitzgerald | fc027d1 | 2015-05-01 16:15:12 +0100 | [diff] [blame] | 169 | */ |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 170 | int inmode[ARIZONA_MAX_INPUT]; |
| 171 | |
| 172 | /** Mode for outputs */ |
| Charles Keepax | f199d39 | 2015-12-14 10:19:11 +0000 | [diff] [blame] | 173 | int out_mono[ARIZONA_MAX_OUTPUT]; |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 174 | |
| Charles Keepax | 85e7dd3 | 2017-09-04 16:41:53 +0100 | [diff] [blame] | 175 | /** Limit output volumes */ |
| 176 | unsigned int out_vol_limit[2 * ARIZONA_MAX_OUTPUT]; |
| 177 | |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 178 | /** PDM speaker mute setting */ |
| 179 | unsigned int spk_mute[ARIZONA_MAX_PDM_SPK]; |
| 180 | |
| 181 | /** PDM speaker format */ |
| 182 | unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK]; |
| Mark Brown | 9dd555e | 2012-11-26 21:17:21 +0000 | [diff] [blame] | 183 | |
| 184 | /** Haptic actuator type */ |
| 185 | unsigned int hap_act; |
| Mark Brown | 3092f80 | 2013-03-24 23:05:58 +0000 | [diff] [blame] | 186 | |
| 187 | /** GPIO for primary IRQ (used for edge triggered emulation) */ |
| 188 | int irq_gpio; |
| Charles Keepax | 1ce3768 | 2015-09-16 10:42:14 +0100 | [diff] [blame] | 189 | |
| 190 | /** General purpose switch control */ |
| 191 | unsigned int gpsw; |
| Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 192 | }; |
| 193 | |
| 194 | #endif |