blob: 093fd473366c434a3f851f6fab8717e9d4651b64 [file] [log] [blame]
Dan Williams6f231dd2011-07-02 22:56:22 -07001/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
Dan Williams4b339812011-05-06 17:36:38 -070055#ifndef _ISCI_PHY_H_
Dan Williams6f231dd2011-07-02 22:56:22 -070056#define _ISCI_PHY_H_
57
Dave Jiangf2f30082011-05-04 15:02:02 -070058#include <scsi/sas.h>
Dan Williams6f231dd2011-07-02 22:56:22 -070059#include <scsi/libsas.h>
Dan Williamsd35bc1b2011-05-10 02:28:45 -070060#include "state_machine.h"
61
62/* This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
63 * before restarting the starting state machine. Technically, the old parallel
64 * ATA specification required up to 30 seconds for a device to issue its
65 * signature FIS as a result of a soft reset. Now we see that devices respond
66 * generally within 15 seconds, but we'll use 25 for now.
67 */
68#define SCIC_SDS_SIGNATURE_FIS_TIMEOUT 25000
69
70/* This is the timeout for the SATA OOB/SN because the hardware does not
71 * recognize a hot plug after OOB signal but before the SN signals. We need to
72 * make sure after a hotplug timeout if we have not received the speed event
73 * notification from the hardware that we restart the hardware OOB state
74 * machine.
75 */
76#define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT 250
77
78enum scic_sds_phy_protocol {
79 SCIC_SDS_PHY_PROTOCOL_UNKNOWN,
80 SCIC_SDS_PHY_PROTOCOL_SAS,
81 SCIC_SDS_PHY_PROTOCOL_SATA,
82 SCIC_SDS_MAX_PHY_PROTOCOLS
83};
84
85/**
86 * struct scic_sds_phy - This structure contains or references all of the data
87 * necessary to represent the core phy object and SCU harware protocol
88 * engine.
89 *
90 *
91 */
92struct scic_sds_phy {
93 /**
94 * This field contains the information for the base phy state machine.
95 */
96 struct sci_base_state_machine state_machine;
97
98 /**
99 * This field specifies the port object that owns/contains this phy.
100 */
101 struct scic_sds_port *owning_port;
102
103 /**
104 * This field indicates whether the phy supports 1.5 Gb/s, 3.0 Gb/s,
105 * or 6.0 Gb/s operation.
106 */
107 enum sas_linkrate max_negotiated_speed;
108
109 /**
110 * This member specifies the protocol being utilized on this phy. This
111 * field contains a legitamite value once the PHY has link trained with
112 * a remote phy.
113 */
114 enum scic_sds_phy_protocol protocol;
115
116 /**
117 * This field specifies the index with which this phy is associated (0-3).
118 */
119 u8 phy_index;
120
121 /**
122 * This member indicates if this particular PHY has received a BCN while
123 * it had no port assignement. This BCN will be reported once the phy is
124 * assigned to a port.
125 */
126 bool bcn_received_while_port_unassigned;
127
128 /**
129 * This field indicates if this PHY is currently in the process of
130 * link training (i.e. it has started OOB, but has yet to perform
131 * IAF exchange/Signature FIS reception).
132 */
133 bool is_in_link_training;
134
135 /**
136 * This field contains a reference to the timer utilized in detecting
137 * when a signature FIS timeout has occurred. The signature FIS is the
138 * first FIS sent by an attached SATA device after OOB/SN.
139 */
140 void *sata_timeout_timer;
141
142 const struct scic_sds_phy_state_handler *state_handlers;
143
144 struct sci_base_state_machine starting_substate_machine;
145
146 /**
147 * This field is the pointer to the transport layer register for the SCU
148 * hardware.
149 */
150 struct scu_transport_layer_registers __iomem *transport_layer_registers;
151
152 /**
153 * This field points to the link layer register set within the SCU.
154 */
155 struct scu_link_layer_registers __iomem *link_layer_registers;
156
157};
158
Dan Williams6f231dd2011-07-02 22:56:22 -0700159
160struct isci_phy {
Dan Williams4b339812011-05-06 17:36:38 -0700161 struct scic_sds_phy sci;
Dan Williams6f231dd2011-07-02 22:56:22 -0700162 struct asd_sas_phy sas_phy;
Dan Williams6f231dd2011-07-02 22:56:22 -0700163 struct isci_port *isci_port;
164 u8 sas_addr[SAS_ADDR_SIZE];
165
166 union {
Dave Jiang4b7ebd02011-05-04 15:37:52 -0700167 struct sas_identify_frame iaf;
Dave Jiangf2f30082011-05-04 15:02:02 -0700168 struct dev_to_host_fis fis;
Dan Williams6f231dd2011-07-02 22:56:22 -0700169 } frame_rcvd;
170};
171
Dan Williams4b339812011-05-06 17:36:38 -0700172static inline struct isci_phy *to_isci_phy(struct asd_sas_phy *sas_phy)
173{
174 struct isci_phy *iphy = container_of(sas_phy, typeof(*iphy), sas_phy);
Dan Williams6f231dd2011-07-02 22:56:22 -0700175
Dan Williams4b339812011-05-06 17:36:38 -0700176 return iphy;
177}
Dan Williams6f231dd2011-07-02 22:56:22 -0700178
Dan Williams4b339812011-05-06 17:36:38 -0700179static inline struct isci_phy *sci_phy_to_iphy(struct scic_sds_phy *sci_phy)
180{
181 struct isci_phy *iphy = container_of(sci_phy, typeof(*iphy), sci);
182
183 return iphy;
184}
185
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700186struct scic_phy_cap {
187 union {
188 struct {
189 /*
190 * The SAS specification indicates the start bit shall
191 * always be set to
192 * 1. This implementation will have the start bit set
193 * to 0 if the PHY CAPABILITIES were either not
194 * received or speed negotiation failed.
195 */
196 u8 start:1;
197 u8 tx_ssc_type:1;
198 u8 res1:2;
199 u8 req_logical_linkrate:4;
200
201 u32 gen1_no_ssc:1;
202 u32 gen1_ssc:1;
203 u32 gen2_no_ssc:1;
204 u32 gen2_ssc:1;
205 u32 gen3_no_ssc:1;
206 u32 gen3_ssc:1;
207 u32 res2:17;
208 u32 parity:1;
209 };
210 u32 all;
211 };
212} __packed;
213
214/* this data structure reflects the link layer transmit identification reg */
215struct scic_phy_proto {
216 union {
217 struct {
218 u16 _r_a:1;
219 u16 smp_iport:1;
220 u16 stp_iport:1;
221 u16 ssp_iport:1;
222 u16 _r_b:4;
223 u16 _r_c:1;
224 u16 smp_tport:1;
225 u16 stp_tport:1;
226 u16 ssp_tport:1;
227 u16 _r_d:4;
228 };
229 u16 all;
230 };
231} __packed;
232
233
234/**
235 * struct scic_phy_properties - This structure defines the properties common to
236 * all phys that can be retrieved.
237 *
238 *
239 */
240struct scic_phy_properties {
241 /**
242 * This field specifies the port that currently contains the
243 * supplied phy. This field may be set to NULL
244 * if the phy is not currently contained in a port.
245 */
246 struct scic_sds_port *owning_port;
247
248 /**
249 * This field specifies the link rate at which the phy is
250 * currently operating.
251 */
252 enum sas_linkrate negotiated_link_rate;
253
254 /**
255 * This field specifies the index of the phy in relation to other
256 * phys within the controller. This index is zero relative.
257 */
258 u8 index;
259};
260
261/**
262 * struct scic_sas_phy_properties - This structure defines the properties,
263 * specific to a SAS phy, that can be retrieved.
264 *
265 *
266 */
267struct scic_sas_phy_properties {
268 /**
269 * This field delineates the Identify Address Frame received
270 * from the remote end point.
271 */
272 struct sas_identify_frame rcvd_iaf;
273
274 /**
275 * This field delineates the Phy capabilities structure received
276 * from the remote end point.
277 */
278 struct scic_phy_cap rcvd_cap;
279
280};
281
282/**
283 * struct scic_sata_phy_properties - This structure defines the properties,
284 * specific to a SATA phy, that can be retrieved.
285 *
286 *
287 */
288struct scic_sata_phy_properties {
289 /**
290 * This field delineates the signature FIS received from the
291 * attached target.
292 */
293 struct dev_to_host_fis signature_fis;
294
295 /**
296 * This field specifies to the user if a port selector is connected
297 * on the specified phy.
298 */
299 bool is_port_selector_present;
300
301};
302
303/**
304 * enum scic_phy_counter_id - This enumeration depicts the various pieces of
305 * optional information that can be retrieved for a specific phy.
306 *
307 *
308 */
309enum scic_phy_counter_id {
310 /**
311 * This PHY information field tracks the number of frames received.
312 */
313 SCIC_PHY_COUNTER_RECEIVED_FRAME,
314
315 /**
316 * This PHY information field tracks the number of frames transmitted.
317 */
318 SCIC_PHY_COUNTER_TRANSMITTED_FRAME,
319
320 /**
321 * This PHY information field tracks the number of DWORDs received.
322 */
323 SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD,
324
325 /**
326 * This PHY information field tracks the number of DWORDs transmitted.
327 */
328 SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD,
329
330 /**
331 * This PHY information field tracks the number of times DWORD
332 * synchronization was lost.
333 */
334 SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR,
335
336 /**
337 * This PHY information field tracks the number of received DWORDs with
338 * running disparity errors.
339 */
340 SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR,
341
342 /**
343 * This PHY information field tracks the number of received frames with a
344 * CRC error (not including short or truncated frames).
345 */
346 SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR,
347
348 /**
349 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
350 * primitives received.
351 */
352 SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT,
353
354 /**
355 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
356 * primitives transmitted.
357 */
358 SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT,
359
360 /**
361 * This PHY information field tracks the number of times the inactivity
362 * timer for connections on the phy has been utilized.
363 */
364 SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED,
365
366 /**
367 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
368 * primitives received.
369 */
370 SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT,
371
372 /**
373 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
374 * primitives transmitted.
375 */
376 SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT,
377
378 /**
379 * This PHY information field tracks the number of CREDIT BLOCKED
380 * primitives received.
381 * @note Depending on remote device implementation, credit blocks
382 * may occur regularly.
383 */
384 SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED,
385
386 /**
387 * This PHY information field contains the number of short frames
388 * received. A short frame is simply a frame smaller then what is
389 * allowed by either the SAS or SATA specification.
390 */
391 SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME,
392
393 /**
394 * This PHY information field contains the number of frames received after
395 * credit has been exhausted.
396 */
397 SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT,
398
399 /**
400 * This PHY information field contains the number of frames received after
401 * a DONE has been received.
402 */
403 SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE,
404
405 /**
406 * This PHY information field contains the number of times the phy
407 * failed to achieve DWORD synchronization during speed negotiation.
408 */
409 SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR
410};
411
412enum scic_sds_phy_states {
413 /**
414 * Simply the initial state for the base domain state machine.
415 */
416 SCI_BASE_PHY_STATE_INITIAL,
417
418 /**
419 * This state indicates that the phy has successfully been stopped.
420 * In this state no new IO operations are permitted on this phy.
421 * This state is entered from the INITIAL state.
422 * This state is entered from the STARTING state.
423 * This state is entered from the READY state.
424 * This state is entered from the RESETTING state.
425 */
426 SCI_BASE_PHY_STATE_STOPPED,
427
428 /**
429 * This state indicates that the phy is in the process of becomming
430 * ready. In this state no new IO operations are permitted on this phy.
431 * This state is entered from the STOPPED state.
432 * This state is entered from the READY state.
433 * This state is entered from the RESETTING state.
434 */
435 SCI_BASE_PHY_STATE_STARTING,
436
437 /**
438 * This state indicates the the phy is now ready. Thus, the user
439 * is able to perform IO operations utilizing this phy as long as it
440 * is currently part of a valid port.
441 * This state is entered from the STARTING state.
442 */
443 SCI_BASE_PHY_STATE_READY,
444
445 /**
446 * This state indicates that the phy is in the process of being reset.
447 * In this state no new IO operations are permitted on this phy.
448 * This state is entered from the READY state.
449 */
450 SCI_BASE_PHY_STATE_RESETTING,
451
452 /**
453 * Simply the final state for the base phy state machine.
454 */
455 SCI_BASE_PHY_STATE_FINAL,
456};
457
458
459/**
460 * enum scic_sds_phy_starting_substates -
461 *
462 *
463 */
464enum scic_sds_phy_starting_substates {
465 /**
466 * Initial state
467 */
468 SCIC_SDS_PHY_STARTING_SUBSTATE_INITIAL,
469
470 /**
471 * Wait state for the hardware OSSP event type notification
472 */
473 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_OSSP_EN,
474
475 /**
476 * Wait state for the PHY speed notification
477 */
478 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_SPEED_EN,
479
480 /**
481 * Wait state for the IAF Unsolicited frame notification
482 */
483 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_IAF_UF,
484
485 /**
486 * Wait state for the request to consume power
487 */
488 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_POWER,
489
490 /**
491 * Wait state for request to consume power
492 */
493 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_POWER,
494
495 /**
496 * Wait state for the SATA PHY notification
497 */
498 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_PHY_EN,
499
500 /**
501 * Wait for the SATA PHY speed notification
502 */
503 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_SPEED_EN,
504
505 /**
506 * Wait state for the SIGNATURE FIS unsolicited frame notification
507 */
508 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SIG_FIS_UF,
509
510 /**
511 * Exit state for this state machine
512 */
513 SCIC_SDS_PHY_STARTING_SUBSTATE_FINAL,
514};
515
516
517
518typedef enum sci_status (*scic_sds_phy_handler_t)(struct scic_sds_phy *);
519typedef enum sci_status (*scic_sds_phy_event_handler_t)(struct scic_sds_phy *, u32);
520typedef enum sci_status (*scic_sds_phy_frame_handler_t)(struct scic_sds_phy *, u32);
521typedef enum sci_status (*scic_sds_phy_power_handler_t)(struct scic_sds_phy *);
522
523struct scic_sds_phy_state_handler {
524 /**
525 * The start_handler specifies the method invoked when there is an
526 * attempt to start a phy.
527 */
528 scic_sds_phy_handler_t start_handler;
529
530 /**
531 * The stop_handler specifies the method invoked when there is an
532 * attempt to stop a phy.
533 */
534 scic_sds_phy_handler_t stop_handler;
535
536 /**
537 * The reset_handler specifies the method invoked when there is an
538 * attempt to reset a phy.
539 */
540 scic_sds_phy_handler_t reset_handler;
541
542 /**
543 * The destruct_handler specifies the method invoked when attempting to
544 * destruct a phy.
545 */
546 scic_sds_phy_handler_t destruct_handler;
547
548 /**
549 * The state handler for unsolicited frames received from the SCU hardware.
550 */
551 scic_sds_phy_frame_handler_t frame_handler;
552
553 /**
554 * The state handler for events received from the SCU hardware.
555 */
556 scic_sds_phy_event_handler_t event_handler;
557
558 /**
559 * The state handler for staggered spinup.
560 */
561 scic_sds_phy_power_handler_t consume_power_handler;
562
563};
564
565/**
566 * scic_sds_phy_get_index() -
567 *
568 * This macro returns the phy index for the specified phy
569 */
570#define scic_sds_phy_get_index(phy) \
571 ((phy)->phy_index)
572
573/**
574 * scic_sds_phy_get_controller() - This macro returns the controller for this
575 * phy
576 *
577 *
578 */
579#define scic_sds_phy_get_controller(phy) \
580 (scic_sds_port_get_controller((phy)->owning_port))
581
582/**
583 * scic_sds_phy_set_state_handlers() - This macro sets the state handlers for
584 * this phy object
585 *
586 *
587 */
588#define scic_sds_phy_set_state_handlers(phy, handlers) \
589 ((phy)->state_handlers = (handlers))
590
591/**
592 * scic_sds_phy_set_base_state_handlers() -
593 *
594 * This macro set the base state handlers for the phy object.
595 */
596#define scic_sds_phy_set_base_state_handlers(phy, state_id) \
597 scic_sds_phy_set_state_handlers(\
598 (phy), \
599 &scic_sds_phy_state_handler_table[(state_id)] \
600 )
601
602void scic_sds_phy_construct(
603 struct scic_sds_phy *this_phy,
604 struct scic_sds_port *owning_port,
605 u8 phy_index);
606
607struct scic_sds_port *scic_sds_phy_get_port(
608 struct scic_sds_phy *this_phy);
609
610void scic_sds_phy_set_port(
611 struct scic_sds_phy *this_phy,
612 struct scic_sds_port *owning_port);
613
614enum sci_status scic_sds_phy_initialize(
615 struct scic_sds_phy *this_phy,
616 struct scu_transport_layer_registers __iomem *transport_layer_registers,
617 struct scu_link_layer_registers __iomem *link_layer_registers);
618
619enum sci_status scic_sds_phy_start(
620 struct scic_sds_phy *this_phy);
621
622enum sci_status scic_sds_phy_stop(
623 struct scic_sds_phy *this_phy);
624
625enum sci_status scic_sds_phy_reset(
626 struct scic_sds_phy *this_phy);
627
628void scic_sds_phy_resume(
629 struct scic_sds_phy *this_phy);
630
631void scic_sds_phy_setup_transport(
632 struct scic_sds_phy *this_phy,
633 u32 device_id);
634
635enum sci_status scic_sds_phy_event_handler(
636 struct scic_sds_phy *this_phy,
637 u32 event_code);
638
639enum sci_status scic_sds_phy_frame_handler(
640 struct scic_sds_phy *this_phy,
641 u32 frame_index);
642
643enum sci_status scic_sds_phy_consume_power_handler(
644 struct scic_sds_phy *this_phy);
645
646void scic_sds_phy_get_sas_address(
647 struct scic_sds_phy *this_phy,
648 struct sci_sas_address *sas_address);
649
650void scic_sds_phy_get_attached_sas_address(
651 struct scic_sds_phy *this_phy,
652 struct sci_sas_address *sas_address);
653
654struct scic_phy_proto;
655void scic_sds_phy_get_protocols(
656 struct scic_sds_phy *sci_phy,
657 struct scic_phy_proto *protocols);
658enum sas_linkrate sci_phy_linkrate(struct scic_sds_phy *sci_phy);
659
Dan Williamsce2b3262011-05-08 15:49:15 -0700660struct isci_host;
Dan Williams4b339812011-05-06 17:36:38 -0700661void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index);
662int isci_phy_control(struct asd_sas_phy *phy, enum phy_func func, void *buf);
Dan Williams6f231dd2011-07-02 22:56:22 -0700663
664#endif /* !defined(_ISCI_PHY_H_) */