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Florian Fainellid0cf9d82016-06-28 12:18:51 -07001/*
2 * Copyright (C) 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13#include <linux/serial_reg.h>
14
15/* Physical register offset and virtual register offset */
16#define REG_PHYS_BASE 0xf0000000
17#define REG_VIRT_BASE 0xfc000000
18#define REG_PHYS_ADDR(x) ((x) + REG_PHYS_BASE)
19
20/* Product id can be read from here */
21#define SUN_TOP_CTRL_BASE REG_PHYS_ADDR(0x404000)
22
23#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
24#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
Florian Fainellid47b51a2017-03-09 10:51:20 -080025#define UARTA_7260 REG_PHYS_ADDR(0x40c000)
26#define UARTA_7268 UARTA_7260
Florian Fainellid0cf9d82016-06-28 12:18:51 -070027#define UARTA_7271 UARTA_7268
28#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
29#define UARTA_7366 UARTA_7364
30#define UARTA_74371 REG_PHYS_ADDR(0x406b00)
31#define UARTA_7439 REG_PHYS_ADDR(0x40a900)
32#define UARTA_7445 REG_PHYS_ADDR(0x40ab00)
33
34#define UART_SHIFT 2
35
36#define checkuart(rp, rv, family_id, family) \
37 /* Load family id */ \
38 ldr rp, =family_id ; \
39 /* Compare SUN_TOP_CTRL value against it */ \
40 cmp rp, rv ; \
41 /* Passed test, load address */ \
42 ldreq rp, =UARTA_##family ; \
43 /* Jump to save UART address */ \
44 beq 91f
45
46 .macro addruart, rp, rv, tmp
47 adr \rp, 99f @ actual addr of 99f
48 ldr \rv, [\rp] @ linked addr is stored there
49 sub \rv, \rv, \rp @ offset between the two
50 ldr \rp, [\rp, #4] @ linked brcmstb_uart_config
51 sub \tmp, \rp, \rv @ actual brcmstb_uart_config
52 ldr \rp, [\tmp] @ Load brcmstb_uart_config
53 cmp \rp, #1 @ needs initialization?
54 bne 100f @ no; go load the addresses
55 mov \rv, #0 @ yes; record init is done
56 str \rv, [\tmp]
57
58 /* Check SUN_TOP_CTRL base */
59 ldr \rp, =SUN_TOP_CTRL_BASE @ load SUN_TOP_CTRL PA
60 ldr \rv, [\rp, #0] @ get register contents
61 and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
62
63 /* Chip specific detection starts here */
6420: checkuart(\rp, \rv, 0x33900000, 3390)
6521: checkuart(\rp, \rv, 0x72500000, 7250)
Florian Fainellid47b51a2017-03-09 10:51:20 -08006622: checkuart(\rp, \rv, 0x72600000, 7260)
6723: checkuart(\rp, \rv, 0x72680000, 7268)
6824: checkuart(\rp, \rv, 0x72710000, 7271)
6925: checkuart(\rp, \rv, 0x73640000, 7364)
7026: checkuart(\rp, \rv, 0x73660000, 7366)
7127: checkuart(\rp, \rv, 0x07437100, 74371)
7228: checkuart(\rp, \rv, 0x74390000, 7439)
7329: checkuart(\rp, \rv, 0x74450000, 7445)
Florian Fainellid0cf9d82016-06-28 12:18:51 -070074
75 /* No valid UART found */
7690: mov \rp, #0
77 /* fall through */
78
79 /* Record whichever UART we chose */
8091: str \rp, [\tmp, #4] @ Store in brcmstb_uart_phys
81 cmp \rp, #0 @ Valid UART address?
82 bne 92f @ Yes, go process it
83 str \rp, [\tmp, #8] @ Store 0 in brcmstb_uart_virt
84 b 100f @ Done
8592: and \rv, \rp, #0xffffff @ offset within 16MB section
86 add \rv, \rv, #REG_VIRT_BASE
87 str \rv, [\tmp, #8] @ Store in brcmstb_uart_virt
88 b 100f
89
90 .align
9199: .word .
92 .word brcmstb_uart_config
93 .ltorg
94
95 /* Load previously selected UART address */
96100: ldr \rp, [\tmp, #4] @ Load brcmstb_uart_phys
97 ldr \rv, [\tmp, #8] @ Load brcmstb_uart_virt
98 .endm
99
100 .macro store, rd, rx:vararg
101 str \rd, \rx
102 .endm
103
104 .macro load, rd, rx:vararg
105 ldr \rd, \rx
106 .endm
107
108 .macro senduart,rd,rx
109 store \rd, [\rx, #UART_TX << UART_SHIFT]
110 .endm
111
112 .macro busyuart,rd,rx
1131002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
114 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
115 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
116 bne 1002b
117 .endm
118
119 .macro waituart,rd,rx
120 .endm
121
122/*
123 * Storage for the state maintained by the macros above.
124 *
125 * In the kernel proper, this data is located in arch/arm/mach-bcm/brcmstb.c.
126 * That's because this header is included from multiple files, and we only
127 * want a single copy of the data. In particular, the UART probing code above
128 * assumes it's running using physical addresses. This is true when this file
129 * is included from head.o, but not when included from debug.o. So we need
130 * to share the probe results between the two copies, rather than having
131 * to re-run the probing again later.
132 *
133 * In the decompressor, we put the symbol/storage right here, since common.c
134 * isn't included in the decompressor build. This symbol gets put in .text
135 * even though it's really data, since .data is discarded from the
136 * decompressor. Luckily, .text is writeable in the decompressor, unless
137 * CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug.
138 */
139#if defined(ZIMAGE)
140brcmstb_uart_config:
141 /* Debug UART initialization required */
142 .word 1
143 /* Debug UART physical address */
144 .word 0
145 /* Debug UART virtual address */
146 .word 0
147#endif