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Colin Cross7056d422010-04-22 20:30:13 -07001/*
Colin Cross7056d422010-04-22 20:30:13 -07002 * Copyright (C) 2010 Google, Inc.
3 *
4 * Author:
5 * Colin Cross <ccross@google.com>
6 * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
Dmitry Osipenko9a25ba92018-05-18 23:06:34 +030019#include <linux/clk.h>
20#include <linux/cpufreq.h>
21#include <linux/err.h>
22#include <linux/init.h>
Colin Cross7056d422010-04-22 20:30:13 -070023#include <linux/module.h>
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030024#include <linux/platform_device.h>
Colin Cross7056d422010-04-22 20:30:13 -070025#include <linux/types.h>
Colin Cross7056d422010-04-22 20:30:13 -070026
Colin Cross7056d422010-04-22 20:30:13 -070027static struct cpufreq_frequency_table freq_table[] = {
Viresh Kumar5d690302013-05-14 19:08:50 +053028 { .frequency = 216000 },
29 { .frequency = 312000 },
30 { .frequency = 456000 },
31 { .frequency = 608000 },
32 { .frequency = 760000 },
33 { .frequency = 816000 },
34 { .frequency = 912000 },
35 { .frequency = 1000000 },
36 { .frequency = CPUFREQ_TABLE_END },
Colin Cross7056d422010-04-22 20:30:13 -070037};
38
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030039struct tegra20_cpufreq {
40 struct device *dev;
41 struct cpufreq_driver driver;
42 struct clk *cpu_clk;
43 struct clk *pll_x_clk;
44 struct clk *pll_p_clk;
45 bool pll_x_prepared;
46};
Colin Cross7056d422010-04-22 20:30:13 -070047
Viresh Kumar00917dd2014-06-02 22:49:29 +053048static unsigned int tegra_get_intermediate(struct cpufreq_policy *policy,
49 unsigned int index)
50{
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030051 struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
52 unsigned int ifreq = clk_get_rate(cpufreq->pll_p_clk) / 1000;
Viresh Kumar00917dd2014-06-02 22:49:29 +053053
54 /*
55 * Don't switch to intermediate freq if:
56 * - we are already at it, i.e. policy->cur == ifreq
57 * - index corresponds to ifreq
58 */
Dmitry Osipenkoc22d1cb2018-05-18 23:06:38 +030059 if (freq_table[index].frequency == ifreq || policy->cur == ifreq)
Viresh Kumar00917dd2014-06-02 22:49:29 +053060 return 0;
61
62 return ifreq;
63}
64
65static int tegra_target_intermediate(struct cpufreq_policy *policy,
66 unsigned int index)
Stephen Warrence32dda2012-09-10 17:05:01 -060067{
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030068 struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
Stephen Warrence32dda2012-09-10 17:05:01 -060069 int ret;
70
71 /*
72 * Take an extra reference to the main pll so it doesn't turn
Viresh Kumar00917dd2014-06-02 22:49:29 +053073 * off when we move the cpu off of it as enabling it again while we
Viresh Kumar40cc5492014-06-10 10:27:12 +053074 * switch to it from tegra_target() would take additional time.
75 *
76 * When target-freq is equal to intermediate freq we don't need to
77 * switch to an intermediate freq and so this routine isn't called.
78 * Also, we wouldn't be using pll_x anymore and must not take extra
79 * reference to it, as it can be disabled now to save some power.
Stephen Warrence32dda2012-09-10 17:05:01 -060080 */
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030081 clk_prepare_enable(cpufreq->pll_x_clk);
Stephen Warrence32dda2012-09-10 17:05:01 -060082
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030083 ret = clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_p_clk);
Viresh Kumar00917dd2014-06-02 22:49:29 +053084 if (ret)
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030085 clk_disable_unprepare(cpufreq->pll_x_clk);
Viresh Kumar00917dd2014-06-02 22:49:29 +053086 else
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030087 cpufreq->pll_x_prepared = true;
Stephen Warrence32dda2012-09-10 17:05:01 -060088
Stephen Warrence32dda2012-09-10 17:05:01 -060089 return ret;
90}
91
Viresh Kumare7b453d2014-05-15 11:21:19 +053092static int tegra_target(struct cpufreq_policy *policy, unsigned int index)
Colin Cross7056d422010-04-22 20:30:13 -070093{
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030094 struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
Viresh Kumare7b453d2014-05-15 11:21:19 +053095 unsigned long rate = freq_table[index].frequency;
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +030096 unsigned int ifreq = clk_get_rate(cpufreq->pll_p_clk) / 1000;
Dmitry Osipenkof39d4d52018-05-18 23:06:39 +030097 int ret;
Colin Cross7056d422010-04-22 20:30:13 -070098
Colin Cross7a281282010-11-22 18:54:36 -080099 /*
Viresh Kumar00917dd2014-06-02 22:49:29 +0530100 * target freq == pll_p, don't need to take extra reference to pll_x_clk
101 * as it isn't used anymore.
102 */
103 if (rate == ifreq)
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300104 return clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_p_clk);
Viresh Kumar00917dd2014-06-02 22:49:29 +0530105
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300106 ret = clk_set_rate(cpufreq->pll_x_clk, rate * 1000);
Viresh Kumar00917dd2014-06-02 22:49:29 +0530107 /* Restore to earlier frequency on error, i.e. pll_x */
Viresh Kumard4019f02013-08-14 19:38:24 +0530108 if (ret)
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300109 dev_err(cpufreq->dev, "Failed to change pll_x to %lu\n", rate);
Viresh Kumar00917dd2014-06-02 22:49:29 +0530110
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300111 ret = clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_x_clk);
Viresh Kumar00917dd2014-06-02 22:49:29 +0530112 /* This shouldn't fail while changing or restoring */
113 WARN_ON(ret);
114
115 /*
116 * Drop count to pll_x clock only if we switched to intermediate freq
117 * earlier while transitioning to a target frequency.
118 */
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300119 if (cpufreq->pll_x_prepared) {
120 clk_disable_unprepare(cpufreq->pll_x_clk);
121 cpufreq->pll_x_prepared = false;
Viresh Kumar00917dd2014-06-02 22:49:29 +0530122 }
Colin Cross7056d422010-04-22 20:30:13 -0700123
Viresh Kumarf56cc992013-06-19 11:18:20 +0530124 return ret;
Colin Cross7056d422010-04-22 20:30:13 -0700125}
126
Colin Cross7056d422010-04-22 20:30:13 -0700127static int tegra_cpu_init(struct cpufreq_policy *policy)
128{
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300129 struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
Viresh Kumar99d428c2013-10-03 20:42:11 +0530130 int ret;
131
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300132 clk_prepare_enable(cpufreq->cpu_clk);
Colin Cross89a5fb82010-10-20 17:47:59 -0700133
Colin Cross7056d422010-04-22 20:30:13 -0700134 /* FIXME: what's the actual transition time? */
Viresh Kumar99d428c2013-10-03 20:42:11 +0530135 ret = cpufreq_generic_init(policy, freq_table, 300 * 1000);
136 if (ret) {
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300137 clk_disable_unprepare(cpufreq->cpu_clk);
Viresh Kumar99d428c2013-10-03 20:42:11 +0530138 return ret;
139 }
Colin Cross7056d422010-04-22 20:30:13 -0700140
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300141 policy->clk = cpufreq->cpu_clk;
Viresh Kumard351cb32014-03-04 11:00:30 +0800142 policy->suspend_freq = freq_table[0].frequency;
Colin Cross7056d422010-04-22 20:30:13 -0700143 return 0;
144}
145
146static int tegra_cpu_exit(struct cpufreq_policy *policy)
147{
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300148 struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
149
150 clk_disable_unprepare(cpufreq->cpu_clk);
Colin Cross7056d422010-04-22 20:30:13 -0700151 return 0;
152}
153
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300154static int tegra20_cpufreq_probe(struct platform_device *pdev)
Colin Cross7056d422010-04-22 20:30:13 -0700155{
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300156 struct tegra20_cpufreq *cpufreq;
Dmitry Osipenko64cd64e2018-05-18 23:06:36 +0300157 int err;
158
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300159 cpufreq = devm_kzalloc(&pdev->dev, sizeof(*cpufreq), GFP_KERNEL);
160 if (!cpufreq)
161 return -ENOMEM;
Dmitry Osipenkoa413d2c2018-05-18 23:06:40 +0300162
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300163 cpufreq->cpu_clk = clk_get_sys(NULL, "cclk");
164 if (IS_ERR(cpufreq->cpu_clk))
165 return PTR_ERR(cpufreq->cpu_clk);
Richard Zhaoc26cefd2012-12-21 00:09:55 +0000166
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300167 cpufreq->pll_x_clk = clk_get_sys(NULL, "pll_x");
168 if (IS_ERR(cpufreq->pll_x_clk)) {
169 err = PTR_ERR(cpufreq->pll_x_clk);
Dmitry Osipenko64cd64e2018-05-18 23:06:36 +0300170 goto put_cpu;
171 }
Richard Zhaoc26cefd2012-12-21 00:09:55 +0000172
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300173 cpufreq->pll_p_clk = clk_get_sys(NULL, "pll_p");
174 if (IS_ERR(cpufreq->pll_p_clk)) {
175 err = PTR_ERR(cpufreq->pll_p_clk);
Dmitry Osipenko64cd64e2018-05-18 23:06:36 +0300176 goto put_pll_x;
177 }
Richard Zhaoc26cefd2012-12-21 00:09:55 +0000178
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300179 cpufreq->dev = &pdev->dev;
180 cpufreq->driver.get = cpufreq_generic_get;
181 cpufreq->driver.attr = cpufreq_generic_attr;
182 cpufreq->driver.init = tegra_cpu_init;
183 cpufreq->driver.exit = tegra_cpu_exit;
184 cpufreq->driver.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK;
185 cpufreq->driver.verify = cpufreq_generic_frequency_table_verify;
186 cpufreq->driver.suspend = cpufreq_generic_suspend;
187 cpufreq->driver.driver_data = cpufreq;
188 cpufreq->driver.target_index = tegra_target;
189 cpufreq->driver.get_intermediate = tegra_get_intermediate;
190 cpufreq->driver.target_intermediate = tegra_target_intermediate;
191 snprintf(cpufreq->driver.name, CPUFREQ_NAME_LEN, "tegra");
192
193 err = cpufreq_register_driver(&cpufreq->driver);
Dmitry Osipenko64cd64e2018-05-18 23:06:36 +0300194 if (err)
195 goto put_pll_p;
196
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300197 platform_set_drvdata(pdev, cpufreq);
198
Dmitry Osipenko64cd64e2018-05-18 23:06:36 +0300199 return 0;
200
201put_pll_p:
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300202 clk_put(cpufreq->pll_p_clk);
Dmitry Osipenko64cd64e2018-05-18 23:06:36 +0300203put_pll_x:
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300204 clk_put(cpufreq->pll_x_clk);
Dmitry Osipenko64cd64e2018-05-18 23:06:36 +0300205put_cpu:
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300206 clk_put(cpufreq->cpu_clk);
Dmitry Osipenko64cd64e2018-05-18 23:06:36 +0300207
208 return err;
Colin Cross7056d422010-04-22 20:30:13 -0700209}
210
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300211static int tegra20_cpufreq_remove(struct platform_device *pdev)
Colin Cross7056d422010-04-22 20:30:13 -0700212{
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300213 struct tegra20_cpufreq *cpufreq = platform_get_drvdata(pdev);
214
215 cpufreq_unregister_driver(&cpufreq->driver);
216
217 clk_put(cpufreq->pll_p_clk);
218 clk_put(cpufreq->pll_x_clk);
219 clk_put(cpufreq->cpu_clk);
220
221 return 0;
Colin Cross7056d422010-04-22 20:30:13 -0700222}
223
Dmitry Osipenkodc628cd2018-05-18 23:06:42 +0300224static struct platform_driver tegra20_cpufreq_driver = {
225 .probe = tegra20_cpufreq_probe,
226 .remove = tegra20_cpufreq_remove,
227 .driver = {
228 .name = "tegra20-cpufreq",
229 },
230};
231module_platform_driver(tegra20_cpufreq_driver);
232
233MODULE_ALIAS("platform:tegra20-cpufreq");
Colin Cross7056d422010-04-22 20:30:13 -0700234MODULE_AUTHOR("Colin Cross <ccross@android.com>");
Dmitry Osipenko49640272018-05-18 23:06:32 +0300235MODULE_DESCRIPTION("NVIDIA Tegra20 cpufreq driver");
Colin Cross7056d422010-04-22 20:30:13 -0700236MODULE_LICENSE("GPL");