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Florian Fainelli98cd1552017-03-30 18:43:21 -07001/*
2 * Distributed Switch Architecture loopback driver
3 *
4 * Copyright (C) 2016, Florian Fainelli <f.fainelli@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/platform_device.h>
13#include <linux/netdevice.h>
14#include <linux/phy.h>
15#include <linux/phy_fixed.h>
16#include <linux/export.h>
Florian Fainelli484c0172017-06-15 10:15:53 -070017#include <linux/ethtool.h>
Florian Fainelli98cd1552017-03-30 18:43:21 -070018#include <linux/workqueue.h>
19#include <linux/module.h>
20#include <linux/if_bridge.h>
Florian Fainelli98cd1552017-03-30 18:43:21 -070021#include <net/dsa.h>
22
23#include "dsa_loop.h"
24
25struct dsa_loop_vlan {
26 u16 members;
27 u16 untagged;
28};
29
Florian Fainelli484c0172017-06-15 10:15:53 -070030struct dsa_loop_mib_entry {
31 char name[ETH_GSTRING_LEN];
32 unsigned long val;
33};
34
35enum dsa_loop_mib_counters {
36 DSA_LOOP_PHY_READ_OK,
37 DSA_LOOP_PHY_READ_ERR,
38 DSA_LOOP_PHY_WRITE_OK,
39 DSA_LOOP_PHY_WRITE_ERR,
40 __DSA_LOOP_CNT_MAX,
41};
42
43static struct dsa_loop_mib_entry dsa_loop_mibs[] = {
44 [DSA_LOOP_PHY_READ_OK] = { "phy_read_ok", },
45 [DSA_LOOP_PHY_READ_ERR] = { "phy_read_err", },
46 [DSA_LOOP_PHY_WRITE_OK] = { "phy_write_ok", },
47 [DSA_LOOP_PHY_WRITE_ERR] = { "phy_write_err", },
48};
49
50struct dsa_loop_port {
51 struct dsa_loop_mib_entry mib[__DSA_LOOP_CNT_MAX];
52};
53
Florian Fainelli98cd1552017-03-30 18:43:21 -070054#define DSA_LOOP_VLANS 5
55
56struct dsa_loop_priv {
57 struct mii_bus *bus;
58 unsigned int port_base;
59 struct dsa_loop_vlan vlans[DSA_LOOP_VLANS];
60 struct net_device *netdev;
Florian Fainelli484c0172017-06-15 10:15:53 -070061 struct dsa_loop_port ports[DSA_MAX_PORTS];
Florian Fainelli98cd1552017-03-30 18:43:21 -070062 u16 pvid;
63};
64
65static struct phy_device *phydevs[PHY_MAX_ADDR];
66
67static enum dsa_tag_protocol dsa_loop_get_protocol(struct dsa_switch *ds)
68{
69 dev_dbg(ds->dev, "%s\n", __func__);
70
71 return DSA_TAG_PROTO_NONE;
72}
73
74static int dsa_loop_setup(struct dsa_switch *ds)
75{
Florian Fainelli484c0172017-06-15 10:15:53 -070076 struct dsa_loop_priv *ps = ds->priv;
77 unsigned int i;
78
79 for (i = 0; i < ds->num_ports; i++)
80 memcpy(ps->ports[i].mib, dsa_loop_mibs,
81 sizeof(dsa_loop_mibs));
82
Florian Fainelli98cd1552017-03-30 18:43:21 -070083 dev_dbg(ds->dev, "%s\n", __func__);
84
85 return 0;
86}
87
Florian Fainelli484c0172017-06-15 10:15:53 -070088static int dsa_loop_get_sset_count(struct dsa_switch *ds)
89{
90 return __DSA_LOOP_CNT_MAX;
91}
92
93static void dsa_loop_get_strings(struct dsa_switch *ds, int port, uint8_t *data)
94{
95 struct dsa_loop_priv *ps = ds->priv;
96 unsigned int i;
97
98 for (i = 0; i < __DSA_LOOP_CNT_MAX; i++)
99 memcpy(data + i * ETH_GSTRING_LEN,
100 ps->ports[port].mib[i].name, ETH_GSTRING_LEN);
101}
102
103static void dsa_loop_get_ethtool_stats(struct dsa_switch *ds, int port,
104 uint64_t *data)
105{
106 struct dsa_loop_priv *ps = ds->priv;
107 unsigned int i;
108
109 for (i = 0; i < __DSA_LOOP_CNT_MAX; i++)
110 data[i] = ps->ports[port].mib[i].val;
111}
112
Florian Fainelli98cd1552017-03-30 18:43:21 -0700113static int dsa_loop_set_addr(struct dsa_switch *ds, u8 *addr)
114{
115 dev_dbg(ds->dev, "%s\n", __func__);
116
117 return 0;
118}
119
120static int dsa_loop_phy_read(struct dsa_switch *ds, int port, int regnum)
121{
122 struct dsa_loop_priv *ps = ds->priv;
123 struct mii_bus *bus = ps->bus;
Florian Fainelli484c0172017-06-15 10:15:53 -0700124 int ret;
Florian Fainelli98cd1552017-03-30 18:43:21 -0700125
126 dev_dbg(ds->dev, "%s\n", __func__);
127
Florian Fainelli484c0172017-06-15 10:15:53 -0700128 ret = mdiobus_read_nested(bus, ps->port_base + port, regnum);
129 if (ret < 0)
130 ps->ports[port].mib[DSA_LOOP_PHY_READ_ERR].val++;
131 else
132 ps->ports[port].mib[DSA_LOOP_PHY_READ_OK].val++;
133
134 return ret;
Florian Fainelli98cd1552017-03-30 18:43:21 -0700135}
136
137static int dsa_loop_phy_write(struct dsa_switch *ds, int port,
138 int regnum, u16 value)
139{
140 struct dsa_loop_priv *ps = ds->priv;
141 struct mii_bus *bus = ps->bus;
Florian Fainelli484c0172017-06-15 10:15:53 -0700142 int ret;
Florian Fainelli98cd1552017-03-30 18:43:21 -0700143
144 dev_dbg(ds->dev, "%s\n", __func__);
145
Florian Fainelli484c0172017-06-15 10:15:53 -0700146 ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value);
147 if (ret < 0)
148 ps->ports[port].mib[DSA_LOOP_PHY_WRITE_ERR].val++;
149 else
150 ps->ports[port].mib[DSA_LOOP_PHY_WRITE_OK].val++;
151
152 return ret;
Florian Fainelli98cd1552017-03-30 18:43:21 -0700153}
154
155static int dsa_loop_port_bridge_join(struct dsa_switch *ds, int port,
156 struct net_device *bridge)
157{
158 dev_dbg(ds->dev, "%s\n", __func__);
159
160 return 0;
161}
162
163static void dsa_loop_port_bridge_leave(struct dsa_switch *ds, int port,
164 struct net_device *bridge)
165{
166 dev_dbg(ds->dev, "%s\n", __func__);
167}
168
169static void dsa_loop_port_stp_state_set(struct dsa_switch *ds, int port,
170 u8 state)
171{
172 dev_dbg(ds->dev, "%s\n", __func__);
173}
174
175static int dsa_loop_port_vlan_filtering(struct dsa_switch *ds, int port,
176 bool vlan_filtering)
177{
178 dev_dbg(ds->dev, "%s\n", __func__);
179
180 return 0;
181}
182
183static int dsa_loop_port_vlan_prepare(struct dsa_switch *ds, int port,
184 const struct switchdev_obj_port_vlan *vlan,
185 struct switchdev_trans *trans)
186{
187 struct dsa_loop_priv *ps = ds->priv;
188 struct mii_bus *bus = ps->bus;
189
190 dev_dbg(ds->dev, "%s\n", __func__);
191
192 /* Just do a sleeping operation to make lockdep checks effective */
193 mdiobus_read(bus, ps->port_base + port, MII_BMSR);
194
195 if (vlan->vid_end > DSA_LOOP_VLANS)
196 return -ERANGE;
197
198 return 0;
199}
200
201static void dsa_loop_port_vlan_add(struct dsa_switch *ds, int port,
202 const struct switchdev_obj_port_vlan *vlan,
203 struct switchdev_trans *trans)
204{
205 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
206 bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
207 struct dsa_loop_priv *ps = ds->priv;
208 struct mii_bus *bus = ps->bus;
209 struct dsa_loop_vlan *vl;
210 u16 vid;
211
212 dev_dbg(ds->dev, "%s\n", __func__);
213
214 /* Just do a sleeping operation to make lockdep checks effective */
215 mdiobus_read(bus, ps->port_base + port, MII_BMSR);
216
217 for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) {
218 vl = &ps->vlans[vid];
219
220 vl->members |= BIT(port);
221 if (untagged)
222 vl->untagged |= BIT(port);
223 else
224 vl->untagged &= ~BIT(port);
225 }
226
227 if (pvid)
228 ps->pvid = vid;
229}
230
231static int dsa_loop_port_vlan_del(struct dsa_switch *ds, int port,
232 const struct switchdev_obj_port_vlan *vlan)
233{
234 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
235 struct dsa_loop_priv *ps = ds->priv;
236 struct mii_bus *bus = ps->bus;
237 struct dsa_loop_vlan *vl;
Florian Fainelli5865ccc2017-04-05 11:19:30 -0700238 u16 vid, pvid = ps->pvid;
Florian Fainelli98cd1552017-03-30 18:43:21 -0700239
240 dev_dbg(ds->dev, "%s\n", __func__);
241
242 /* Just do a sleeping operation to make lockdep checks effective */
243 mdiobus_read(bus, ps->port_base + port, MII_BMSR);
244
245 for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) {
246 vl = &ps->vlans[vid];
247
248 vl->members &= ~BIT(port);
249 if (untagged)
250 vl->untagged &= ~BIT(port);
251
252 if (pvid == vid)
253 pvid = 1;
254 }
255 ps->pvid = pvid;
256
257 return 0;
258}
259
Bhumika Goyald78d6772017-08-09 10:34:15 +0530260static const struct dsa_switch_ops dsa_loop_driver = {
Florian Fainelli98cd1552017-03-30 18:43:21 -0700261 .get_tag_protocol = dsa_loop_get_protocol,
262 .setup = dsa_loop_setup,
Florian Fainelli484c0172017-06-15 10:15:53 -0700263 .get_strings = dsa_loop_get_strings,
264 .get_ethtool_stats = dsa_loop_get_ethtool_stats,
265 .get_sset_count = dsa_loop_get_sset_count,
Florian Fainelli98cd1552017-03-30 18:43:21 -0700266 .set_addr = dsa_loop_set_addr,
267 .phy_read = dsa_loop_phy_read,
268 .phy_write = dsa_loop_phy_write,
269 .port_bridge_join = dsa_loop_port_bridge_join,
270 .port_bridge_leave = dsa_loop_port_bridge_leave,
271 .port_stp_state_set = dsa_loop_port_stp_state_set,
272 .port_vlan_filtering = dsa_loop_port_vlan_filtering,
273 .port_vlan_prepare = dsa_loop_port_vlan_prepare,
274 .port_vlan_add = dsa_loop_port_vlan_add,
275 .port_vlan_del = dsa_loop_port_vlan_del,
Florian Fainelli98cd1552017-03-30 18:43:21 -0700276};
277
278static int dsa_loop_drv_probe(struct mdio_device *mdiodev)
279{
280 struct dsa_loop_pdata *pdata = mdiodev->dev.platform_data;
281 struct dsa_loop_priv *ps;
282 struct dsa_switch *ds;
283
284 if (!pdata)
285 return -ENODEV;
286
287 dev_info(&mdiodev->dev, "%s: 0x%0x\n",
288 pdata->name, pdata->enabled_ports);
289
290 ds = dsa_switch_alloc(&mdiodev->dev, DSA_MAX_PORTS);
291 if (!ds)
292 return -ENOMEM;
293
294 ps = devm_kzalloc(&mdiodev->dev, sizeof(*ps), GFP_KERNEL);
Christophe Jaillet8ce7aaa2017-05-06 07:29:45 +0200295 if (!ps)
296 return -ENOMEM;
297
Florian Fainelli98cd1552017-03-30 18:43:21 -0700298 ps->netdev = dev_get_by_name(&init_net, pdata->netdev);
299 if (!ps->netdev)
300 return -EPROBE_DEFER;
301
302 pdata->cd.netdev[DSA_LOOP_CPU_PORT] = &ps->netdev->dev;
303
304 ds->dev = &mdiodev->dev;
305 ds->ops = &dsa_loop_driver;
306 ds->priv = ps;
307 ps->bus = mdiodev->bus;
308
309 dev_set_drvdata(&mdiodev->dev, ds);
310
Vivien Didelot23c9ee42017-05-26 18:12:51 -0400311 return dsa_register_switch(ds);
Florian Fainelli98cd1552017-03-30 18:43:21 -0700312}
313
314static void dsa_loop_drv_remove(struct mdio_device *mdiodev)
315{
316 struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev);
317 struct dsa_loop_priv *ps = ds->priv;
318
319 dsa_unregister_switch(ds);
320 dev_put(ps->netdev);
321}
322
323static struct mdio_driver dsa_loop_drv = {
324 .mdiodrv.driver = {
325 .name = "dsa-loop",
326 },
327 .probe = dsa_loop_drv_probe,
328 .remove = dsa_loop_drv_remove,
329};
330
331#define NUM_FIXED_PHYS (DSA_LOOP_NUM_PORTS - 2)
332
Florian Fainelli98cd1552017-03-30 18:43:21 -0700333static int __init dsa_loop_init(void)
334{
335 struct fixed_phy_status status = {
336 .link = 1,
337 .speed = SPEED_100,
338 .duplex = DUPLEX_FULL,
339 };
340 unsigned int i;
341
342 for (i = 0; i < NUM_FIXED_PHYS; i++)
343 phydevs[i] = fixed_phy_register(PHY_POLL, &status, -1, NULL);
344
345 return mdio_driver_register(&dsa_loop_drv);
346}
347module_init(dsa_loop_init);
348
349static void __exit dsa_loop_exit(void)
350{
Florian Fainelli3407dc82017-06-15 10:15:52 -0700351 unsigned int i;
352
Florian Fainelli98cd1552017-03-30 18:43:21 -0700353 mdio_driver_unregister(&dsa_loop_drv);
Florian Fainelli3407dc82017-06-15 10:15:52 -0700354 for (i = 0; i < NUM_FIXED_PHYS; i++)
355 if (phydevs[i])
356 fixed_phy_unregister(phydevs[i]);
Florian Fainelli98cd1552017-03-30 18:43:21 -0700357}
358module_exit(dsa_loop_exit);
359
360MODULE_LICENSE("GPL");
361MODULE_AUTHOR("Florian Fainelli");
362MODULE_DESCRIPTION("DSA loopback driver");