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Oscar Mateob20385f2014-07-24 17:04:10 +01001/*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#ifndef _INTEL_LRC_H_
25#define _INTEL_LRC_H_
26
Oscar Mateodcb4c122014-11-13 10:28:10 +000027#define GEN8_LR_CONTEXT_ALIGN 4096
Michel Thierrydfc53c52015-09-28 13:25:12 +010028#define GEN8_CSB_ENTRIES 6
29#define GEN8_CSB_PTR_MASK 0x07
Oscar Mateodcb4c122014-11-13 10:28:10 +000030
Oscar Mateo4ba70e42014-08-07 13:23:20 +010031/* Execlists regs */
32#define RING_ELSP(ring) ((ring)->mmio_base+0x230)
Ville Syrjälä83843d82015-09-18 20:03:15 +030033#define RING_EXECLIST_STATUS_LO(ring) ((ring)->mmio_base+0x234)
34#define RING_EXECLIST_STATUS_HI(ring) ((ring)->mmio_base+0x234 + 4)
Oscar Mateo4ba70e42014-08-07 13:23:20 +010035#define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244)
Zhi Wang5baa22c52015-02-10 17:11:36 +080036#define CTX_CTRL_INHIBIT_SYN_CTX_SWITCH (1 << 3)
37#define CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT (1 << 0)
Abdiel Janulgue69225282015-06-16 13:39:42 +030038#define CTX_CTRL_RS_CTX_ENABLE (1 << 1)
Ville Syrjälä83843d82015-09-18 20:03:15 +030039#define RING_CONTEXT_STATUS_BUF_LO(ring, i) ((ring)->mmio_base+0x370 + (i) * 8)
40#define RING_CONTEXT_STATUS_BUF_HI(ring, i) ((ring)->mmio_base+0x370 + (i) * 8 + 4)
Oscar Mateo4ba70e42014-08-07 13:23:20 +010041#define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0)
42
Oscar Mateo454afeb2014-07-24 17:04:22 +010043/* Logical Rings */
John Harrison40e895c2015-05-29 17:43:26 +010044int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request);
John Harrisonccd98fe2015-05-29 17:44:09 +010045int intel_logical_ring_reserve_space(struct drm_i915_gem_request *request);
Oscar Mateo454afeb2014-07-24 17:04:22 +010046void intel_logical_ring_stop(struct intel_engine_cs *ring);
47void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
48int intel_logical_rings_init(struct drm_device *dev);
Peter Antoine3bbaba02015-07-10 20:13:11 +030049int intel_logical_ring_begin(struct drm_i915_gem_request *req, int num_dwords);
Oscar Mateo454afeb2014-07-24 17:04:22 +010050
John Harrison4866d722015-05-29 17:43:55 +010051int logical_ring_flush_all_caches(struct drm_i915_gem_request *req);
Oscar Mateo73e4d072014-07-24 17:04:48 +010052/**
53 * intel_logical_ring_advance() - advance the ringbuffer tail
54 * @ringbuf: Ringbuffer to advance.
55 *
56 * The tail is only updated in our logical ringbuffer struct.
57 */
Oscar Mateo82e104c2014-07-24 17:04:26 +010058static inline void intel_logical_ring_advance(struct intel_ringbuffer *ringbuf)
59{
60 ringbuf->tail &= ringbuf->size - 1;
61}
Oscar Mateo73e4d072014-07-24 17:04:48 +010062/**
63 * intel_logical_ring_emit() - write a DWORD to the ringbuffer.
64 * @ringbuf: Ringbuffer to write to.
65 * @data: DWORD to write.
66 */
Oscar Mateo82e104c2014-07-24 17:04:26 +010067static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
68 u32 data)
69{
70 iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
71 ringbuf->tail += 4;
72}
Oscar Mateo82e104c2014-07-24 17:04:26 +010073
Oscar Mateoede7d422014-07-24 17:04:12 +010074/* Logical Ring Contexts */
Alex Daid1675192015-08-12 15:43:43 +010075
76/* One extra page is added before LRC for GuC as shared data */
77#define LRC_GUCSHR_PN (0)
78#define LRC_PPHWSP_PN (LRC_GUCSHR_PN + 1)
79#define LRC_STATE_PN (LRC_PPHWSP_PN + 1)
80
Oscar Mateoede7d422014-07-24 17:04:12 +010081void intel_lr_context_free(struct intel_context *ctx);
Nick Hoathe84fe802015-09-11 12:53:46 +010082int intel_lr_context_deferred_alloc(struct intel_context *ctx,
83 struct intel_engine_cs *ring);
Mika Kuoppala8ba319d2015-07-03 17:09:35 +030084void intel_lr_context_unpin(struct drm_i915_gem_request *req);
Thomas Daniel3e5b6f02015-02-16 16:12:53 +000085void intel_lr_context_reset(struct drm_device *dev,
86 struct intel_context *ctx);
Dave Gordon919f1f52015-08-12 15:43:38 +010087uint64_t intel_lr_context_descriptor(struct intel_context *ctx,
88 struct intel_engine_cs *ring);
Oscar Mateoede7d422014-07-24 17:04:12 +010089
Oscar Mateo127f1002014-07-24 17:04:11 +010090/* Execlists */
91int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
John Harrison5f19e2b2015-05-29 17:43:27 +010092struct i915_execbuffer_params;
93int intel_execlists_submission(struct i915_execbuffer_params *params,
Oscar Mateo454afeb2014-07-24 17:04:22 +010094 struct drm_i915_gem_execbuffer2 *args,
John Harrison5f19e2b2015-05-29 17:43:27 +010095 struct list_head *vmas);
Ben Widawsky84b790f2014-07-24 17:04:36 +010096u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
Oscar Mateo127f1002014-07-24 17:04:11 +010097
Daniel Vetter3f7531c2014-12-10 17:41:43 +010098void intel_lrc_irq_handler(struct intel_engine_cs *ring);
Thomas Danielc86ee3a92014-11-13 10:27:05 +000099void intel_execlists_retire_requests(struct intel_engine_cs *ring);
Thomas Daniele981e7b2014-07-24 17:04:39 +0100100
Oscar Mateob20385f2014-07-24 17:04:10 +0100101#endif /* _INTEL_LRC_H_ */