Oscar Mateo | b20385f | 2014-07-24 17:04:10 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2014 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | */ |
| 23 | |
| 24 | #ifndef _INTEL_LRC_H_ |
| 25 | #define _INTEL_LRC_H_ |
| 26 | |
Oscar Mateo | dcb4c12 | 2014-11-13 10:28:10 +0000 | [diff] [blame] | 27 | #define GEN8_LR_CONTEXT_ALIGN 4096 |
Michel Thierry | dfc53c5 | 2015-09-28 13:25:12 +0100 | [diff] [blame] | 28 | #define GEN8_CSB_ENTRIES 6 |
| 29 | #define GEN8_CSB_PTR_MASK 0x07 |
Oscar Mateo | dcb4c12 | 2014-11-13 10:28:10 +0000 | [diff] [blame] | 30 | |
Oscar Mateo | 4ba70e4 | 2014-08-07 13:23:20 +0100 | [diff] [blame] | 31 | /* Execlists regs */ |
| 32 | #define RING_ELSP(ring) ((ring)->mmio_base+0x230) |
Ville Syrjälä | 83843d8 | 2015-09-18 20:03:15 +0300 | [diff] [blame] | 33 | #define RING_EXECLIST_STATUS_LO(ring) ((ring)->mmio_base+0x234) |
| 34 | #define RING_EXECLIST_STATUS_HI(ring) ((ring)->mmio_base+0x234 + 4) |
Oscar Mateo | 4ba70e4 | 2014-08-07 13:23:20 +0100 | [diff] [blame] | 35 | #define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244) |
Zhi Wang | 5baa22c5 | 2015-02-10 17:11:36 +0800 | [diff] [blame] | 36 | #define CTX_CTRL_INHIBIT_SYN_CTX_SWITCH (1 << 3) |
| 37 | #define CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT (1 << 0) |
Abdiel Janulgue | 6922528 | 2015-06-16 13:39:42 +0300 | [diff] [blame] | 38 | #define CTX_CTRL_RS_CTX_ENABLE (1 << 1) |
Ville Syrjälä | 83843d8 | 2015-09-18 20:03:15 +0300 | [diff] [blame] | 39 | #define RING_CONTEXT_STATUS_BUF_LO(ring, i) ((ring)->mmio_base+0x370 + (i) * 8) |
| 40 | #define RING_CONTEXT_STATUS_BUF_HI(ring, i) ((ring)->mmio_base+0x370 + (i) * 8 + 4) |
Oscar Mateo | 4ba70e4 | 2014-08-07 13:23:20 +0100 | [diff] [blame] | 41 | #define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0) |
| 42 | |
Oscar Mateo | 454afeb | 2014-07-24 17:04:22 +0100 | [diff] [blame] | 43 | /* Logical Rings */ |
John Harrison | 40e895c | 2015-05-29 17:43:26 +0100 | [diff] [blame] | 44 | int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request); |
John Harrison | ccd98fe | 2015-05-29 17:44:09 +0100 | [diff] [blame] | 45 | int intel_logical_ring_reserve_space(struct drm_i915_gem_request *request); |
Oscar Mateo | 454afeb | 2014-07-24 17:04:22 +0100 | [diff] [blame] | 46 | void intel_logical_ring_stop(struct intel_engine_cs *ring); |
| 47 | void intel_logical_ring_cleanup(struct intel_engine_cs *ring); |
| 48 | int intel_logical_rings_init(struct drm_device *dev); |
Peter Antoine | 3bbaba0 | 2015-07-10 20:13:11 +0300 | [diff] [blame] | 49 | int intel_logical_ring_begin(struct drm_i915_gem_request *req, int num_dwords); |
Oscar Mateo | 454afeb | 2014-07-24 17:04:22 +0100 | [diff] [blame] | 50 | |
John Harrison | 4866d72 | 2015-05-29 17:43:55 +0100 | [diff] [blame] | 51 | int logical_ring_flush_all_caches(struct drm_i915_gem_request *req); |
Oscar Mateo | 73e4d07 | 2014-07-24 17:04:48 +0100 | [diff] [blame] | 52 | /** |
| 53 | * intel_logical_ring_advance() - advance the ringbuffer tail |
| 54 | * @ringbuf: Ringbuffer to advance. |
| 55 | * |
| 56 | * The tail is only updated in our logical ringbuffer struct. |
| 57 | */ |
Oscar Mateo | 82e104c | 2014-07-24 17:04:26 +0100 | [diff] [blame] | 58 | static inline void intel_logical_ring_advance(struct intel_ringbuffer *ringbuf) |
| 59 | { |
| 60 | ringbuf->tail &= ringbuf->size - 1; |
| 61 | } |
Oscar Mateo | 73e4d07 | 2014-07-24 17:04:48 +0100 | [diff] [blame] | 62 | /** |
| 63 | * intel_logical_ring_emit() - write a DWORD to the ringbuffer. |
| 64 | * @ringbuf: Ringbuffer to write to. |
| 65 | * @data: DWORD to write. |
| 66 | */ |
Oscar Mateo | 82e104c | 2014-07-24 17:04:26 +0100 | [diff] [blame] | 67 | static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf, |
| 68 | u32 data) |
| 69 | { |
| 70 | iowrite32(data, ringbuf->virtual_start + ringbuf->tail); |
| 71 | ringbuf->tail += 4; |
| 72 | } |
Oscar Mateo | 82e104c | 2014-07-24 17:04:26 +0100 | [diff] [blame] | 73 | |
Oscar Mateo | ede7d42 | 2014-07-24 17:04:12 +0100 | [diff] [blame] | 74 | /* Logical Ring Contexts */ |
Alex Dai | d167519 | 2015-08-12 15:43:43 +0100 | [diff] [blame] | 75 | |
| 76 | /* One extra page is added before LRC for GuC as shared data */ |
| 77 | #define LRC_GUCSHR_PN (0) |
| 78 | #define LRC_PPHWSP_PN (LRC_GUCSHR_PN + 1) |
| 79 | #define LRC_STATE_PN (LRC_PPHWSP_PN + 1) |
| 80 | |
Oscar Mateo | ede7d42 | 2014-07-24 17:04:12 +0100 | [diff] [blame] | 81 | void intel_lr_context_free(struct intel_context *ctx); |
Nick Hoath | e84fe80 | 2015-09-11 12:53:46 +0100 | [diff] [blame] | 82 | int intel_lr_context_deferred_alloc(struct intel_context *ctx, |
| 83 | struct intel_engine_cs *ring); |
Mika Kuoppala | 8ba319d | 2015-07-03 17:09:35 +0300 | [diff] [blame] | 84 | void intel_lr_context_unpin(struct drm_i915_gem_request *req); |
Thomas Daniel | 3e5b6f0 | 2015-02-16 16:12:53 +0000 | [diff] [blame] | 85 | void intel_lr_context_reset(struct drm_device *dev, |
| 86 | struct intel_context *ctx); |
Dave Gordon | 919f1f5 | 2015-08-12 15:43:38 +0100 | [diff] [blame] | 87 | uint64_t intel_lr_context_descriptor(struct intel_context *ctx, |
| 88 | struct intel_engine_cs *ring); |
Oscar Mateo | ede7d42 | 2014-07-24 17:04:12 +0100 | [diff] [blame] | 89 | |
Oscar Mateo | 127f100 | 2014-07-24 17:04:11 +0100 | [diff] [blame] | 90 | /* Execlists */ |
| 91 | int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists); |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 92 | struct i915_execbuffer_params; |
| 93 | int intel_execlists_submission(struct i915_execbuffer_params *params, |
Oscar Mateo | 454afeb | 2014-07-24 17:04:22 +0100 | [diff] [blame] | 94 | struct drm_i915_gem_execbuffer2 *args, |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 95 | struct list_head *vmas); |
Ben Widawsky | 84b790f | 2014-07-24 17:04:36 +0100 | [diff] [blame] | 96 | u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj); |
Oscar Mateo | 127f100 | 2014-07-24 17:04:11 +0100 | [diff] [blame] | 97 | |
Daniel Vetter | 3f7531c | 2014-12-10 17:41:43 +0100 | [diff] [blame] | 98 | void intel_lrc_irq_handler(struct intel_engine_cs *ring); |
Thomas Daniel | c86ee3a9 | 2014-11-13 10:27:05 +0000 | [diff] [blame] | 99 | void intel_execlists_retire_requests(struct intel_engine_cs *ring); |
Thomas Daniel | e981e7b | 2014-07-24 17:04:39 +0100 | [diff] [blame] | 100 | |
Oscar Mateo | b20385f | 2014-07-24 17:04:10 +0100 | [diff] [blame] | 101 | #endif /* _INTEL_LRC_H_ */ |