| Jon Loeliger | d93daf8 | 2007-03-20 11:19:10 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * MPC8544 DS Device Tree Source |
| 3 | * |
| 4 | * Copyright 2007 Freescale Semiconductor Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | */ |
| 11 | |
| 12 | / { |
| 13 | model = "MPC8544DS"; |
| 14 | compatible = "MPC8544DS", "MPC85xxDS"; |
| 15 | #address-cells = <1>; |
| 16 | #size-cells = <1>; |
| 17 | |
| 18 | cpus { |
| 19 | #cpus = <1>; |
| 20 | #address-cells = <1>; |
| 21 | #size-cells = <0>; |
| 22 | |
| 23 | PowerPC,8544@0 { |
| 24 | device_type = "cpu"; |
| 25 | reg = <0>; |
| 26 | d-cache-line-size = <20>; // 32 bytes |
| 27 | i-cache-line-size = <20>; // 32 bytes |
| 28 | d-cache-size = <8000>; // L1, 32K |
| 29 | i-cache-size = <8000>; // L1, 32K |
| 30 | timebase-frequency = <0>; |
| 31 | bus-frequency = <0>; |
| 32 | clock-frequency = <0>; |
| 33 | 32-bit; |
| 34 | }; |
| 35 | }; |
| 36 | |
| 37 | memory { |
| 38 | device_type = "memory"; |
| 39 | reg = <00000000 00000000>; // Filled by U-Boot |
| 40 | }; |
| 41 | |
| 42 | soc8544@e0000000 { |
| 43 | #address-cells = <1>; |
| 44 | #size-cells = <1>; |
| 45 | #interrupt-cells = <2>; |
| 46 | device_type = "soc"; |
| 47 | ranges = <0 e0000000 00100000>; |
| 48 | reg = <e0000000 00100000>; // CCSRBAR 1M |
| 49 | bus-frequency = <0>; // Filled out by uboot. |
| 50 | |
| 51 | i2c@3000 { |
| 52 | device_type = "i2c"; |
| 53 | compatible = "fsl-i2c"; |
| 54 | reg = <3000 100>; |
| 55 | interrupts = <1b 2>; |
| 56 | interrupt-parent = <&mpic>; |
| 57 | dfsrr; |
| 58 | }; |
| 59 | |
| 60 | mdio@24520 { |
| 61 | #address-cells = <1>; |
| 62 | #size-cells = <0>; |
| 63 | device_type = "mdio"; |
| 64 | compatible = "gianfar"; |
| 65 | reg = <24520 20>; |
| 66 | phy0: ethernet-phy@0 { |
| 67 | interrupt-parent = <&mpic>; |
| 68 | interrupts = <3a 1>; |
| 69 | reg = <0>; |
| 70 | device_type = "ethernet-phy"; |
| 71 | }; |
| 72 | phy1: ethernet-phy@1 { |
| 73 | interrupt-parent = <&mpic>; |
| 74 | interrupts = <3a 1>; |
| 75 | reg = <1>; |
| 76 | device_type = "ethernet-phy"; |
| 77 | }; |
| 78 | }; |
| 79 | |
| 80 | ethernet@24000 { |
| 81 | #address-cells = <1>; |
| 82 | #size-cells = <0>; |
| 83 | device_type = "network"; |
| 84 | model = "TSEC"; |
| 85 | compatible = "gianfar"; |
| 86 | reg = <24000 1000>; |
| 87 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 88 | interrupts = <d 2 e 2 12 2>; |
| 89 | interrupt-parent = <&mpic>; |
| 90 | phy-handle = <&phy0>; |
| 91 | }; |
| 92 | |
| 93 | ethernet@26000 { |
| 94 | #address-cells = <1>; |
| 95 | #size-cells = <0>; |
| 96 | device_type = "network"; |
| 97 | model = "TSEC"; |
| 98 | compatible = "gianfar"; |
| 99 | reg = <26000 1000>; |
| 100 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 101 | interrupts = <f 2 10 2 11 2>; |
| 102 | interrupt-parent = <&mpic>; |
| 103 | phy-handle = <&phy1>; |
| 104 | }; |
| 105 | |
| 106 | serial@4500 { |
| 107 | device_type = "serial"; |
| 108 | compatible = "ns16550"; |
| 109 | reg = <4500 100>; |
| 110 | clock-frequency = <0>; |
| 111 | interrupts = <1a 2>; |
| 112 | interrupt-parent = <&mpic>; |
| 113 | }; |
| 114 | |
| 115 | serial@4600 { |
| 116 | device_type = "serial"; |
| 117 | compatible = "ns16550"; |
| 118 | reg = <4600 100>; |
| 119 | clock-frequency = <0>; |
| 120 | interrupts = <1a 2>; |
| 121 | interrupt-parent = <&mpic>; |
| 122 | }; |
| 123 | |
| 124 | mpic: pic@40000 { |
| 125 | clock-frequency = <0>; |
| 126 | interrupt-controller; |
| 127 | #address-cells = <0>; |
| 128 | #interrupt-cells = <2>; |
| 129 | reg = <40000 40000>; |
| 130 | built-in; |
| 131 | compatible = "chrp,open-pic"; |
| 132 | device_type = "open-pic"; |
| 133 | big-endian; |
| 134 | }; |
| 135 | }; |
| 136 | }; |