Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 1 | /* |
| 2 | * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC |
| 3 | * |
| 4 | * Copyright (C) 2011 Atmel, |
| 5 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, |
| 6 | * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 7 | * |
| 8 | * Licensed under GPLv2 or later. |
| 9 | */ |
| 10 | |
| 11 | /include/ "skeleton.dtsi" |
| 12 | |
| 13 | / { |
| 14 | model = "Atmel AT91SAM9260 family SoC"; |
| 15 | compatible = "atmel,at91sam9260"; |
| 16 | interrupt-parent = <&aic>; |
| 17 | |
| 18 | aliases { |
| 19 | serial0 = &dbgu; |
| 20 | serial1 = &usart0; |
| 21 | serial2 = &usart1; |
| 22 | serial3 = &usart2; |
| 23 | serial4 = &usart3; |
| 24 | serial5 = &usart4; |
| 25 | serial6 = &usart5; |
| 26 | gpio0 = &pioA; |
| 27 | gpio1 = &pioB; |
| 28 | gpio2 = &pioC; |
| 29 | tcb0 = &tcb0; |
| 30 | tcb1 = &tcb1; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 31 | i2c0 = &i2c0; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 32 | }; |
| 33 | cpus { |
| 34 | cpu@0 { |
| 35 | compatible = "arm,arm926ejs"; |
| 36 | }; |
| 37 | }; |
| 38 | |
| 39 | memory { |
| 40 | reg = <0x20000000 0x04000000>; |
| 41 | }; |
| 42 | |
| 43 | ahb { |
| 44 | compatible = "simple-bus"; |
| 45 | #address-cells = <1>; |
| 46 | #size-cells = <1>; |
| 47 | ranges; |
| 48 | |
| 49 | apb { |
| 50 | compatible = "simple-bus"; |
| 51 | #address-cells = <1>; |
| 52 | #size-cells = <1>; |
| 53 | ranges; |
| 54 | |
| 55 | aic: interrupt-controller@fffff000 { |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 56 | #interrupt-cells = <3>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 57 | compatible = "atmel,at91rm9200-aic"; |
| 58 | interrupt-controller; |
| 59 | reg = <0xfffff000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | c657394 | 2012-04-09 19:36:36 +0800 | [diff] [blame] | 60 | atmel,external-irqs = <29 30 31>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 61 | }; |
| 62 | |
| 63 | ramc0: ramc@ffffea00 { |
| 64 | compatible = "atmel,at91sam9260-sdramc"; |
| 65 | reg = <0xffffea00 0x200>; |
| 66 | }; |
| 67 | |
| 68 | pmc: pmc@fffffc00 { |
| 69 | compatible = "atmel,at91rm9200-pmc"; |
| 70 | reg = <0xfffffc00 0x100>; |
| 71 | }; |
| 72 | |
| 73 | rstc@fffffd00 { |
| 74 | compatible = "atmel,at91sam9260-rstc"; |
| 75 | reg = <0xfffffd00 0x10>; |
| 76 | }; |
| 77 | |
| 78 | shdwc@fffffd10 { |
| 79 | compatible = "atmel,at91sam9260-shdwc"; |
| 80 | reg = <0xfffffd10 0x10>; |
| 81 | }; |
| 82 | |
| 83 | pit: timer@fffffd30 { |
| 84 | compatible = "atmel,at91sam9260-pit"; |
| 85 | reg = <0xfffffd30 0xf>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 86 | interrupts = <1 4 7>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 87 | }; |
| 88 | |
| 89 | tcb0: timer@fffa0000 { |
| 90 | compatible = "atmel,at91rm9200-tcb"; |
| 91 | reg = <0xfffa0000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 92 | interrupts = <17 4 0 18 4 0 19 4 0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | tcb1: timer@fffdc000 { |
| 96 | compatible = "atmel,at91rm9200-tcb"; |
| 97 | reg = <0xfffdc000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 98 | interrupts = <26 4 0 27 4 0 28 4 0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 99 | }; |
| 100 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 101 | pinctrl@fffff400 { |
| 102 | #address-cells = <1>; |
| 103 | #size-cells = <1>; |
| 104 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; |
| 105 | ranges = <0xfffff400 0xfffff400 0x600>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 106 | |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 107 | atmel,mux-mask = < |
| 108 | /* A B */ |
| 109 | 0xffffffff 0xffc00c3b /* pioA */ |
| 110 | 0xffffffff 0x7fff3ccf /* pioB */ |
| 111 | 0xffffffff 0x007fffff /* pioC */ |
| 112 | >; |
| 113 | |
| 114 | /* shared pinctrl settings */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 115 | dbgu { |
| 116 | pinctrl_dbgu: dbgu-0 { |
| 117 | atmel,pins = |
| 118 | <1 14 0x1 0x0 /* PB14 periph A */ |
| 119 | 1 15 0x1 0x1>; /* PB15 periph with pullup */ |
| 120 | }; |
| 121 | }; |
| 122 | |
| 123 | uart0 { |
| 124 | pinctrl_uart0: uart0-0 { |
| 125 | atmel,pins = |
| 126 | <1 4 0x1 0x0 /* PB4 periph A */ |
| 127 | 1 5 0x1 0x0>; /* PB5 periph A */ |
| 128 | }; |
| 129 | |
| 130 | pinctrl_uart0_rts_cts: uart0_rts_cts-0 { |
| 131 | atmel,pins = |
| 132 | <1 26 0x1 0x0 /* PB26 periph A */ |
| 133 | 1 27 0x1 0x0>; /* PB27 periph A */ |
| 134 | }; |
| 135 | |
| 136 | pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 { |
| 137 | atmel,pins = |
| 138 | <1 24 0x1 0x0 /* PB24 periph A */ |
| 139 | 1 22 0x1 0x0>; /* PB22 periph A */ |
| 140 | }; |
| 141 | |
| 142 | pinctrl_uart0_dcd: uart0_dcd-0 { |
| 143 | atmel,pins = |
| 144 | <1 23 0x1 0x0>; /* PB23 periph A */ |
| 145 | }; |
| 146 | |
| 147 | pinctrl_uart0_ri: uart0_ri-0 { |
| 148 | atmel,pins = |
| 149 | <1 25 0x1 0x0>; /* PB25 periph A */ |
| 150 | }; |
| 151 | }; |
| 152 | |
| 153 | uart1 { |
| 154 | pinctrl_uart1: uart1-0 { |
| 155 | atmel,pins = |
| 156 | <2 6 0x1 0x1 /* PB6 periph A with pullup */ |
| 157 | 2 7 0x1 0x0>; /* PB7 periph A */ |
| 158 | }; |
| 159 | |
| 160 | pinctrl_uart1_rts_cts: uart1_rts_cts-0 { |
| 161 | atmel,pins = |
| 162 | <1 28 0x1 0x0 /* PB28 periph A */ |
| 163 | 1 29 0x1 0x0>; /* PB29 periph A */ |
| 164 | }; |
| 165 | }; |
| 166 | |
| 167 | uart2 { |
| 168 | pinctrl_uart2: uart2-0 { |
| 169 | atmel,pins = |
| 170 | <1 8 0x1 0x1 /* PB8 periph A with pullup */ |
| 171 | 1 9 0x1 0x0>; /* PB9 periph A */ |
| 172 | }; |
| 173 | |
| 174 | pinctrl_uart2_rts_cts: uart2_rts_cts-0 { |
| 175 | atmel,pins = |
| 176 | <0 4 0x1 0x0 /* PA4 periph A */ |
| 177 | 0 5 0x1 0x0>; /* PA5 periph A */ |
| 178 | }; |
| 179 | }; |
| 180 | |
| 181 | uart3 { |
| 182 | pinctrl_uart3: uart3-0 { |
| 183 | atmel,pins = |
| 184 | <2 10 0x1 0x1 /* PB10 periph A with pullup */ |
| 185 | 2 11 0x1 0x0>; /* PB11 periph A */ |
| 186 | }; |
| 187 | |
| 188 | pinctrl_uart3_rts_cts: uart3_rts_cts-0 { |
| 189 | atmel,pins = |
| 190 | <3 8 0x2 0x0 /* PB8 periph B */ |
| 191 | 3 10 0x2 0x0>; /* PB10 periph B */ |
| 192 | }; |
| 193 | }; |
| 194 | |
| 195 | uart4 { |
| 196 | pinctrl_uart4: uart4-0 { |
| 197 | atmel,pins = |
| 198 | <0 31 0x2 0x1 /* PA31 periph B with pullup */ |
| 199 | 0 30 0x2 0x0>; /* PA30 periph B */ |
| 200 | }; |
| 201 | }; |
| 202 | |
| 203 | uart5 { |
| 204 | pinctrl_uart5: uart5-0 { |
| 205 | atmel,pins = |
| 206 | <2 12 0x1 0x1 /* PB12 periph A with pullup */ |
| 207 | 2 13 0x1 0x0>; /* PB13 periph A */ |
| 208 | }; |
| 209 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 210 | |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 211 | nand { |
| 212 | pinctrl_nand: nand-0 { |
| 213 | atmel,pins = |
| 214 | <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */ |
| 215 | 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ |
| 216 | }; |
| 217 | }; |
| 218 | |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame^] | 219 | macb { |
| 220 | pinctrl_macb_rmii: macb_rmii-0 { |
| 221 | atmel,pins = |
| 222 | <0 12 0x1 0x0 /* PA12 periph A */ |
| 223 | 0 13 0x1 0x0 /* PA13 periph A */ |
| 224 | 0 14 0x1 0x0 /* PA14 periph A */ |
| 225 | 0 15 0x1 0x0 /* PA15 periph A */ |
| 226 | 0 16 0x1 0x0 /* PA16 periph A */ |
| 227 | 0 17 0x1 0x0 /* PA17 periph A */ |
| 228 | 0 18 0x1 0x0 /* PA18 periph A */ |
| 229 | 0 19 0x1 0x0 /* PA19 periph A */ |
| 230 | 0 20 0x1 0x0 /* PA20 periph A */ |
| 231 | 0 21 0x1 0x0>; /* PA21 periph A */ |
| 232 | }; |
| 233 | |
| 234 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
| 235 | atmel,pins = |
| 236 | <0 22 0x2 0x0 /* PA22 periph B */ |
| 237 | 0 23 0x2 0x0 /* PA23 periph B */ |
| 238 | 0 24 0x2 0x0 /* PA24 periph B */ |
| 239 | 0 25 0x2 0x0 /* PA25 periph B */ |
| 240 | 0 26 0x2 0x0 /* PA26 periph B */ |
| 241 | 0 27 0x2 0x0 /* PA27 periph B */ |
| 242 | 0 28 0x2 0x0 /* PA28 periph B */ |
| 243 | 0 29 0x2 0x0>; /* PA29 periph B */ |
| 244 | }; |
| 245 | |
| 246 | pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { |
| 247 | atmel,pins = |
| 248 | <0 10 0x2 0x0 /* PA10 periph B */ |
| 249 | 0 11 0x2 0x0 /* PA11 periph B */ |
| 250 | 0 24 0x2 0x0 /* PA24 periph B */ |
| 251 | 0 25 0x2 0x0 /* PA25 periph B */ |
| 252 | 0 26 0x2 0x0 /* PA26 periph B */ |
| 253 | 0 27 0x2 0x0 /* PA27 periph B */ |
| 254 | 0 28 0x2 0x0 /* PA28 periph B */ |
| 255 | 0 29 0x2 0x0>; /* PA29 periph B */ |
| 256 | }; |
| 257 | }; |
| 258 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 259 | pioA: gpio@fffff400 { |
| 260 | compatible = "atmel,at91rm9200-gpio"; |
| 261 | reg = <0xfffff400 0x200>; |
| 262 | interrupts = <2 4 1>; |
| 263 | #gpio-cells = <2>; |
| 264 | gpio-controller; |
| 265 | interrupt-controller; |
| 266 | #interrupt-cells = <2>; |
| 267 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 268 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 269 | pioB: gpio@fffff600 { |
| 270 | compatible = "atmel,at91rm9200-gpio"; |
| 271 | reg = <0xfffff600 0x200>; |
| 272 | interrupts = <3 4 1>; |
| 273 | #gpio-cells = <2>; |
| 274 | gpio-controller; |
| 275 | interrupt-controller; |
| 276 | #interrupt-cells = <2>; |
| 277 | }; |
| 278 | |
| 279 | pioC: gpio@fffff800 { |
| 280 | compatible = "atmel,at91rm9200-gpio"; |
| 281 | reg = <0xfffff800 0x200>; |
| 282 | interrupts = <4 4 1>; |
| 283 | #gpio-cells = <2>; |
| 284 | gpio-controller; |
| 285 | interrupt-controller; |
| 286 | #interrupt-cells = <2>; |
| 287 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 288 | }; |
| 289 | |
| 290 | dbgu: serial@fffff200 { |
| 291 | compatible = "atmel,at91sam9260-usart"; |
| 292 | reg = <0xfffff200 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 293 | interrupts = <1 4 7>; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 294 | pinctrl-names = "default"; |
| 295 | pinctrl-0 = <&pinctrl_dbgu>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 296 | status = "disabled"; |
| 297 | }; |
| 298 | |
| 299 | usart0: serial@fffb0000 { |
| 300 | compatible = "atmel,at91sam9260-usart"; |
| 301 | reg = <0xfffb0000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 302 | interrupts = <6 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 303 | atmel,use-dma-rx; |
| 304 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 305 | pinctrl-names = "default"; |
| 306 | pinctrl-0 = <&pinctrl_uart0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 307 | status = "disabled"; |
| 308 | }; |
| 309 | |
| 310 | usart1: serial@fffb4000 { |
| 311 | compatible = "atmel,at91sam9260-usart"; |
| 312 | reg = <0xfffb4000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 313 | interrupts = <7 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 314 | atmel,use-dma-rx; |
| 315 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 316 | pinctrl-names = "default"; |
| 317 | pinctrl-0 = <&pinctrl_uart1>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 318 | status = "disabled"; |
| 319 | }; |
| 320 | |
| 321 | usart2: serial@fffb8000 { |
| 322 | compatible = "atmel,at91sam9260-usart"; |
| 323 | reg = <0xfffb8000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 324 | interrupts = <8 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 325 | atmel,use-dma-rx; |
| 326 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 327 | pinctrl-names = "default"; |
| 328 | pinctrl-0 = <&pinctrl_uart2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 329 | status = "disabled"; |
| 330 | }; |
| 331 | |
| 332 | usart3: serial@fffd0000 { |
| 333 | compatible = "atmel,at91sam9260-usart"; |
| 334 | reg = <0xfffd0000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 335 | interrupts = <23 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 336 | atmel,use-dma-rx; |
| 337 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 338 | pinctrl-names = "default"; |
| 339 | pinctrl-0 = <&pinctrl_uart3>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 340 | status = "disabled"; |
| 341 | }; |
| 342 | |
| 343 | usart4: serial@fffd4000 { |
| 344 | compatible = "atmel,at91sam9260-usart"; |
| 345 | reg = <0xfffd4000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 346 | interrupts = <24 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 347 | atmel,use-dma-rx; |
| 348 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 349 | pinctrl-names = "default"; |
| 350 | pinctrl-0 = <&pinctrl_uart4>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 351 | status = "disabled"; |
| 352 | }; |
| 353 | |
| 354 | usart5: serial@fffd8000 { |
| 355 | compatible = "atmel,at91sam9260-usart"; |
| 356 | reg = <0xfffd8000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 357 | interrupts = <25 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 358 | atmel,use-dma-rx; |
| 359 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 360 | pinctrl-names = "default"; |
| 361 | pinctrl-0 = <&pinctrl_uart5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 362 | status = "disabled"; |
| 363 | }; |
| 364 | |
| 365 | macb0: ethernet@fffc4000 { |
| 366 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| 367 | reg = <0xfffc4000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 368 | interrupts = <21 4 3>; |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame^] | 369 | pinctrl-names = "default"; |
| 370 | pinctrl-0 = <&pinctrl_macb_rmii>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 371 | status = "disabled"; |
| 372 | }; |
| 373 | |
| 374 | usb1: gadget@fffa4000 { |
| 375 | compatible = "atmel,at91rm9200-udc"; |
| 376 | reg = <0xfffa4000 0x4000>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 377 | interrupts = <10 4 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 378 | status = "disabled"; |
| 379 | }; |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 380 | |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 381 | i2c0: i2c@fffac000 { |
| 382 | compatible = "atmel,at91sam9260-i2c"; |
| 383 | reg = <0xfffac000 0x100>; |
| 384 | interrupts = <11 4 6>; |
| 385 | #address-cells = <1>; |
| 386 | #size-cells = <0>; |
| 387 | status = "disabled"; |
| 388 | }; |
| 389 | |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 390 | adc0: adc@fffe0000 { |
| 391 | compatible = "atmel,at91sam9260-adc"; |
| 392 | reg = <0xfffe0000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 393 | interrupts = <5 4 0>; |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 394 | atmel,adc-use-external-triggers; |
| 395 | atmel,adc-channels-used = <0xf>; |
| 396 | atmel,adc-vref = <3300>; |
| 397 | atmel,adc-num-channels = <4>; |
| 398 | atmel,adc-startup-time = <15>; |
| 399 | atmel,adc-channel-base = <0x30>; |
| 400 | atmel,adc-drdy-mask = <0x10000>; |
| 401 | atmel,adc-status-register = <0x1c>; |
| 402 | atmel,adc-trigger-register = <0x04>; |
| 403 | |
| 404 | trigger@0 { |
| 405 | trigger-name = "timer-counter-0"; |
| 406 | trigger-value = <0x1>; |
| 407 | }; |
| 408 | trigger@1 { |
| 409 | trigger-name = "timer-counter-1"; |
| 410 | trigger-value = <0x3>; |
| 411 | }; |
| 412 | |
| 413 | trigger@2 { |
| 414 | trigger-name = "timer-counter-2"; |
| 415 | trigger-value = <0x5>; |
| 416 | }; |
| 417 | |
| 418 | trigger@3 { |
| 419 | trigger-name = "external"; |
| 420 | trigger-value = <0x13>; |
| 421 | trigger-external; |
| 422 | }; |
| 423 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 424 | }; |
| 425 | |
| 426 | nand0: nand@40000000 { |
| 427 | compatible = "atmel,at91rm9200-nand"; |
| 428 | #address-cells = <1>; |
| 429 | #size-cells = <1>; |
| 430 | reg = <0x40000000 0x10000000 |
| 431 | 0xffffe800 0x200 |
| 432 | >; |
| 433 | atmel,nand-addr-offset = <21>; |
| 434 | atmel,nand-cmd-offset = <22>; |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 435 | pinctrl-names = "default"; |
| 436 | pinctrl-0 = <&pinctrl_nand>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 437 | gpios = <&pioC 13 0 |
| 438 | &pioC 14 0 |
| 439 | 0 |
| 440 | >; |
| 441 | status = "disabled"; |
| 442 | }; |
| 443 | |
| 444 | usb0: ohci@00500000 { |
| 445 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| 446 | reg = <0x00500000 0x100000>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 447 | interrupts = <20 4 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 448 | status = "disabled"; |
| 449 | }; |
| 450 | }; |
| 451 | |
| 452 | i2c@0 { |
| 453 | compatible = "i2c-gpio"; |
| 454 | gpios = <&pioA 23 0 /* sda */ |
| 455 | &pioA 24 0 /* scl */ |
| 456 | >; |
| 457 | i2c-gpio,sda-open-drain; |
| 458 | i2c-gpio,scl-open-drain; |
| 459 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| 460 | #address-cells = <1>; |
| 461 | #size-cells = <0>; |
| 462 | status = "disabled"; |
| 463 | }; |
| 464 | }; |