Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | * Driver for Solarflare Solarstorm network controllers and boards |
| 3 | * Copyright 2006-2008 Solarflare Communications Inc. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published |
| 7 | * by the Free Software Foundation, incorporated herein by reference. |
| 8 | */ |
| 9 | /* |
| 10 | * Useful functions for working with MDIO clause 45 PHYs |
| 11 | */ |
| 12 | #include <linux/types.h> |
| 13 | #include <linux/ethtool.h> |
| 14 | #include <linux/delay.h> |
| 15 | #include "net_driver.h" |
| 16 | #include "mdio_10g.h" |
| 17 | #include "boards.h" |
Steve Hodgson | 8b9dc8d | 2009-01-29 17:49:09 +0000 | [diff] [blame] | 18 | #include "workarounds.h" |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 19 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 20 | unsigned efx_mdio_id_oui(u32 id) |
Ben Hutchings | 3f39a5e | 2009-02-27 13:07:15 +0000 | [diff] [blame] | 21 | { |
| 22 | unsigned oui = 0; |
| 23 | int i; |
| 24 | |
| 25 | /* The bits of the OUI are designated a..x, with a=0 and b variable. |
| 26 | * In the id register c is the MSB but the OUI is conventionally |
| 27 | * written as bytes h..a, p..i, x..q. Reorder the bits accordingly. */ |
| 28 | for (i = 0; i < 22; ++i) |
| 29 | if (id & (1 << (i + 10))) |
| 30 | oui |= 1 << (i ^ 7); |
| 31 | |
| 32 | return oui; |
| 33 | } |
| 34 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 35 | int efx_mdio_reset_mmd(struct efx_nic *port, int mmd, |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 36 | int spins, int spintime) |
| 37 | { |
| 38 | u32 ctrl; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 39 | |
| 40 | /* Catch callers passing values in the wrong units (or just silly) */ |
| 41 | EFX_BUG_ON_PARANOID(spins * spintime >= 5000); |
| 42 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 43 | efx_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 44 | /* Wait for the reset bit to clear. */ |
| 45 | do { |
| 46 | msleep(spintime); |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 47 | ctrl = efx_mdio_read(port, mmd, MDIO_CTRL1); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 48 | spins--; |
| 49 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 50 | } while (spins && (ctrl & MDIO_CTRL1_RESET)); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 51 | |
| 52 | return spins ? spins : -ETIMEDOUT; |
| 53 | } |
| 54 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 55 | static int efx_mdio_check_mmd(struct efx_nic *efx, int mmd, int fault_fatal) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 56 | { |
| 57 | int status; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 58 | |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 59 | if (LOOPBACK_INTERNAL(efx)) |
| 60 | return 0; |
| 61 | |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 62 | if (mmd != MDIO_MMD_AN) { |
| 63 | /* Read MMD STATUS2 to check it is responding. */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 64 | status = efx_mdio_read(efx, mmd, MDIO_STAT2); |
| 65 | if ((status & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL) { |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 66 | EFX_ERR(efx, "PHY MMD %d not responding.\n", mmd); |
| 67 | return -EIO; |
| 68 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 69 | } |
| 70 | |
| 71 | /* Read MMD STATUS 1 to check for fault. */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 72 | status = efx_mdio_read(efx, mmd, MDIO_STAT1); |
| 73 | if (status & MDIO_STAT1_FAULT) { |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 74 | if (fault_fatal) { |
| 75 | EFX_ERR(efx, "PHY MMD %d reporting fatal" |
| 76 | " fault: status %x\n", mmd, status); |
| 77 | return -EIO; |
| 78 | } else { |
| 79 | EFX_LOG(efx, "PHY MMD %d reporting status" |
| 80 | " %x (expected)\n", mmd, status); |
| 81 | } |
| 82 | } |
| 83 | return 0; |
| 84 | } |
| 85 | |
| 86 | /* This ought to be ridiculous overkill. We expect it to fail rarely */ |
| 87 | #define MDIO45_RESET_TIME 1000 /* ms */ |
| 88 | #define MDIO45_RESET_ITERS 100 |
| 89 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 90 | int efx_mdio_wait_reset_mmds(struct efx_nic *efx, unsigned int mmd_mask) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 91 | { |
| 92 | const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS; |
| 93 | int tries = MDIO45_RESET_ITERS; |
| 94 | int rc = 0; |
| 95 | int in_reset; |
| 96 | |
| 97 | while (tries) { |
| 98 | int mask = mmd_mask; |
| 99 | int mmd = 0; |
| 100 | int stat; |
| 101 | in_reset = 0; |
| 102 | while (mask) { |
| 103 | if (mask & 1) { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 104 | stat = efx_mdio_read(efx, mmd, MDIO_CTRL1); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 105 | if (stat < 0) { |
| 106 | EFX_ERR(efx, "failed to read status of" |
| 107 | " MMD %d\n", mmd); |
| 108 | return -EIO; |
| 109 | } |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 110 | if (stat & MDIO_CTRL1_RESET) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 111 | in_reset |= (1 << mmd); |
| 112 | } |
| 113 | mask = mask >> 1; |
| 114 | mmd++; |
| 115 | } |
| 116 | if (!in_reset) |
| 117 | break; |
| 118 | tries--; |
| 119 | msleep(spintime); |
| 120 | } |
| 121 | if (in_reset != 0) { |
| 122 | EFX_ERR(efx, "not all MMDs came out of reset in time." |
| 123 | " MMDs still in reset: %x\n", in_reset); |
| 124 | rc = -ETIMEDOUT; |
| 125 | } |
| 126 | return rc; |
| 127 | } |
| 128 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 129 | int efx_mdio_check_mmds(struct efx_nic *efx, |
| 130 | unsigned int mmd_mask, unsigned int fatal_mask) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 131 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 132 | int mmd = 0, probe_mmd, devs1, devs2; |
Ben Hutchings | 27dd2ca | 2008-12-12 21:44:14 -0800 | [diff] [blame] | 133 | u32 devices; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 134 | |
| 135 | /* Historically we have probed the PHYXS to find out what devices are |
| 136 | * present,but that doesn't work so well if the PHYXS isn't expected |
| 137 | * to exist, if so just find the first item in the list supplied. */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 138 | probe_mmd = (mmd_mask & MDIO_DEVS_PHYXS) ? MDIO_MMD_PHYXS : |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 139 | __ffs(mmd_mask); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 140 | |
| 141 | /* Check all the expected MMDs are present */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 142 | devs1 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS1); |
| 143 | devs2 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS2); |
| 144 | if (devs1 < 0 || devs2 < 0) { |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 145 | EFX_ERR(efx, "failed to read devices present\n"); |
| 146 | return -EIO; |
| 147 | } |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 148 | devices = devs1 | (devs2 << 16); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 149 | if ((devices & mmd_mask) != mmd_mask) { |
| 150 | EFX_ERR(efx, "required MMDs not present: got %x, " |
| 151 | "wanted %x\n", devices, mmd_mask); |
| 152 | return -ENODEV; |
| 153 | } |
| 154 | EFX_TRACE(efx, "Devices present: %x\n", devices); |
| 155 | |
| 156 | /* Check all required MMDs are responding and happy. */ |
| 157 | while (mmd_mask) { |
| 158 | if (mmd_mask & 1) { |
| 159 | int fault_fatal = fatal_mask & 1; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 160 | if (efx_mdio_check_mmd(efx, mmd, fault_fatal)) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 161 | return -EIO; |
| 162 | } |
| 163 | mmd_mask = mmd_mask >> 1; |
| 164 | fatal_mask = fatal_mask >> 1; |
| 165 | mmd++; |
| 166 | } |
| 167 | |
| 168 | return 0; |
| 169 | } |
| 170 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 171 | bool efx_mdio_links_ok(struct efx_nic *efx, unsigned int mmd_mask) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 172 | { |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 173 | /* If the port is in loopback, then we should only consider a subset |
| 174 | * of mmd's */ |
| 175 | if (LOOPBACK_INTERNAL(efx)) |
Ben Hutchings | dc8cfa5 | 2008-09-01 12:46:50 +0100 | [diff] [blame] | 176 | return true; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 177 | else if (efx->loopback_mode == LOOPBACK_NETWORK) |
Ben Hutchings | dc8cfa5 | 2008-09-01 12:46:50 +0100 | [diff] [blame] | 178 | return false; |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 179 | else if (efx_phy_mode_disabled(efx->phy_mode)) |
| 180 | return false; |
Steve Hodgson | 6779776 | 2009-01-29 17:51:15 +0000 | [diff] [blame] | 181 | else if (efx->loopback_mode == LOOPBACK_PHYXS) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 182 | mmd_mask &= ~(MDIO_DEVS_PHYXS | |
| 183 | MDIO_DEVS_PCS | |
| 184 | MDIO_DEVS_PMAPMD | |
| 185 | MDIO_DEVS_AN); |
Steve Hodgson | 6779776 | 2009-01-29 17:51:15 +0000 | [diff] [blame] | 186 | else if (efx->loopback_mode == LOOPBACK_PCS) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 187 | mmd_mask &= ~(MDIO_DEVS_PCS | |
| 188 | MDIO_DEVS_PMAPMD | |
| 189 | MDIO_DEVS_AN); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 190 | else if (efx->loopback_mode == LOOPBACK_PMAPMD) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 191 | mmd_mask &= ~(MDIO_DEVS_PMAPMD | |
| 192 | MDIO_DEVS_AN); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 193 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 194 | return mdio45_links_ok(&efx->mdio, mmd_mask); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 195 | } |
| 196 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 197 | void efx_mdio_transmit_disable(struct efx_nic *efx) |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 198 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 199 | efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, |
| 200 | MDIO_PMA_TXDIS, MDIO_PMD_TXDIS_GLOBAL, |
| 201 | efx->phy_mode & PHY_MODE_TX_DISABLED); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 202 | } |
| 203 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 204 | void efx_mdio_phy_reconfigure(struct efx_nic *efx) |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 205 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 206 | efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, |
| 207 | MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK, |
| 208 | efx->loopback_mode == LOOPBACK_PMAPMD); |
| 209 | efx_mdio_set_flag(efx, MDIO_MMD_PCS, |
| 210 | MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK, |
| 211 | efx->loopback_mode == LOOPBACK_PCS); |
| 212 | efx_mdio_set_flag(efx, MDIO_MMD_PHYXS, |
| 213 | MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK, |
| 214 | efx->loopback_mode == LOOPBACK_NETWORK); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 215 | } |
| 216 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 217 | static void efx_mdio_set_mmd_lpower(struct efx_nic *efx, |
| 218 | int lpower, int mmd) |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 219 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 220 | int stat = efx_mdio_read(efx, mmd, MDIO_STAT1); |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 221 | |
| 222 | EFX_TRACE(efx, "Setting low power mode for MMD %d to %d\n", |
| 223 | mmd, lpower); |
| 224 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 225 | if (stat & MDIO_STAT1_LPOWERABLE) { |
| 226 | efx_mdio_set_flag(efx, mmd, MDIO_CTRL1, |
| 227 | MDIO_CTRL1_LPOWER, lpower); |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 228 | } |
| 229 | } |
| 230 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 231 | void efx_mdio_set_mmds_lpower(struct efx_nic *efx, |
| 232 | int low_power, unsigned int mmd_mask) |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 233 | { |
| 234 | int mmd = 0; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 235 | mmd_mask &= ~MDIO_DEVS_AN; |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 236 | while (mmd_mask) { |
| 237 | if (mmd_mask & 1) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 238 | efx_mdio_set_mmd_lpower(efx, low_power, mmd); |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 239 | mmd_mask = (mmd_mask >> 1); |
| 240 | mmd++; |
| 241 | } |
| 242 | } |
| 243 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 244 | /** |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 245 | * efx_mdio_set_settings - Set (some of) the PHY settings over MDIO. |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 246 | * @efx: Efx NIC |
| 247 | * @ecmd: New settings |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 248 | */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 249 | int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 250 | { |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 251 | struct ethtool_cmd prev; |
| 252 | u32 required; |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 253 | int reg; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 254 | |
| 255 | efx->phy_op->get_settings(efx, &prev); |
| 256 | |
| 257 | if (ecmd->advertising == prev.advertising && |
| 258 | ecmd->speed == prev.speed && |
| 259 | ecmd->duplex == prev.duplex && |
| 260 | ecmd->port == prev.port && |
| 261 | ecmd->autoneg == prev.autoneg) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 262 | return 0; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 263 | |
| 264 | /* We can only change these settings for -T PHYs */ |
| 265 | if (prev.port != PORT_TP || ecmd->port != PORT_TP) |
| 266 | return -EINVAL; |
| 267 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 268 | /* Check that PHY supports these settings */ |
| 269 | if (ecmd->autoneg) { |
| 270 | required = SUPPORTED_Autoneg; |
| 271 | } else if (ecmd->duplex) { |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 272 | switch (ecmd->speed) { |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 273 | case SPEED_10: required = SUPPORTED_10baseT_Full; break; |
| 274 | case SPEED_100: required = SUPPORTED_100baseT_Full; break; |
| 275 | default: return -EINVAL; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 276 | } |
| 277 | } else { |
| 278 | switch (ecmd->speed) { |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 279 | case SPEED_10: required = SUPPORTED_10baseT_Half; break; |
| 280 | case SPEED_100: required = SUPPORTED_100baseT_Half; break; |
| 281 | default: return -EINVAL; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 282 | } |
| 283 | } |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 284 | required |= ecmd->advertising; |
| 285 | if (required & ~prev.supported) |
| 286 | return -EINVAL; |
| 287 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 288 | if (ecmd->autoneg) { |
| 289 | bool xnp = (ecmd->advertising & ADVERTISED_10000baseT_Full |
| 290 | || EFX_WORKAROUND_13204(efx)); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 291 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 292 | /* Set up the base page */ |
| 293 | reg = ADVERTISE_CSMA; |
| 294 | if (ecmd->advertising & ADVERTISED_10baseT_Half) |
| 295 | reg |= ADVERTISE_10HALF; |
| 296 | if (ecmd->advertising & ADVERTISED_10baseT_Full) |
| 297 | reg |= ADVERTISE_10FULL; |
| 298 | if (ecmd->advertising & ADVERTISED_100baseT_Half) |
| 299 | reg |= ADVERTISE_100HALF; |
| 300 | if (ecmd->advertising & ADVERTISED_100baseT_Full) |
| 301 | reg |= ADVERTISE_100FULL; |
| 302 | if (xnp) |
| 303 | reg |= ADVERTISE_RESV; |
| 304 | else if (ecmd->advertising & (ADVERTISED_1000baseT_Half | |
| 305 | ADVERTISED_1000baseT_Full)) |
| 306 | reg |= ADVERTISE_NPAGE; |
Ben Hutchings | 3f926da | 2009-04-29 08:20:37 +0000 | [diff] [blame] | 307 | reg |= mii_advertise_flowctrl(efx->wanted_fc); |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 308 | efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 309 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 310 | /* Set up the (extended) next page if necessary */ |
| 311 | if (efx->phy_op->set_npage_adv) |
| 312 | efx->phy_op->set_npage_adv(efx, ecmd->advertising); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 313 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 314 | /* Enable and restart AN */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 315 | reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1); |
| 316 | reg |= MDIO_AN_CTRL1_ENABLE; |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 317 | if (!(EFX_WORKAROUND_15195(efx) && |
| 318 | LOOPBACK_MASK(efx) & efx->phy_op->loopbacks)) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 319 | reg |= MDIO_AN_CTRL1_RESTART; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 320 | if (xnp) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 321 | reg |= MDIO_AN_CTRL1_XNP; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 322 | else |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 323 | reg &= ~MDIO_AN_CTRL1_XNP; |
| 324 | efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg); |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 325 | } else { |
| 326 | /* Disable AN */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 327 | efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_CTRL1, |
| 328 | MDIO_AN_CTRL1_ENABLE, false); |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 329 | |
| 330 | /* Set the basic control bits */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 331 | reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1); |
| 332 | reg &= ~(MDIO_CTRL1_SPEEDSEL | MDIO_CTRL1_FULLDPLX); |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 333 | if (ecmd->speed == SPEED_100) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 334 | reg |= MDIO_PMA_CTRL1_SPEED100; |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 335 | if (ecmd->duplex) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 336 | reg |= MDIO_CTRL1_FULLDPLX; |
| 337 | efx_mdio_write(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1, reg); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 338 | } |
| 339 | |
| 340 | return 0; |
| 341 | } |
| 342 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 343 | enum efx_fc_type efx_mdio_get_pause(struct efx_nic *efx) |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 344 | { |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 345 | int lpa; |
| 346 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 347 | if (!(efx->phy_op->mmds & MDIO_DEVS_AN)) |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 348 | return efx->wanted_fc; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 349 | lpa = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 350 | return efx_fc_resolve(efx->wanted_fc, lpa); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 351 | } |