blob: bf01a24f21ce44fa59badfedbbff18feeeb82149 [file] [log] [blame]
Russell King98601182017-03-21 16:36:37 +00001/*
2 * Core PHY library, taken from phy.c
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9#include <linux/export.h>
10#include <linux/phy.h>
11
Russell Kingda4625a2017-07-25 15:02:42 +010012const char *phy_speed_to_str(int speed)
13{
14 switch (speed) {
15 case SPEED_10:
16 return "10Mbps";
17 case SPEED_100:
18 return "100Mbps";
19 case SPEED_1000:
20 return "1Gbps";
21 case SPEED_2500:
22 return "2.5Gbps";
23 case SPEED_5000:
24 return "5Gbps";
25 case SPEED_10000:
26 return "10Gbps";
27 case SPEED_14000:
28 return "14Gbps";
29 case SPEED_20000:
30 return "20Gbps";
31 case SPEED_25000:
32 return "25Gbps";
33 case SPEED_40000:
34 return "40Gbps";
35 case SPEED_50000:
36 return "50Gbps";
37 case SPEED_56000:
38 return "56Gbps";
39 case SPEED_100000:
40 return "100Gbps";
41 case SPEED_UNKNOWN:
42 return "Unknown";
43 default:
44 return "Unsupported (update phy-core.c)";
45 }
46}
47EXPORT_SYMBOL_GPL(phy_speed_to_str);
48
49const char *phy_duplex_to_str(unsigned int duplex)
50{
51 if (duplex == DUPLEX_HALF)
52 return "Half";
53 if (duplex == DUPLEX_FULL)
54 return "Full";
55 if (duplex == DUPLEX_UNKNOWN)
56 return "Unknown";
57 return "Unsupported (update phy-core.c)";
58}
59EXPORT_SYMBOL_GPL(phy_duplex_to_str);
60
Russell King060fbc82017-03-21 16:37:08 +000061static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
62 u16 regnum)
Russell King98601182017-03-21 16:36:37 +000063{
64 /* Write the desired MMD Devad */
Russell King060fbc82017-03-21 16:37:08 +000065 bus->write(bus, phy_addr, MII_MMD_CTRL, devad);
Russell King98601182017-03-21 16:36:37 +000066
67 /* Write the desired MMD register address */
Russell King060fbc82017-03-21 16:37:08 +000068 bus->write(bus, phy_addr, MII_MMD_DATA, regnum);
Russell King98601182017-03-21 16:36:37 +000069
70 /* Select the Function : DATA with no post increment */
Russell King060fbc82017-03-21 16:37:08 +000071 bus->write(bus, phy_addr, MII_MMD_CTRL, devad | MII_MMD_CTRL_NOINCR);
Russell King98601182017-03-21 16:36:37 +000072}
73
74/**
Russell King98601182017-03-21 16:36:37 +000075 * phy_read_mmd - Convenience function for reading a register
76 * from an MMD on a given PHY.
77 * @phydev: The phy_device struct
Russell King3b85d8d2017-03-21 16:37:03 +000078 * @devad: The MMD to read from (0..31)
79 * @regnum: The register on the MMD to read (0..65535)
Russell King98601182017-03-21 16:36:37 +000080 *
81 * Same rules as for phy_read();
82 */
83int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
84{
Russell King3b85d8d2017-03-21 16:37:03 +000085 int val;
86
Russell King1ee6b9b2017-03-21 16:36:43 +000087 if (regnum > (u16)~0 || devad > 32)
88 return -EINVAL;
Russell King98601182017-03-21 16:36:37 +000089
Russell King3b85d8d2017-03-21 16:37:03 +000090 if (phydev->drv->read_mmd) {
91 val = phydev->drv->read_mmd(phydev, devad, regnum);
92 } else if (phydev->is_c45) {
Russell King1ee6b9b2017-03-21 16:36:43 +000093 u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff);
Russell King1ee6b9b2017-03-21 16:36:43 +000094
Russell King3b85d8d2017-03-21 16:37:03 +000095 val = mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, addr);
96 } else {
Russell King98601182017-03-21 16:36:37 +000097 struct mii_bus *bus = phydev->mdio.bus;
Russell King3b85d8d2017-03-21 16:37:03 +000098 int phy_addr = phydev->mdio.addr;
Russell King98601182017-03-21 16:36:37 +000099
100 mutex_lock(&bus->mdio_lock);
Russell King060fbc82017-03-21 16:37:08 +0000101 mmd_phy_indirect(bus, phy_addr, devad, regnum);
Russell King98601182017-03-21 16:36:37 +0000102
Russell King3b85d8d2017-03-21 16:37:03 +0000103 /* Read the content of the MMD's selected register */
104 val = bus->read(bus, phy_addr, MII_MMD_DATA);
Russell King98601182017-03-21 16:36:37 +0000105 mutex_unlock(&bus->mdio_lock);
Russell King98601182017-03-21 16:36:37 +0000106 }
Russell King3b85d8d2017-03-21 16:37:03 +0000107 return val;
Russell King98601182017-03-21 16:36:37 +0000108}
Russell King3b85d8d2017-03-21 16:37:03 +0000109EXPORT_SYMBOL(phy_read_mmd);
Russell King98601182017-03-21 16:36:37 +0000110
111/**
112 * phy_write_mmd - Convenience function for writing a register
113 * on an MMD on a given PHY.
114 * @phydev: The phy_device struct
115 * @devad: The MMD to read from
116 * @regnum: The register on the MMD to read
117 * @val: value to write to @regnum
118 *
119 * Same rules as for phy_write();
120 */
121int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
122{
Russell King3b85d8d2017-03-21 16:37:03 +0000123 int ret;
124
Russell King1ee6b9b2017-03-21 16:36:43 +0000125 if (regnum > (u16)~0 || devad > 32)
126 return -EINVAL;
Russell King98601182017-03-21 16:36:37 +0000127
Dan Carpenter1dbba4c2017-04-14 22:10:41 +0300128 if (phydev->drv->write_mmd) {
Russell King3b85d8d2017-03-21 16:37:03 +0000129 ret = phydev->drv->write_mmd(phydev, devad, regnum, val);
130 } else if (phydev->is_c45) {
Russell King1ee6b9b2017-03-21 16:36:43 +0000131 u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff);
132
Russell King3b85d8d2017-03-21 16:37:03 +0000133 ret = mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
134 addr, val);
135 } else {
136 struct mii_bus *bus = phydev->mdio.bus;
137 int phy_addr = phydev->mdio.addr;
138
139 mutex_lock(&bus->mdio_lock);
Russell King060fbc82017-03-21 16:37:08 +0000140 mmd_phy_indirect(bus, phy_addr, devad, regnum);
Russell King3b85d8d2017-03-21 16:37:03 +0000141
142 /* Write the data into MMD's selected register */
143 bus->write(bus, phy_addr, MII_MMD_DATA, val);
144 mutex_unlock(&bus->mdio_lock);
145
146 ret = 0;
Russell King1ee6b9b2017-03-21 16:36:43 +0000147 }
Russell King3b85d8d2017-03-21 16:37:03 +0000148 return ret;
Russell King98601182017-03-21 16:36:37 +0000149}
150EXPORT_SYMBOL(phy_write_mmd);