| Kevin Wells | 343d353 | 2010-02-26 15:53:39 -0800 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-lpc32xx/include/mach/entry-macro.S |
| 3 | * |
| 4 | * Author: Kevin Wells <kevin.wells@nxp.com> |
| 5 | * |
| 6 | * Copyright (C) 2010 NXP Semiconductors |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | #include <mach/hardware.h> |
| 20 | #include <mach/platform.h> |
| 21 | |
| 22 | #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 |
| 23 | |
| 24 | .macro disable_fiq |
| 25 | .endm |
| 26 | |
| 27 | .macro get_irqnr_preamble, base, tmp |
| 28 | ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) |
| 29 | .endm |
| 30 | |
| 31 | .macro arch_ret_to_user, tmp1, tmp2 |
| 32 | .endm |
| 33 | |
| 34 | /* |
| 35 | * Return IRQ number in irqnr. Also return processor Z flag status in CPSR |
| 36 | * as set if an interrupt is pending. |
| 37 | */ |
| 38 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| 39 | ldr \irqstat, [\base, #LPC32XX_INTC_MASKED_STATUS_OFS] |
| 40 | clz \irqnr, \irqstat |
| 41 | rsb \irqnr, \irqnr, #31 |
| 42 | teq \irqstat, #0 |
| 43 | .endm |
| 44 | |
| 45 | .macro irq_prio_table |
| 46 | .endm |
| 47 | |