blob: 8377329d8c97a6b9709865f2e448951b22cd2478 [file] [log] [blame]
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +00001/*
2 * Based on arch/arm/mm/flush.c
3 *
4 * Copyright (C) 1995-2002 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/export.h>
21#include <linux/mm.h>
22#include <linux/pagemap.h>
23
24#include <asm/cacheflush.h>
25#include <asm/cachetype.h>
26#include <asm/tlbflush.h>
27
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000028void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
29 unsigned long end)
30{
31 if (vma->vm_flags & VM_EXEC)
32 __flush_icache_all();
33}
34
Ashok Kumar0a287142015-12-17 01:38:32 -080035static void sync_icache_aliases(void *kaddr, unsigned long len)
36{
37 unsigned long addr = (unsigned long)kaddr;
38
39 if (icache_is_aliasing()) {
40 __clean_dcache_area_pou(kaddr, len);
41 __flush_icache_all();
42 } else {
43 flush_icache_range(addr, addr + len);
44 }
45}
46
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000047static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
48 unsigned long uaddr, void *kaddr,
49 unsigned long len)
50{
Ashok Kumar0a287142015-12-17 01:38:32 -080051 if (vma->vm_flags & VM_EXEC)
52 sync_icache_aliases(kaddr, len);
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000053}
54
55/*
56 * Copy user data from/to a page which is mapped into a different processes
57 * address space. Really, we want to allow our "user space" model to handle
58 * this.
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000059 */
60void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
61 unsigned long uaddr, void *dst, const void *src,
62 unsigned long len)
63{
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000064 memcpy(dst, src, len);
65 flush_ptrace_access(vma, page, uaddr, dst, len);
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000066}
67
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000068void __sync_icache_dcache(pte_t pte, unsigned long addr)
69{
Catalin Marinas7249b792013-05-01 16:34:22 +010070 struct page *page = pte_page(pte);
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000071
Ashok Kumar0a287142015-12-17 01:38:32 -080072 if (!test_and_set_bit(PG_dcache_clean, &page->flags))
73 sync_icache_aliases(page_address(page),
74 PAGE_SIZE << compound_order(page));
75 else if (icache_is_aivivt())
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000076 __flush_icache_all();
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000077}
78
79/*
Catalin Marinasb5b6c9e2013-05-01 12:23:05 +010080 * This function is called when a page has been modified by the kernel. Mark
81 * it as dirty for later flushing when mapped in user space (if executable,
82 * see __sync_icache_dcache).
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000083 */
84void flush_dcache_page(struct page *page)
85{
Catalin Marinasb5b6c9e2013-05-01 12:23:05 +010086 if (test_bit(PG_dcache_clean, &page->flags))
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000087 clear_bit(PG_dcache_clean, &page->flags);
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000088}
89EXPORT_SYMBOL(flush_dcache_page);
90
91/*
92 * Additional functions defined in assembly.
93 */
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000094EXPORT_SYMBOL(flush_icache_range);