Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Based on arch/arm/mm/flush.c |
| 3 | * |
| 4 | * Copyright (C) 1995-2002 Russell King |
| 5 | * Copyright (C) 2012 ARM Ltd. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/export.h> |
| 21 | #include <linux/mm.h> |
| 22 | #include <linux/pagemap.h> |
| 23 | |
| 24 | #include <asm/cacheflush.h> |
| 25 | #include <asm/cachetype.h> |
| 26 | #include <asm/tlbflush.h> |
| 27 | |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 28 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, |
| 29 | unsigned long end) |
| 30 | { |
| 31 | if (vma->vm_flags & VM_EXEC) |
| 32 | __flush_icache_all(); |
| 33 | } |
| 34 | |
Ashok Kumar | 0a28714 | 2015-12-17 01:38:32 -0800 | [diff] [blame] | 35 | static void sync_icache_aliases(void *kaddr, unsigned long len) |
| 36 | { |
| 37 | unsigned long addr = (unsigned long)kaddr; |
| 38 | |
| 39 | if (icache_is_aliasing()) { |
| 40 | __clean_dcache_area_pou(kaddr, len); |
| 41 | __flush_icache_all(); |
| 42 | } else { |
| 43 | flush_icache_range(addr, addr + len); |
| 44 | } |
| 45 | } |
| 46 | |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 47 | static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, |
| 48 | unsigned long uaddr, void *kaddr, |
| 49 | unsigned long len) |
| 50 | { |
Ashok Kumar | 0a28714 | 2015-12-17 01:38:32 -0800 | [diff] [blame] | 51 | if (vma->vm_flags & VM_EXEC) |
| 52 | sync_icache_aliases(kaddr, len); |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 53 | } |
| 54 | |
| 55 | /* |
| 56 | * Copy user data from/to a page which is mapped into a different processes |
| 57 | * address space. Really, we want to allow our "user space" model to handle |
| 58 | * this. |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 59 | */ |
| 60 | void copy_to_user_page(struct vm_area_struct *vma, struct page *page, |
| 61 | unsigned long uaddr, void *dst, const void *src, |
| 62 | unsigned long len) |
| 63 | { |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 64 | memcpy(dst, src, len); |
| 65 | flush_ptrace_access(vma, page, uaddr, dst, len); |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 66 | } |
| 67 | |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 68 | void __sync_icache_dcache(pte_t pte, unsigned long addr) |
| 69 | { |
Catalin Marinas | 7249b79 | 2013-05-01 16:34:22 +0100 | [diff] [blame] | 70 | struct page *page = pte_page(pte); |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 71 | |
Ashok Kumar | 0a28714 | 2015-12-17 01:38:32 -0800 | [diff] [blame] | 72 | if (!test_and_set_bit(PG_dcache_clean, &page->flags)) |
| 73 | sync_icache_aliases(page_address(page), |
| 74 | PAGE_SIZE << compound_order(page)); |
| 75 | else if (icache_is_aivivt()) |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 76 | __flush_icache_all(); |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 77 | } |
| 78 | |
| 79 | /* |
Catalin Marinas | b5b6c9e | 2013-05-01 12:23:05 +0100 | [diff] [blame] | 80 | * This function is called when a page has been modified by the kernel. Mark |
| 81 | * it as dirty for later flushing when mapped in user space (if executable, |
| 82 | * see __sync_icache_dcache). |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 83 | */ |
| 84 | void flush_dcache_page(struct page *page) |
| 85 | { |
Catalin Marinas | b5b6c9e | 2013-05-01 12:23:05 +0100 | [diff] [blame] | 86 | if (test_bit(PG_dcache_clean, &page->flags)) |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 87 | clear_bit(PG_dcache_clean, &page->flags); |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 88 | } |
| 89 | EXPORT_SYMBOL(flush_dcache_page); |
| 90 | |
| 91 | /* |
| 92 | * Additional functions defined in assembly. |
| 93 | */ |
Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 94 | EXPORT_SYMBOL(flush_icache_range); |