| Joshua Henderson | 2572f00 | 2016-01-13 18:15:39 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Joshua Henderson <joshua.henderson@microchip.com> |
| 3 | * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. |
| 4 | * |
| 5 | * This program is free software; you can distribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License (Version 2) as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 12 | * for more details. |
| 13 | */ |
| 14 | #ifndef _ASM_MACH_PIC32_H |
| 15 | #define _ASM_MACH_PIC32_H |
| 16 | |
| 17 | #include <linux/io.h> |
| 18 | |
| 19 | /* |
| 20 | * PIC32 register offsets for SET/CLR/INV where supported. |
| 21 | */ |
| 22 | #define PIC32_CLR(_reg) ((_reg) + 0x04) |
| 23 | #define PIC32_SET(_reg) ((_reg) + 0x08) |
| 24 | #define PIC32_INV(_reg) ((_reg) + 0x0C) |
| 25 | |
| 26 | /* |
| 27 | * PIC32 Base Register Offsets |
| 28 | */ |
| 29 | #define PIC32_BASE_CONFIG 0x1f800000 |
| 30 | #define PIC32_BASE_OSC 0x1f801200 |
| 31 | #define PIC32_BASE_RESET 0x1f801240 |
| 32 | #define PIC32_BASE_PPS 0x1f801400 |
| 33 | #define PIC32_BASE_UART 0x1f822000 |
| 34 | #define PIC32_BASE_PORT 0x1f860000 |
| 35 | #define PIC32_BASE_DEVCFG2 0x1fc4ff44 |
| 36 | |
| 37 | /* |
| 38 | * Register unlock sequence required for some register access. |
| 39 | */ |
| 40 | void pic32_syskey_unlock_debug(const char *fn, const ulong ln); |
| 41 | #define pic32_syskey_unlock() \ |
| 42 | pic32_syskey_unlock_debug(__func__, __LINE__) |
| 43 | |
| 44 | #endif /* _ASM_MACH_PIC32_H */ |