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Maxime Ripard9026e0d2015-10-29 09:36:23 +01001/*
2 * Copyright (C) 2015 Free Electrons
3 * Copyright (C) 2015 NextThing Co
4 *
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 */
12
13#include <drm/drmP.h>
14#include <drm/drm_atomic_helper.h>
15#include <drm/drm_crtc.h>
16#include <drm/drm_crtc_helper.h>
17#include <drm/drm_modes.h>
18
19#include <linux/clk-provider.h>
20#include <linux/ioport.h>
21#include <linux/of_address.h>
Chen-Yu Tsai75448602017-02-23 16:05:34 +080022#include <linux/of_graph.h>
Maxime Ripard9026e0d2015-10-29 09:36:23 +010023#include <linux/of_irq.h>
24#include <linux/regmap.h>
25
26#include <video/videomode.h>
27
Maxime Ripardca07b212018-01-22 10:25:23 +010028#include "sun4i_backend.h"
Maxime Ripard9026e0d2015-10-29 09:36:23 +010029#include "sun4i_crtc.h"
30#include "sun4i_drv.h"
Icenowy Zheng87969332017-05-17 22:47:17 +080031#include "sunxi_engine.h"
Maxime Ripard9026e0d2015-10-29 09:36:23 +010032#include "sun4i_tcon.h"
33
Maxime Ripard45e88f92017-10-17 11:06:12 +020034/*
35 * While this isn't really working in the DRM theory, in practice we
36 * can only ever have one encoder per TCON since we have a mux in our
37 * TCON.
38 */
39static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc)
40{
41 struct drm_encoder *encoder;
42
43 drm_for_each_encoder(encoder, crtc->dev)
44 if (encoder->crtc == crtc)
45 return encoder;
46
47 return NULL;
48}
49
Maxime Ripard656e5f62018-01-22 10:25:19 +010050static int sun4i_crtc_atomic_check(struct drm_crtc *crtc,
51 struct drm_crtc_state *state)
52{
53 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
54 struct sunxi_engine *engine = scrtc->engine;
55 int ret = 0;
56
57 if (engine && engine->ops && engine->ops->atomic_check)
58 ret = engine->ops->atomic_check(engine, state);
59
60 return ret;
61}
62
Maxime Ripard9026e0d2015-10-29 09:36:23 +010063static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,
64 struct drm_crtc_state *old_state)
65{
66 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
67 struct drm_device *dev = crtc->dev;
Maxime Ripard6b8562c2018-01-22 10:25:21 +010068 struct sunxi_engine *engine = scrtc->engine;
Maxime Ripard9026e0d2015-10-29 09:36:23 +010069 unsigned long flags;
70
71 if (crtc->state->event) {
72 WARN_ON(drm_crtc_vblank_get(crtc) != 0);
73
74 spin_lock_irqsave(&dev->event_lock, flags);
75 scrtc->event = crtc->state->event;
76 spin_unlock_irqrestore(&dev->event_lock, flags);
77 crtc->state->event = NULL;
Maxime Ripard6b8562c2018-01-22 10:25:21 +010078 }
79
80 if (engine->ops->atomic_begin)
81 engine->ops->atomic_begin(engine, old_state);
Maxime Ripard9026e0d2015-10-29 09:36:23 +010082}
83
84static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc,
85 struct drm_crtc_state *old_state)
86{
87 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Daniel Vettera33e93d2016-06-08 14:18:58 +020088 struct drm_pending_vblank_event *event = crtc->state->event;
Maxime Ripard9026e0d2015-10-29 09:36:23 +010089
90 DRM_DEBUG_DRIVER("Committing plane changes\n");
91
Icenowy Zheng87969332017-05-17 22:47:17 +080092 sunxi_engine_commit(scrtc->engine);
Daniel Vettera33e93d2016-06-08 14:18:58 +020093
94 if (event) {
95 crtc->state->event = NULL;
96
97 spin_lock_irq(&crtc->dev->event_lock);
98 if (drm_crtc_vblank_get(crtc) == 0)
99 drm_crtc_arm_vblank_event(crtc, event);
100 else
101 drm_crtc_send_vblank_event(crtc, event);
102 spin_unlock_irq(&crtc->dev->event_lock);
103 }
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100104}
105
Laurent Pinchart64581712017-06-30 12:36:45 +0300106static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc,
107 struct drm_crtc_state *old_state)
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100108{
Maxime Ripard45e88f92017-10-17 11:06:12 +0200109 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100110 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100111
112 DRM_DEBUG_DRIVER("Disabling the CRTC\n");
113
Maxime Ripardfd00c4e2018-02-21 13:57:03 +0100114 drm_crtc_vblank_off(crtc);
115
Maxime Ripard45e88f92017-10-17 11:06:12 +0200116 sun4i_tcon_set_status(scrtc->tcon, encoder, false);
Maxime Ripard2cd36832016-06-20 12:20:59 +0200117
118 if (crtc->state->event && !crtc->state->active) {
119 spin_lock_irq(&crtc->dev->event_lock);
120 drm_crtc_send_vblank_event(crtc, crtc->state->event);
121 spin_unlock_irq(&crtc->dev->event_lock);
122
123 crtc->state->event = NULL;
124 }
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100125}
126
Laurent Pinchart0b20a0f2017-06-30 12:36:44 +0300127static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc,
128 struct drm_crtc_state *old_state)
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100129{
Maxime Ripard45e88f92017-10-17 11:06:12 +0200130 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100131 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100132
133 DRM_DEBUG_DRIVER("Enabling the CRTC\n");
134
Maxime Ripard45e88f92017-10-17 11:06:12 +0200135 sun4i_tcon_set_status(scrtc->tcon, encoder, true);
Maxime Ripardfd00c4e2018-02-21 13:57:03 +0100136
137 drm_crtc_vblank_on(crtc);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100138}
139
Maxime Ripard5b8f0912017-10-17 11:06:13 +0200140static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc)
141{
142 struct drm_display_mode *mode = &crtc->state->adjusted_mode;
143 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
144 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
145
146 sun4i_tcon_mode_set(scrtc->tcon, encoder, mode);
147}
148
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100149static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = {
Maxime Ripard656e5f62018-01-22 10:25:19 +0100150 .atomic_check = sun4i_crtc_atomic_check,
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100151 .atomic_begin = sun4i_crtc_atomic_begin,
152 .atomic_flush = sun4i_crtc_atomic_flush,
Laurent Pinchart0b20a0f2017-06-30 12:36:44 +0300153 .atomic_enable = sun4i_crtc_atomic_enable,
Laurent Pinchart64581712017-06-30 12:36:45 +0300154 .atomic_disable = sun4i_crtc_atomic_disable,
Maxime Ripard5b8f0912017-10-17 11:06:13 +0200155 .mode_set_nofb = sun4i_crtc_mode_set_nofb,
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100156};
157
Shawn Guo50480a72017-02-07 17:16:31 +0800158static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc)
159{
160 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Shawn Guo50480a72017-02-07 17:16:31 +0800161
162 DRM_DEBUG_DRIVER("Enabling VBLANK on crtc %p\n", crtc);
163
Chen-Yu Tsai3c64fb32017-02-23 16:05:43 +0800164 sun4i_tcon_enable_vblank(scrtc->tcon, true);
Shawn Guo50480a72017-02-07 17:16:31 +0800165
166 return 0;
167}
168
169static void sun4i_crtc_disable_vblank(struct drm_crtc *crtc)
170{
171 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Shawn Guo50480a72017-02-07 17:16:31 +0800172
173 DRM_DEBUG_DRIVER("Disabling VBLANK on crtc %p\n", crtc);
174
Chen-Yu Tsai3c64fb32017-02-23 16:05:43 +0800175 sun4i_tcon_enable_vblank(scrtc->tcon, false);
Shawn Guo50480a72017-02-07 17:16:31 +0800176}
177
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100178static const struct drm_crtc_funcs sun4i_crtc_funcs = {
179 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
180 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
181 .destroy = drm_crtc_cleanup,
182 .page_flip = drm_atomic_helper_page_flip,
183 .reset = drm_atomic_helper_crtc_reset,
184 .set_config = drm_atomic_helper_set_config,
Shawn Guo50480a72017-02-07 17:16:31 +0800185 .enable_vblank = sun4i_crtc_enable_vblank,
186 .disable_vblank = sun4i_crtc_disable_vblank,
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100187};
188
Chen-Yu Tsai18c3b302017-03-09 18:05:28 +0800189struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
Icenowy Zheng87969332017-05-17 22:47:17 +0800190 struct sunxi_engine *engine,
Chen-Yu Tsai18c3b302017-03-09 18:05:28 +0800191 struct sun4i_tcon *tcon)
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100192{
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100193 struct sun4i_crtc *scrtc;
Icenowy Zheng7921e142017-05-15 00:30:36 +0800194 struct drm_plane **planes;
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800195 struct drm_plane *primary = NULL, *cursor = NULL;
196 int ret, i;
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100197
198 scrtc = devm_kzalloc(drm->dev, sizeof(*scrtc), GFP_KERNEL);
199 if (!scrtc)
Chen-Yu Tsaiea411fd2017-02-17 11:13:30 +0800200 return ERR_PTR(-ENOMEM);
Icenowy Zheng87969332017-05-17 22:47:17 +0800201 scrtc->engine = engine;
Chen-Yu Tsai18c3b302017-03-09 18:05:28 +0800202 scrtc->tcon = tcon;
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100203
Chen-Yu Tsaib3f266e2017-02-23 16:05:36 +0800204 /* Create our layers */
Icenowy Zheng87969332017-05-17 22:47:17 +0800205 planes = sunxi_engine_layers_init(drm, engine);
Icenowy Zheng7921e142017-05-15 00:30:36 +0800206 if (IS_ERR(planes)) {
Chen-Yu Tsaib3f266e2017-02-23 16:05:36 +0800207 dev_err(drm->dev, "Couldn't create the planes\n");
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800208 return NULL;
209 }
210
211 /* find primary and cursor planes for drm_crtc_init_with_planes */
Icenowy Zheng7921e142017-05-15 00:30:36 +0800212 for (i = 0; planes[i]; i++) {
213 struct drm_plane *plane = planes[i];
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800214
Icenowy Zheng7921e142017-05-15 00:30:36 +0800215 switch (plane->type) {
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800216 case DRM_PLANE_TYPE_PRIMARY:
Icenowy Zheng7921e142017-05-15 00:30:36 +0800217 primary = plane;
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800218 break;
219 case DRM_PLANE_TYPE_CURSOR:
Icenowy Zheng7921e142017-05-15 00:30:36 +0800220 cursor = plane;
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800221 break;
222 default:
223 break;
224 }
Chen-Yu Tsaib3f266e2017-02-23 16:05:36 +0800225 }
226
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100227 ret = drm_crtc_init_with_planes(drm, &scrtc->crtc,
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800228 primary,
229 cursor,
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100230 &sun4i_crtc_funcs,
231 NULL);
232 if (ret) {
233 dev_err(drm->dev, "Couldn't init DRM CRTC\n");
Chen-Yu Tsaiea411fd2017-02-17 11:13:30 +0800234 return ERR_PTR(ret);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100235 }
236
237 drm_crtc_helper_add(&scrtc->crtc, &sun4i_crtc_helper_funcs);
238
Chen-Yu Tsai75448602017-02-23 16:05:34 +0800239 /* Set crtc.port to output port node of the tcon */
Chen-Yu Tsaie4cdcb72017-03-09 18:05:26 +0800240 scrtc->crtc.port = of_graph_get_port_by_id(scrtc->tcon->dev->of_node,
Chen-Yu Tsai75448602017-02-23 16:05:34 +0800241 1);
242
Chen-Yu Tsaia5154a42017-02-23 16:05:39 +0800243 /* Set possible_crtcs to this crtc for overlay planes */
Icenowy Zheng7921e142017-05-15 00:30:36 +0800244 for (i = 0; planes[i]; i++) {
Chen-Yu Tsaia5154a42017-02-23 16:05:39 +0800245 uint32_t possible_crtcs = BIT(drm_crtc_index(&scrtc->crtc));
Icenowy Zheng7921e142017-05-15 00:30:36 +0800246 struct drm_plane *plane = planes[i];
Chen-Yu Tsaia5154a42017-02-23 16:05:39 +0800247
Icenowy Zheng7921e142017-05-15 00:30:36 +0800248 if (plane->type == DRM_PLANE_TYPE_OVERLAY)
249 plane->possible_crtcs = possible_crtcs;
Chen-Yu Tsaia5154a42017-02-23 16:05:39 +0800250 }
251
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100252 return scrtc;
253}