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Joonyoung Shim864ee9e2011-12-08 17:54:07 +09001/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
David Howells760285e2012-10-02 18:01:07 +010012#include <drm/drmP.h>
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090013
David Howells760285e2012-10-02 18:01:07 +010014#include <drm/exynos_drm.h>
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090015#include "exynos_drm_drv.h"
16#include "exynos_drm_encoder.h"
Joonyoung Shim4070d212012-06-27 14:27:05 +090017#include "exynos_drm_fb.h"
18#include "exynos_drm_gem.h"
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090019
Joonyoung Shimfdc575e2012-06-27 14:27:03 +090020#define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
21
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090022struct exynos_plane {
23 struct drm_plane base;
24 struct exynos_drm_overlay overlay;
25 bool enabled;
26};
27
Eunchul Kimba3849d2012-03-16 18:47:15 +090028static const uint32_t formats[] = {
29 DRM_FORMAT_XRGB8888,
Seung-Woo Kim6b1c7622012-04-05 11:21:09 +090030 DRM_FORMAT_ARGB8888,
31 DRM_FORMAT_NV12,
Seung-Woo Kim6b1c7622012-04-05 11:21:09 +090032 DRM_FORMAT_NV12MT,
Eunchul Kimba3849d2012-03-16 18:47:15 +090033};
34
Joonyoung Shim2ab97922012-09-27 19:25:21 +090035/*
36 * This function is to get X or Y size shown via screen. This needs length and
37 * start position of CRTC.
38 *
39 * <--- length --->
40 * CRTC ----------------
41 * ^ start ^ end
42 *
43 * There are six cases from a to b.
44 *
45 * <----- SCREEN ----->
46 * 0 last
47 * ----------|------------------|----------
48 * CRTCs
49 * a -------
50 * b -------
51 * c --------------------------
52 * d --------
53 * e -------
54 * f -------
55 */
56static int exynos_plane_get_size(int start, unsigned length, unsigned last)
57{
58 int end = start + length;
59 int size = 0;
60
61 if (start <= 0) {
62 if (end > 0)
63 size = min_t(unsigned, end, last);
64 } else if (start <= last) {
65 size = min_t(unsigned, last - start, length);
66 }
67
68 return size;
69}
70
Joonyoung Shim4070d212012-06-27 14:27:05 +090071int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
72 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
73 unsigned int crtc_w, unsigned int crtc_h,
74 uint32_t src_x, uint32_t src_y,
75 uint32_t src_w, uint32_t src_h)
76{
77 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
78 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
79 unsigned int actual_w;
80 unsigned int actual_h;
81 int nr;
82 int i;
83
84 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
85
Inki Dae01ed8122012-08-20 20:05:56 +090086 nr = exynos_drm_fb_get_buf_cnt(fb);
Joonyoung Shim4070d212012-06-27 14:27:05 +090087 for (i = 0; i < nr; i++) {
88 struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
89
90 if (!buffer) {
91 DRM_LOG_KMS("buffer is null\n");
92 return -EFAULT;
93 }
94
95 overlay->dma_addr[i] = buffer->dma_addr;
Joonyoung Shim4070d212012-06-27 14:27:05 +090096
YoungJun Choddd8e952012-12-10 15:44:58 +090097 DRM_DEBUG_KMS("buffer: %d, dma_addr = 0x%lx\n",
98 i, (unsigned long)overlay->dma_addr[i]);
Joonyoung Shim4070d212012-06-27 14:27:05 +090099 }
100
Joonyoung Shim2ab97922012-09-27 19:25:21 +0900101 actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
102 actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);
103
104 if (crtc_x < 0) {
105 if (actual_w)
106 src_x -= crtc_x;
107 else
108 src_x += crtc_w;
109 crtc_x = 0;
110 }
111
112 if (crtc_y < 0) {
113 if (actual_h)
114 src_y -= crtc_y;
115 else
116 src_y += crtc_h;
117 crtc_y = 0;
118 }
Joonyoung Shim4070d212012-06-27 14:27:05 +0900119
120 /* set drm framebuffer data. */
121 overlay->fb_x = src_x;
122 overlay->fb_y = src_y;
123 overlay->fb_width = fb->width;
124 overlay->fb_height = fb->height;
125 overlay->src_width = src_w;
126 overlay->src_height = src_h;
127 overlay->bpp = fb->bits_per_pixel;
128 overlay->pitch = fb->pitches[0];
129 overlay->pixel_format = fb->pixel_format;
130
131 /* set overlay range to be displayed. */
132 overlay->crtc_x = crtc_x;
133 overlay->crtc_y = crtc_y;
134 overlay->crtc_width = actual_w;
135 overlay->crtc_height = actual_h;
136
137 /* set drm mode data. */
138 overlay->mode_width = crtc->mode.hdisplay;
139 overlay->mode_height = crtc->mode.vdisplay;
140 overlay->refresh = crtc->mode.vrefresh;
141 overlay->scan_flag = crtc->mode.flags;
142
143 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
144 overlay->crtc_x, overlay->crtc_y,
145 overlay->crtc_width, overlay->crtc_height);
146
147 exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set);
148
149 return 0;
150}
151
152void exynos_plane_commit(struct drm_plane *plane)
153{
154 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
155 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
156
157 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
158 exynos_drm_encoder_plane_commit);
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900159}
Joonyoung Shim4070d212012-06-27 14:27:05 +0900160
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900161void exynos_plane_dpms(struct drm_plane *plane, int mode)
162{
163 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
164 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
165
166 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
167
168 if (mode == DRM_MODE_DPMS_ON) {
169 if (exynos_plane->enabled)
170 return;
171
172 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
173 exynos_drm_encoder_plane_enable);
174
175 exynos_plane->enabled = true;
176 } else {
177 if (!exynos_plane->enabled)
178 return;
179
180 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
181 exynos_drm_encoder_plane_disable);
182
183 exynos_plane->enabled = false;
184 }
Joonyoung Shim4070d212012-06-27 14:27:05 +0900185}
186
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900187static int
188exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
189 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
190 unsigned int crtc_w, unsigned int crtc_h,
191 uint32_t src_x, uint32_t src_y,
192 uint32_t src_w, uint32_t src_h)
193{
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900194 int ret;
195
196 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
197
Joonyoung Shim4070d212012-06-27 14:27:05 +0900198 ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
199 crtc_w, crtc_h, src_x >> 16, src_y >> 16,
200 src_w >> 16, src_h >> 16);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900201 if (ret < 0)
202 return ret;
203
Joonyoung Shim4070d212012-06-27 14:27:05 +0900204 plane->crtc = crtc;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900205
Joonyoung Shim4070d212012-06-27 14:27:05 +0900206 exynos_plane_commit(plane);
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900207 exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900208
209 return 0;
210}
211
212static int exynos_disable_plane(struct drm_plane *plane)
213{
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900214 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
215
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900216 exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900217
218 return 0;
219}
220
221static void exynos_plane_destroy(struct drm_plane *plane)
222{
Joonyoung Shimfdc575e2012-06-27 14:27:03 +0900223 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900224
225 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
226
227 exynos_disable_plane(plane);
228 drm_plane_cleanup(plane);
229 kfree(exynos_plane);
230}
231
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900232static int exynos_plane_set_property(struct drm_plane *plane,
233 struct drm_property *property,
234 uint64_t val)
235{
236 struct drm_device *dev = plane->dev;
237 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
238 struct exynos_drm_private *dev_priv = dev->dev_private;
239
240 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
241
242 if (property == dev_priv->plane_zpos_property) {
243 exynos_plane->overlay.zpos = val;
244 return 0;
245 }
246
247 return -EINVAL;
248}
249
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900250static struct drm_plane_funcs exynos_plane_funcs = {
251 .update_plane = exynos_update_plane,
252 .disable_plane = exynos_disable_plane,
253 .destroy = exynos_plane_destroy,
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900254 .set_property = exynos_plane_set_property,
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900255};
256
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900257static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
258{
259 struct drm_device *dev = plane->dev;
260 struct exynos_drm_private *dev_priv = dev->dev_private;
261 struct drm_property *prop;
262
263 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
264
265 prop = dev_priv->plane_zpos_property;
266 if (!prop) {
267 prop = drm_property_create_range(dev, 0, "zpos", 0,
268 MAX_PLANE - 1);
269 if (!prop)
270 return;
271
272 dev_priv->plane_zpos_property = prop;
273 }
274
275 drm_object_attach_property(&plane->base, prop, 0);
276}
277
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900278struct drm_plane *exynos_plane_init(struct drm_device *dev,
279 unsigned int possible_crtcs, bool priv)
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900280{
281 struct exynos_plane *exynos_plane;
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900282 int err;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900283
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900284 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
285
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900286 exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900287 if (!exynos_plane) {
288 DRM_ERROR("failed to allocate plane\n");
289 return NULL;
290 }
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900291
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900292 err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
Eunchul Kimba3849d2012-03-16 18:47:15 +0900293 &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900294 priv);
295 if (err) {
296 DRM_ERROR("failed to initialize plane\n");
297 kfree(exynos_plane);
298 return NULL;
299 }
300
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900301 if (priv)
302 exynos_plane->overlay.zpos = DEFAULT_ZPOS;
303 else
304 exynos_plane_attach_zpos_property(&exynos_plane->base);
305
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900306 return &exynos_plane->base;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900307}