blob: 3de2a6d73fdc4dff0ac2f7071b95bbeb4bf33015 [file] [log] [blame]
Lennert Buytenhek91da11f2008-10-07 13:44:02 +00001/*
2 * net/dsa/mv88e6123_61_65.c - Marvell 88e6123/6161/6165 switch chip support
Lennert Buytenheke84665c2009-03-20 09:52:09 +00003 * Copyright (c) 2008-2009 Marvell Semiconductor
Lennert Buytenhek91da11f2008-10-07 13:44:02 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
Barry Grussling19b2f972013-01-08 16:05:54 +000011#include <linux/delay.h>
12#include <linux/jiffies.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000013#include <linux/list.h>
Paul Gortmaker2bbba272012-01-24 10:41:40 +000014#include <linux/module.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000015#include <linux/netdevice.h>
16#include <linux/phy.h>
Ben Hutchingsc8f0b862011-11-27 17:06:08 +000017#include <net/dsa.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000018#include "mv88e6xxx.h"
19
Alexander Duyckb4d23942014-09-15 13:00:27 -040020static char *mv88e6123_61_65_probe(struct device *host_dev, int sw_addr)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000021{
Alexander Duyckb4d23942014-09-15 13:00:27 -040022 struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000023 int ret;
24
Alexander Duyckb4d23942014-09-15 13:00:27 -040025 if (bus == NULL)
26 return NULL;
27
Andrew Lunncca8b132015-04-02 04:06:39 +020028 ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000029 if (ret >= 0) {
Andrew Lunncca8b132015-04-02 04:06:39 +020030 if (ret == PORT_SWITCH_ID_6123_A1)
Chris Healyedd664b2012-01-22 21:20:54 +000031 return "Marvell 88E6123 (A1)";
Andrew Lunncca8b132015-04-02 04:06:39 +020032 if (ret == PORT_SWITCH_ID_6123_A2)
Chris Healyedd664b2012-01-22 21:20:54 +000033 return "Marvell 88E6123 (A2)";
Andrew Lunncca8b132015-04-02 04:06:39 +020034 if ((ret & 0xfff0) == PORT_SWITCH_ID_6123)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000035 return "Marvell 88E6123";
Chris Healyedd664b2012-01-22 21:20:54 +000036
Andrew Lunncca8b132015-04-02 04:06:39 +020037 if (ret == PORT_SWITCH_ID_6161_A1)
Chris Healyedd664b2012-01-22 21:20:54 +000038 return "Marvell 88E6161 (A1)";
Andrew Lunncca8b132015-04-02 04:06:39 +020039 if (ret == PORT_SWITCH_ID_6161_A2)
Chris Healyedd664b2012-01-22 21:20:54 +000040 return "Marvell 88E6161 (A2)";
Andrew Lunncca8b132015-04-02 04:06:39 +020041 if ((ret & 0xfff0) == PORT_SWITCH_ID_6161)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000042 return "Marvell 88E6161";
Chris Healyedd664b2012-01-22 21:20:54 +000043
Andrew Lunncca8b132015-04-02 04:06:39 +020044 if (ret == PORT_SWITCH_ID_6165_A1)
Chris Healyedd664b2012-01-22 21:20:54 +000045 return "Marvell 88E6165 (A1)";
Andrew Lunncca8b132015-04-02 04:06:39 +020046 if (ret == PORT_SWITCH_ID_6165_A2)
Chris Healyedd664b2012-01-22 21:20:54 +000047 return "Marvell 88e6165 (A2)";
Andrew Lunncca8b132015-04-02 04:06:39 +020048 if ((ret & 0xfff0) == PORT_SWITCH_ID_6165)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000049 return "Marvell 88E6165";
50 }
51
52 return NULL;
53}
54
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000055static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
56{
Andrew Lunn15966a22015-05-06 01:09:49 +020057 u32 upstream_port = dsa_upstream_port(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000058 int ret;
Andrew Lunn15966a22015-05-06 01:09:49 +020059 u32 reg;
Andrew Lunn54d792f2015-05-06 01:09:47 +020060
61 ret = mv88e6xxx_setup_global(ds);
62 if (ret)
63 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000064
Barry Grussling3675c8d2013-01-08 16:05:53 +000065 /* Disable the PHY polling unit (since there won't be any
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000066 * external PHYs to poll), don't discard packets with
67 * excessive collisions, and mask all interrupt sources.
68 */
Andrew Lunn15966a22015-05-06 01:09:49 +020069 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, 0x0000);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000070
Barry Grussling3675c8d2013-01-08 16:05:53 +000071 /* Configure the upstream port, and configure the upstream
Lennert Buytenheke84665c2009-03-20 09:52:09 +000072 * port as the port to which ingress and egress monitor frames
73 * are to be sent.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000074 */
Andrew Lunn15966a22015-05-06 01:09:49 +020075 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
76 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
77 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
78 REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000079
Barry Grussling3675c8d2013-01-08 16:05:53 +000080 /* Disable remote management for now, and set the switch's
Lennert Buytenheke84665c2009-03-20 09:52:09 +000081 * DSA device number.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000082 */
Andrew Lunn15966a22015-05-06 01:09:49 +020083 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000084
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000085 return 0;
86}
87
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000088static int mv88e6123_61_65_setup(struct dsa_switch *ds)
89{
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020090 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000091 int ret;
92
Guenter Roeckacdaffc2015-03-26 18:36:28 -070093 ret = mv88e6xxx_setup_common(ds);
94 if (ret < 0)
95 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000096
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020097 switch (ps->id) {
Andrew Lunncca8b132015-04-02 04:06:39 +020098 case PORT_SWITCH_ID_6123:
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020099 ps->num_ports = 3;
100 break;
Andrew Lunncca8b132015-04-02 04:06:39 +0200101 case PORT_SWITCH_ID_6161:
102 case PORT_SWITCH_ID_6165:
Guenter Roeck14ef6ad2015-04-02 04:06:32 +0200103 ps->num_ports = 6;
104 break;
105 default:
106 return -ENODEV;
107 }
108
Andrew Lunn143a8302015-04-02 04:06:34 +0200109 ret = mv88e6xxx_switch_reset(ds, false);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000110 if (ret < 0)
111 return ret;
112
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000113 ret = mv88e6123_61_65_setup_global(ds);
114 if (ret < 0)
115 return ret;
116
Andrew Lunndbde9e62015-05-06 01:09:48 +0200117 return mv88e6xxx_setup_ports(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000118}
119
Ben Hutchings98e67302011-11-25 14:36:19 +0000120struct dsa_switch_driver mv88e6123_61_65_switch_driver = {
Florian Fainelliac7a04c2014-09-11 21:18:09 -0700121 .tag_protocol = DSA_TAG_PROTO_EDSA,
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000122 .priv_size = sizeof(struct mv88e6xxx_priv_state),
123 .probe = mv88e6123_61_65_probe,
124 .setup = mv88e6123_61_65_setup,
125 .set_addr = mv88e6xxx_set_addr_indirect,
Andrew Lunnfd3a0ee2015-04-02 04:06:36 +0200126 .phy_read = mv88e6xxx_phy_read,
127 .phy_write = mv88e6xxx_phy_write,
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000128 .poll_link = mv88e6xxx_poll_link,
Andrew Lunne413e7e2015-04-02 04:06:38 +0200129 .get_strings = mv88e6xxx_get_strings,
130 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
131 .get_sset_count = mv88e6xxx_get_sset_count,
Andrew Lunndea87022015-08-31 15:56:47 +0200132 .adjust_link = mv88e6xxx_adjust_link,
Guenter Roeck87e5f662014-10-29 10:45:00 -0700133#ifdef CONFIG_NET_DSA_HWMON
Andrew Lunneaa23762014-11-15 22:24:51 +0100134 .get_temp = mv88e6xxx_get_temp,
Guenter Roeck87e5f662014-10-29 10:45:00 -0700135#endif
Guenter Roecka1ab91f2014-10-29 10:45:05 -0700136 .get_regs_len = mv88e6xxx_get_regs_len,
137 .get_regs = mv88e6xxx_get_regs,
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000138};
Ben Hutchings3d825ed2011-11-25 14:37:16 +0000139
140MODULE_ALIAS("platform:mv88e6123");
141MODULE_ALIAS("platform:mv88e6161");
142MODULE_ALIAS("platform:mv88e6165");