blob: c1f3b1279d97bc588ba7d9a44d18b45cc63cde80 [file] [log] [blame]
eric miao8f58de72007-12-19 17:14:02 +08001#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h>
Sebastian Andrzej Siewior8348c252010-11-22 17:12:15 -08006#include <linux/spi/pxa2xx_spi.h>
Sebastian Andrzej Siewiorb4593962011-02-23 12:38:16 +01007#include <linux/i2c/pxa-i2c.h>
eric miao8f58de72007-12-19 17:14:02 +08008
Russell Kinga09e64f2008-08-05 16:14:15 +01009#include <mach/udc.h>
Igor Grinberg69f22be2010-07-27 15:06:58 +030010#include <mach/pxa3xx-u2d.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010011#include <mach/pxafb.h>
12#include <mach/mmc.h>
13#include <mach/irda.h>
Rob Herring4e611092012-01-03 16:53:48 -060014#include <mach/irqs.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010015#include <mach/ohci.h>
Mark F. Brown4a2490e2010-09-03 18:28:06 -040016#include <plat/pxa27x_keypad.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010017#include <mach/camera.h>
18#include <mach/audio.h>
Eric Miao75e874c2009-12-16 21:35:52 +080019#include <mach/hardware.h>
Haojian Zhuang82b95ec2009-09-10 13:55:23 +080020#include <plat/pxa3xx_nand.h>
eric miao8f58de72007-12-19 17:14:02 +080021
22#include "devices.h"
Philipp Zabelbc3a5952008-06-02 18:49:27 +010023#include "generic.h"
eric miao8f58de72007-12-19 17:14:02 +080024
25void __init pxa_register_device(struct platform_device *dev, void *data)
26{
27 int ret;
28
29 dev->dev.platform_data = data;
30
31 ret = platform_device_register(dev);
32 if (ret)
33 dev_err(&dev->dev, "unable to register device: %d\n", ret);
34}
35
Eric Miao09a53582010-06-14 00:43:00 +080036static struct resource pxa_resource_pmu = {
37 .start = IRQ_PMU,
38 .end = IRQ_PMU,
39 .flags = IORESOURCE_IRQ,
40};
41
42struct platform_device pxa_device_pmu = {
43 .name = "arm-pmu",
Sudeep KarkadaNageshadf3d17e2012-07-19 09:50:21 +010044 .id = -1,
Eric Miao09a53582010-06-14 00:43:00 +080045 .resource = &pxa_resource_pmu,
46 .num_resources = 1,
47};
48
eric miao8f58de72007-12-19 17:14:02 +080049static struct resource pxamci_resources[] = {
50 [0] = {
51 .start = 0x41100000,
52 .end = 0x41100fff,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = IRQ_MMC,
57 .end = IRQ_MMC,
58 .flags = IORESOURCE_IRQ,
59 },
60 [2] = {
61 .start = 21,
62 .end = 21,
63 .flags = IORESOURCE_DMA,
64 },
65 [3] = {
66 .start = 22,
67 .end = 22,
68 .flags = IORESOURCE_DMA,
69 },
70};
71
72static u64 pxamci_dmamask = 0xffffffffUL;
73
74struct platform_device pxa_device_mci = {
75 .name = "pxa2xx-mci",
Bridge Wufafc9d32007-12-21 19:00:13 +080076 .id = 0,
eric miao8f58de72007-12-19 17:14:02 +080077 .dev = {
78 .dma_mask = &pxamci_dmamask,
79 .coherent_dma_mask = 0xffffffff,
80 },
81 .num_resources = ARRAY_SIZE(pxamci_resources),
82 .resource = pxamci_resources,
83};
84
85void __init pxa_set_mci_info(struct pxamci_platform_data *info)
86{
87 pxa_register_device(&pxa_device_mci, info);
88}
89
90
Philipp Zabel12576292009-05-26 22:03:32 +020091static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 .gpio_pullup = -1,
Philipp Zabel12576292009-05-26 22:03:32 +020093};
eric miao8f58de72007-12-19 17:14:02 +080094
95void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
96{
97 memcpy(&pxa_udc_info, info, sizeof *info);
98}
99
100static struct resource pxa2xx_udc_resources[] = {
101 [0] = {
102 .start = 0x40600000,
103 .end = 0x4060ffff,
104 .flags = IORESOURCE_MEM,
105 },
106 [1] = {
107 .start = IRQ_USB,
108 .end = IRQ_USB,
109 .flags = IORESOURCE_IRQ,
110 },
111};
112
113static u64 udc_dma_mask = ~(u32)0;
114
Philipp Zabel7a857622008-06-22 23:36:39 +0100115struct platform_device pxa25x_device_udc = {
116 .name = "pxa25x-udc",
117 .id = -1,
118 .resource = pxa2xx_udc_resources,
119 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
120 .dev = {
121 .platform_data = &pxa_udc_info,
122 .dma_mask = &udc_dma_mask,
123 }
124};
125
126struct platform_device pxa27x_device_udc = {
127 .name = "pxa27x-udc",
eric miao8f58de72007-12-19 17:14:02 +0800128 .id = -1,
129 .resource = pxa2xx_udc_resources,
130 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
131 .dev = {
132 .platform_data = &pxa_udc_info,
133 .dma_mask = &udc_dma_mask,
134 }
135};
136
Igor Grinberg69f22be2010-07-27 15:06:58 +0300137#ifdef CONFIG_PXA3xx
138static struct resource pxa3xx_u2d_resources[] = {
139 [0] = {
140 .start = 0x54100000,
141 .end = 0x54100fff,
142 .flags = IORESOURCE_MEM,
143 },
144 [1] = {
145 .start = IRQ_USB2,
146 .end = IRQ_USB2,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151struct platform_device pxa3xx_device_u2d = {
152 .name = "pxa3xx-u2d",
153 .id = -1,
154 .resource = pxa3xx_u2d_resources,
155 .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
156};
157
158void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
159{
160 pxa_register_device(&pxa3xx_device_u2d, info);
161}
162#endif /* CONFIG_PXA3xx */
163
eric miao8f58de72007-12-19 17:14:02 +0800164static struct resource pxafb_resources[] = {
165 [0] = {
166 .start = 0x44000000,
167 .end = 0x4400ffff,
168 .flags = IORESOURCE_MEM,
169 },
170 [1] = {
171 .start = IRQ_LCD,
172 .end = IRQ_LCD,
173 .flags = IORESOURCE_IRQ,
174 },
175};
176
177static u64 fb_dma_mask = ~(u64)0;
178
179struct platform_device pxa_device_fb = {
180 .name = "pxa2xx-fb",
181 .id = -1,
182 .dev = {
183 .dma_mask = &fb_dma_mask,
184 .coherent_dma_mask = 0xffffffff,
185 },
186 .num_resources = ARRAY_SIZE(pxafb_resources),
187 .resource = pxafb_resources,
188};
189
Russell King - ARM Linux4321e1a2011-02-15 15:37:30 +0800190void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
eric miao8f58de72007-12-19 17:14:02 +0800191{
Russell King - ARM Linux4321e1a2011-02-15 15:37:30 +0800192 pxa_device_fb.dev.parent = parent;
eric miao8f58de72007-12-19 17:14:02 +0800193 pxa_register_device(&pxa_device_fb, info);
194}
195
eric miao8f58de72007-12-19 17:14:02 +0800196static struct resource pxa_resource_ffuart[] = {
197 {
Eric Miao02f65262008-11-28 14:08:53 +0800198 .start = 0x40100000,
199 .end = 0x40100023,
eric miao8f58de72007-12-19 17:14:02 +0800200 .flags = IORESOURCE_MEM,
201 }, {
202 .start = IRQ_FFUART,
203 .end = IRQ_FFUART,
204 .flags = IORESOURCE_IRQ,
205 }
206};
207
Russell Kingcc155c62009-11-09 13:34:08 +0800208struct platform_device pxa_device_ffuart = {
eric miao8f58de72007-12-19 17:14:02 +0800209 .name = "pxa2xx-uart",
210 .id = 0,
211 .resource = pxa_resource_ffuart,
212 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
213};
214
Russell Kingcc155c62009-11-09 13:34:08 +0800215void __init pxa_set_ffuart_info(void *info)
216{
217 pxa_register_device(&pxa_device_ffuart, info);
218}
219
eric miao8f58de72007-12-19 17:14:02 +0800220static struct resource pxa_resource_btuart[] = {
221 {
Eric Miao02f65262008-11-28 14:08:53 +0800222 .start = 0x40200000,
223 .end = 0x40200023,
eric miao8f58de72007-12-19 17:14:02 +0800224 .flags = IORESOURCE_MEM,
225 }, {
226 .start = IRQ_BTUART,
227 .end = IRQ_BTUART,
228 .flags = IORESOURCE_IRQ,
229 }
230};
231
232struct platform_device pxa_device_btuart = {
233 .name = "pxa2xx-uart",
234 .id = 1,
235 .resource = pxa_resource_btuart,
236 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
237};
238
Russell Kingcc155c62009-11-09 13:34:08 +0800239void __init pxa_set_btuart_info(void *info)
240{
241 pxa_register_device(&pxa_device_btuart, info);
242}
243
eric miao8f58de72007-12-19 17:14:02 +0800244static struct resource pxa_resource_stuart[] = {
245 {
Eric Miao02f65262008-11-28 14:08:53 +0800246 .start = 0x40700000,
247 .end = 0x40700023,
eric miao8f58de72007-12-19 17:14:02 +0800248 .flags = IORESOURCE_MEM,
249 }, {
250 .start = IRQ_STUART,
251 .end = IRQ_STUART,
252 .flags = IORESOURCE_IRQ,
253 }
254};
255
256struct platform_device pxa_device_stuart = {
257 .name = "pxa2xx-uart",
258 .id = 2,
259 .resource = pxa_resource_stuart,
260 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
261};
262
Russell Kingcc155c62009-11-09 13:34:08 +0800263void __init pxa_set_stuart_info(void *info)
264{
265 pxa_register_device(&pxa_device_stuart, info);
266}
267
eric miao8f58de72007-12-19 17:14:02 +0800268static struct resource pxa_resource_hwuart[] = {
269 {
Eric Miao02f65262008-11-28 14:08:53 +0800270 .start = 0x41600000,
271 .end = 0x4160002F,
eric miao8f58de72007-12-19 17:14:02 +0800272 .flags = IORESOURCE_MEM,
273 }, {
274 .start = IRQ_HWUART,
275 .end = IRQ_HWUART,
276 .flags = IORESOURCE_IRQ,
277 }
278};
279
280struct platform_device pxa_device_hwuart = {
281 .name = "pxa2xx-uart",
282 .id = 3,
283 .resource = pxa_resource_hwuart,
284 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
285};
286
Russell Kingcc155c62009-11-09 13:34:08 +0800287void __init pxa_set_hwuart_info(void *info)
288{
289 if (cpu_is_pxa255())
290 pxa_register_device(&pxa_device_hwuart, info);
291 else
292 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
293}
294
eric miao8f58de72007-12-19 17:14:02 +0800295static struct resource pxai2c_resources[] = {
296 {
297 .start = 0x40301680,
298 .end = 0x403016a3,
299 .flags = IORESOURCE_MEM,
300 }, {
301 .start = IRQ_I2C,
302 .end = IRQ_I2C,
303 .flags = IORESOURCE_IRQ,
304 },
305};
306
307struct platform_device pxa_device_i2c = {
308 .name = "pxa2xx-i2c",
309 .id = 0,
310 .resource = pxai2c_resources,
311 .num_resources = ARRAY_SIZE(pxai2c_resources),
312};
313
314void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
315{
316 pxa_register_device(&pxa_device_i2c, info);
317}
318
Eric Miao99464292008-11-28 15:01:55 +0800319#ifdef CONFIG_PXA27x
320static struct resource pxa27x_resources_i2c_power[] = {
321 {
322 .start = 0x40f00180,
323 .end = 0x40f001a3,
324 .flags = IORESOURCE_MEM,
325 }, {
326 .start = IRQ_PWRI2C,
327 .end = IRQ_PWRI2C,
328 .flags = IORESOURCE_IRQ,
329 },
330};
331
332struct platform_device pxa27x_device_i2c_power = {
333 .name = "pxa2xx-i2c",
334 .id = 1,
335 .resource = pxa27x_resources_i2c_power,
336 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
337};
338#endif
339
eric miao8f58de72007-12-19 17:14:02 +0800340static struct resource pxai2s_resources[] = {
341 {
342 .start = 0x40400000,
343 .end = 0x40400083,
344 .flags = IORESOURCE_MEM,
345 }, {
346 .start = IRQ_I2S,
347 .end = IRQ_I2S,
348 .flags = IORESOURCE_IRQ,
349 },
350};
351
352struct platform_device pxa_device_i2s = {
353 .name = "pxa2xx-i2s",
354 .id = -1,
355 .resource = pxai2s_resources,
356 .num_resources = ARRAY_SIZE(pxai2s_resources),
357};
358
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000359struct platform_device pxa_device_asoc_ssp1 = {
360 .name = "pxa-ssp-dai",
361 .id = 0,
362};
363
364struct platform_device pxa_device_asoc_ssp2= {
365 .name = "pxa-ssp-dai",
366 .id = 1,
367};
368
369struct platform_device pxa_device_asoc_ssp3 = {
370 .name = "pxa-ssp-dai",
371 .id = 2,
372};
373
374struct platform_device pxa_device_asoc_ssp4 = {
375 .name = "pxa-ssp-dai",
376 .id = 3,
377};
378
379struct platform_device pxa_device_asoc_platform = {
380 .name = "pxa-pcm-audio",
381 .id = -1,
382};
383
eric miao8f58de72007-12-19 17:14:02 +0800384static u64 pxaficp_dmamask = ~(u32)0;
385
386struct platform_device pxa_device_ficp = {
387 .name = "pxa2xx-ir",
388 .id = -1,
389 .dev = {
390 .dma_mask = &pxaficp_dmamask,
391 .coherent_dma_mask = 0xffffffff,
392 },
393};
394
395void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
396{
397 pxa_register_device(&pxa_device_ficp, info);
398}
399
Robert Jarzmik72493142008-11-13 23:50:56 +0100400static struct resource pxa_rtc_resources[] = {
401 [0] = {
402 .start = 0x40900000,
403 .end = 0x40900000 + 0x3b,
404 .flags = IORESOURCE_MEM,
405 },
406 [1] = {
407 .start = IRQ_RTC1Hz,
408 .end = IRQ_RTC1Hz,
Haojian Zhuang3888c092012-02-21 11:51:13 +0800409 .name = "rtc 1Hz",
Robert Jarzmik72493142008-11-13 23:50:56 +0100410 .flags = IORESOURCE_IRQ,
411 },
412 [2] = {
413 .start = IRQ_RTCAlrm,
414 .end = IRQ_RTCAlrm,
Haojian Zhuang3888c092012-02-21 11:51:13 +0800415 .name = "rtc alarm",
Robert Jarzmik72493142008-11-13 23:50:56 +0100416 .flags = IORESOURCE_IRQ,
417 },
418};
419
Robert Jarzmik72493142008-11-13 23:50:56 +0100420struct platform_device pxa_device_rtc = {
421 .name = "pxa-rtc",
422 .id = -1,
423 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
424 .resource = pxa_rtc_resources,
425};
426
Haojian Zhuang3888c092012-02-21 11:51:13 +0800427static struct resource sa1100_rtc_resources[] = {
428 {
429 .start = IRQ_RTC1Hz,
430 .end = IRQ_RTC1Hz,
431 .name = "rtc 1Hz",
432 .flags = IORESOURCE_IRQ,
433 }, {
434 .start = IRQ_RTCAlrm,
435 .end = IRQ_RTCAlrm,
436 .name = "rtc alarm",
437 .flags = IORESOURCE_IRQ,
438 },
439};
440
441struct platform_device sa1100_device_rtc = {
442 .name = "sa1100-rtc",
443 .id = -1,
444 .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
445 .resource = sa1100_rtc_resources,
446};
447
Mark Brown9f19d632008-06-10 12:30:05 +0100448static struct resource pxa_ac97_resources[] = {
449 [0] = {
450 .start = 0x40500000,
451 .end = 0x40500000 + 0xfff,
452 .flags = IORESOURCE_MEM,
453 },
454 [1] = {
455 .start = IRQ_AC97,
456 .end = IRQ_AC97,
457 .flags = IORESOURCE_IRQ,
458 },
459};
460
461static u64 pxa_ac97_dmamask = 0xffffffffUL;
462
463struct platform_device pxa_device_ac97 = {
464 .name = "pxa2xx-ac97",
465 .id = -1,
466 .dev = {
467 .dma_mask = &pxa_ac97_dmamask,
468 .coherent_dma_mask = 0xffffffff,
469 },
470 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
471 .resource = pxa_ac97_resources,
472};
473
474void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
475{
476 pxa_register_device(&pxa_device_ac97, ops);
477}
478
eric miao8f58de72007-12-19 17:14:02 +0800479#ifdef CONFIG_PXA25x
480
eric miao75540c12008-04-13 21:44:04 +0100481static struct resource pxa25x_resource_pwm0[] = {
482 [0] = {
483 .start = 0x40b00000,
484 .end = 0x40b0000f,
485 .flags = IORESOURCE_MEM,
486 },
487};
488
489struct platform_device pxa25x_device_pwm0 = {
490 .name = "pxa25x-pwm",
491 .id = 0,
492 .resource = pxa25x_resource_pwm0,
493 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
494};
495
496static struct resource pxa25x_resource_pwm1[] = {
497 [0] = {
498 .start = 0x40c00000,
499 .end = 0x40c0000f,
500 .flags = IORESOURCE_MEM,
501 },
502};
503
504struct platform_device pxa25x_device_pwm1 = {
505 .name = "pxa25x-pwm",
506 .id = 1,
507 .resource = pxa25x_resource_pwm1,
508 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
509};
510
eric miao8f58de72007-12-19 17:14:02 +0800511static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
512
513static struct resource pxa25x_resource_ssp[] = {
514 [0] = {
515 .start = 0x41000000,
516 .end = 0x4100001f,
517 .flags = IORESOURCE_MEM,
518 },
519 [1] = {
520 .start = IRQ_SSP,
521 .end = IRQ_SSP,
522 .flags = IORESOURCE_IRQ,
523 },
524 [2] = {
525 /* DRCMR for RX */
526 .start = 13,
527 .end = 13,
528 .flags = IORESOURCE_DMA,
529 },
530 [3] = {
531 /* DRCMR for TX */
532 .start = 14,
533 .end = 14,
534 .flags = IORESOURCE_DMA,
535 },
536};
537
538struct platform_device pxa25x_device_ssp = {
539 .name = "pxa25x-ssp",
540 .id = 0,
541 .dev = {
542 .dma_mask = &pxa25x_ssp_dma_mask,
543 .coherent_dma_mask = DMA_BIT_MASK(32),
544 },
545 .resource = pxa25x_resource_ssp,
546 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
547};
548
549static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
550
551static struct resource pxa25x_resource_nssp[] = {
552 [0] = {
553 .start = 0x41400000,
554 .end = 0x4140002f,
555 .flags = IORESOURCE_MEM,
556 },
557 [1] = {
558 .start = IRQ_NSSP,
559 .end = IRQ_NSSP,
560 .flags = IORESOURCE_IRQ,
561 },
562 [2] = {
563 /* DRCMR for RX */
564 .start = 15,
565 .end = 15,
566 .flags = IORESOURCE_DMA,
567 },
568 [3] = {
569 /* DRCMR for TX */
570 .start = 16,
571 .end = 16,
572 .flags = IORESOURCE_DMA,
573 },
574};
575
576struct platform_device pxa25x_device_nssp = {
577 .name = "pxa25x-nssp",
578 .id = 1,
579 .dev = {
580 .dma_mask = &pxa25x_nssp_dma_mask,
581 .coherent_dma_mask = DMA_BIT_MASK(32),
582 },
583 .resource = pxa25x_resource_nssp,
584 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
585};
586
587static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
588
589static struct resource pxa25x_resource_assp[] = {
590 [0] = {
591 .start = 0x41500000,
592 .end = 0x4150002f,
593 .flags = IORESOURCE_MEM,
594 },
595 [1] = {
596 .start = IRQ_ASSP,
597 .end = IRQ_ASSP,
598 .flags = IORESOURCE_IRQ,
599 },
600 [2] = {
601 /* DRCMR for RX */
602 .start = 23,
603 .end = 23,
604 .flags = IORESOURCE_DMA,
605 },
606 [3] = {
607 /* DRCMR for TX */
608 .start = 24,
609 .end = 24,
610 .flags = IORESOURCE_DMA,
611 },
612};
613
614struct platform_device pxa25x_device_assp = {
615 /* ASSP is basically equivalent to NSSP */
616 .name = "pxa25x-nssp",
617 .id = 2,
618 .dev = {
619 .dma_mask = &pxa25x_assp_dma_mask,
620 .coherent_dma_mask = DMA_BIT_MASK(32),
621 },
622 .resource = pxa25x_resource_assp,
623 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
624};
625#endif /* CONFIG_PXA25x */
626
627#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
Haojian Zhuanga4553352010-11-24 11:54:19 +0800628static struct resource pxa27x_resource_camera[] = {
eric miao37320982008-01-23 13:39:13 +0800629 [0] = {
Haojian Zhuanga4553352010-11-24 11:54:19 +0800630 .start = 0x50000000,
631 .end = 0x50000fff,
eric miao37320982008-01-23 13:39:13 +0800632 .flags = IORESOURCE_MEM,
633 },
634 [1] = {
Haojian Zhuanga4553352010-11-24 11:54:19 +0800635 .start = IRQ_CAMERA,
636 .end = IRQ_CAMERA,
eric miao37320982008-01-23 13:39:13 +0800637 .flags = IORESOURCE_IRQ,
638 },
639};
640
Haojian Zhuanga4553352010-11-24 11:54:19 +0800641static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
642
643static struct platform_device pxa27x_device_camera = {
644 .name = "pxa27x-camera",
645 .id = 0, /* This is used to put cameras on this interface */
646 .dev = {
647 .dma_mask = &pxa27x_dma_mask_camera,
648 .coherent_dma_mask = 0xffffffff,
649 },
650 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
651 .resource = pxa27x_resource_camera,
eric miao37320982008-01-23 13:39:13 +0800652};
653
Haojian Zhuanga4553352010-11-24 11:54:19 +0800654void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
eric miao37320982008-01-23 13:39:13 +0800655{
Haojian Zhuanga4553352010-11-24 11:54:19 +0800656 pxa_register_device(&pxa27x_device_camera, info);
eric miao37320982008-01-23 13:39:13 +0800657}
658
eric miaoec68e452007-12-12 09:29:33 +0800659static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
660
661static struct resource pxa27x_resource_ohci[] = {
662 [0] = {
663 .start = 0x4C000000,
664 .end = 0x4C00ff6f,
665 .flags = IORESOURCE_MEM,
666 },
667 [1] = {
668 .start = IRQ_USBH1,
669 .end = IRQ_USBH1,
670 .flags = IORESOURCE_IRQ,
671 },
672};
673
674struct platform_device pxa27x_device_ohci = {
675 .name = "pxa27x-ohci",
676 .id = -1,
677 .dev = {
678 .dma_mask = &pxa27x_ohci_dma_mask,
679 .coherent_dma_mask = DMA_BIT_MASK(32),
680 },
681 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
682 .resource = pxa27x_resource_ohci,
683};
684
685void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
686{
687 pxa_register_device(&pxa27x_device_ohci, info);
688}
Haojian Zhuanga4553352010-11-24 11:54:19 +0800689#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
690
691#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
692static struct resource pxa27x_resource_keypad[] = {
693 [0] = {
694 .start = 0x41500000,
695 .end = 0x4150004c,
696 .flags = IORESOURCE_MEM,
697 },
698 [1] = {
699 .start = IRQ_KEYPAD,
700 .end = IRQ_KEYPAD,
701 .flags = IORESOURCE_IRQ,
702 },
703};
704
705struct platform_device pxa27x_device_keypad = {
706 .name = "pxa27x-keypad",
707 .id = -1,
708 .resource = pxa27x_resource_keypad,
709 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
710};
711
712void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
713{
714 pxa_register_device(&pxa27x_device_keypad, info);
715}
eric miaoec68e452007-12-12 09:29:33 +0800716
eric miao8f58de72007-12-19 17:14:02 +0800717static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
718
719static struct resource pxa27x_resource_ssp1[] = {
720 [0] = {
721 .start = 0x41000000,
722 .end = 0x4100003f,
723 .flags = IORESOURCE_MEM,
724 },
725 [1] = {
726 .start = IRQ_SSP,
727 .end = IRQ_SSP,
728 .flags = IORESOURCE_IRQ,
729 },
730 [2] = {
731 /* DRCMR for RX */
732 .start = 13,
733 .end = 13,
734 .flags = IORESOURCE_DMA,
735 },
736 [3] = {
737 /* DRCMR for TX */
738 .start = 14,
739 .end = 14,
740 .flags = IORESOURCE_DMA,
741 },
742};
743
744struct platform_device pxa27x_device_ssp1 = {
745 .name = "pxa27x-ssp",
746 .id = 0,
747 .dev = {
748 .dma_mask = &pxa27x_ssp1_dma_mask,
749 .coherent_dma_mask = DMA_BIT_MASK(32),
750 },
751 .resource = pxa27x_resource_ssp1,
752 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
753};
754
755static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
756
757static struct resource pxa27x_resource_ssp2[] = {
758 [0] = {
759 .start = 0x41700000,
760 .end = 0x4170003f,
761 .flags = IORESOURCE_MEM,
762 },
763 [1] = {
764 .start = IRQ_SSP2,
765 .end = IRQ_SSP2,
766 .flags = IORESOURCE_IRQ,
767 },
768 [2] = {
769 /* DRCMR for RX */
770 .start = 15,
771 .end = 15,
772 .flags = IORESOURCE_DMA,
773 },
774 [3] = {
775 /* DRCMR for TX */
776 .start = 16,
777 .end = 16,
778 .flags = IORESOURCE_DMA,
779 },
780};
781
782struct platform_device pxa27x_device_ssp2 = {
783 .name = "pxa27x-ssp",
784 .id = 1,
785 .dev = {
786 .dma_mask = &pxa27x_ssp2_dma_mask,
787 .coherent_dma_mask = DMA_BIT_MASK(32),
788 },
789 .resource = pxa27x_resource_ssp2,
790 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
791};
792
793static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
794
795static struct resource pxa27x_resource_ssp3[] = {
796 [0] = {
797 .start = 0x41900000,
798 .end = 0x4190003f,
799 .flags = IORESOURCE_MEM,
800 },
801 [1] = {
802 .start = IRQ_SSP3,
803 .end = IRQ_SSP3,
804 .flags = IORESOURCE_IRQ,
805 },
806 [2] = {
807 /* DRCMR for RX */
808 .start = 66,
809 .end = 66,
810 .flags = IORESOURCE_DMA,
811 },
812 [3] = {
813 /* DRCMR for TX */
814 .start = 67,
815 .end = 67,
816 .flags = IORESOURCE_DMA,
817 },
818};
819
820struct platform_device pxa27x_device_ssp3 = {
821 .name = "pxa27x-ssp",
822 .id = 2,
823 .dev = {
824 .dma_mask = &pxa27x_ssp3_dma_mask,
825 .coherent_dma_mask = DMA_BIT_MASK(32),
826 },
827 .resource = pxa27x_resource_ssp3,
828 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
829};
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +0200830
eric miao75540c12008-04-13 21:44:04 +0100831static struct resource pxa27x_resource_pwm0[] = {
832 [0] = {
833 .start = 0x40b00000,
834 .end = 0x40b0001f,
835 .flags = IORESOURCE_MEM,
836 },
837};
838
839struct platform_device pxa27x_device_pwm0 = {
840 .name = "pxa27x-pwm",
841 .id = 0,
842 .resource = pxa27x_resource_pwm0,
843 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
844};
845
846static struct resource pxa27x_resource_pwm1[] = {
847 [0] = {
848 .start = 0x40c00000,
849 .end = 0x40c0001f,
850 .flags = IORESOURCE_MEM,
851 },
852};
853
854struct platform_device pxa27x_device_pwm1 = {
855 .name = "pxa27x-pwm",
856 .id = 1,
857 .resource = pxa27x_resource_pwm1,
858 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
859};
Haojian Zhuanga4553352010-11-24 11:54:19 +0800860#endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
eric miao8f58de72007-12-19 17:14:02 +0800861
862#ifdef CONFIG_PXA3xx
Bridge Wu8d33b052007-12-21 19:15:36 +0800863static struct resource pxa3xx_resources_mci2[] = {
864 [0] = {
865 .start = 0x42000000,
866 .end = 0x42000fff,
867 .flags = IORESOURCE_MEM,
868 },
869 [1] = {
870 .start = IRQ_MMC2,
871 .end = IRQ_MMC2,
872 .flags = IORESOURCE_IRQ,
873 },
874 [2] = {
875 .start = 93,
876 .end = 93,
877 .flags = IORESOURCE_DMA,
878 },
879 [3] = {
880 .start = 94,
881 .end = 94,
882 .flags = IORESOURCE_DMA,
883 },
884};
885
886struct platform_device pxa3xx_device_mci2 = {
887 .name = "pxa2xx-mci",
888 .id = 1,
889 .dev = {
890 .dma_mask = &pxamci_dmamask,
891 .coherent_dma_mask = 0xffffffff,
892 },
893 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
894 .resource = pxa3xx_resources_mci2,
895};
896
897void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
898{
899 pxa_register_device(&pxa3xx_device_mci2, info);
900}
901
Bridge Wu5a1f21b2007-12-21 19:27:08 +0800902static struct resource pxa3xx_resources_mci3[] = {
903 [0] = {
904 .start = 0x42500000,
905 .end = 0x42500fff,
906 .flags = IORESOURCE_MEM,
907 },
908 [1] = {
909 .start = IRQ_MMC3,
910 .end = IRQ_MMC3,
911 .flags = IORESOURCE_IRQ,
912 },
913 [2] = {
914 .start = 100,
915 .end = 100,
916 .flags = IORESOURCE_DMA,
917 },
918 [3] = {
919 .start = 101,
920 .end = 101,
921 .flags = IORESOURCE_DMA,
922 },
923};
924
925struct platform_device pxa3xx_device_mci3 = {
926 .name = "pxa2xx-mci",
927 .id = 2,
928 .dev = {
929 .dma_mask = &pxamci_dmamask,
930 .coherent_dma_mask = 0xffffffff,
931 },
932 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
933 .resource = pxa3xx_resources_mci3,
934};
935
936void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
937{
938 pxa_register_device(&pxa3xx_device_mci3, info);
939}
940
Haojian Zhuanga4553352010-11-24 11:54:19 +0800941static struct resource pxa3xx_resources_gcu[] = {
942 {
943 .start = 0x54000000,
944 .end = 0x54000fff,
945 .flags = IORESOURCE_MEM,
946 },
947 {
948 .start = IRQ_GCU,
949 .end = IRQ_GCU,
950 .flags = IORESOURCE_IRQ,
951 },
952};
953
954static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
955
956struct platform_device pxa3xx_device_gcu = {
957 .name = "pxa3xx-gcu",
958 .id = -1,
959 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
960 .resource = pxa3xx_resources_gcu,
961 .dev = {
962 .dma_mask = &pxa3xx_gcu_dmamask,
963 .coherent_dma_mask = 0xffffffff,
964 },
965};
966
967#endif /* CONFIG_PXA3xx */
968
969#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
970static struct resource pxa3xx_resources_i2c_power[] = {
971 {
972 .start = 0x40f500c0,
973 .end = 0x40f500d3,
974 .flags = IORESOURCE_MEM,
975 }, {
976 .start = IRQ_PWRI2C,
977 .end = IRQ_PWRI2C,
978 .flags = IORESOURCE_IRQ,
979 },
980};
981
982struct platform_device pxa3xx_device_i2c_power = {
983 .name = "pxa3xx-pwri2c",
984 .id = 1,
985 .resource = pxa3xx_resources_i2c_power,
986 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
987};
988
Eric Miao9ae819a2008-06-02 15:22:03 +0800989static struct resource pxa3xx_resources_nand[] = {
990 [0] = {
991 .start = 0x43100000,
992 .end = 0x43100053,
993 .flags = IORESOURCE_MEM,
994 },
995 [1] = {
996 .start = IRQ_NAND,
997 .end = IRQ_NAND,
998 .flags = IORESOURCE_IRQ,
999 },
1000 [2] = {
1001 /* DRCMR for Data DMA */
1002 .start = 97,
1003 .end = 97,
1004 .flags = IORESOURCE_DMA,
1005 },
1006 [3] = {
1007 /* DRCMR for Command DMA */
1008 .start = 99,
1009 .end = 99,
1010 .flags = IORESOURCE_DMA,
1011 },
1012};
1013
1014static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1015
1016struct platform_device pxa3xx_device_nand = {
1017 .name = "pxa3xx-nand",
1018 .id = -1,
1019 .dev = {
1020 .dma_mask = &pxa3xx_nand_dma_mask,
1021 .coherent_dma_mask = DMA_BIT_MASK(32),
1022 },
1023 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
1024 .resource = pxa3xx_resources_nand,
1025};
1026
1027void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1028{
1029 pxa_register_device(&pxa3xx_device_nand, info);
1030}
Daniel Mack1ff2c332009-07-09 19:04:49 +02001031
Haojian Zhuanga4553352010-11-24 11:54:19 +08001032static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1033
1034static struct resource pxa3xx_resource_ssp4[] = {
1035 [0] = {
1036 .start = 0x41a00000,
1037 .end = 0x41a0003f,
Daniel Mack1ff2c332009-07-09 19:04:49 +02001038 .flags = IORESOURCE_MEM,
1039 },
Haojian Zhuanga4553352010-11-24 11:54:19 +08001040 [1] = {
1041 .start = IRQ_SSP4,
1042 .end = IRQ_SSP4,
Daniel Mack1ff2c332009-07-09 19:04:49 +02001043 .flags = IORESOURCE_IRQ,
1044 },
Haojian Zhuanga4553352010-11-24 11:54:19 +08001045 [2] = {
1046 /* DRCMR for RX */
1047 .start = 2,
1048 .end = 2,
1049 .flags = IORESOURCE_DMA,
1050 },
1051 [3] = {
1052 /* DRCMR for TX */
1053 .start = 3,
1054 .end = 3,
1055 .flags = IORESOURCE_DMA,
Daniel Mack1ff2c332009-07-09 19:04:49 +02001056 },
1057};
1058
Haojian Zhuanga4553352010-11-24 11:54:19 +08001059struct platform_device pxa3xx_device_ssp4 = {
1060 /* PXA3xx SSP is basically equivalent to PXA27x */
1061 .name = "pxa27x-ssp",
1062 .id = 3,
1063 .dev = {
1064 .dma_mask = &pxa3xx_ssp4_dma_mask,
1065 .coherent_dma_mask = DMA_BIT_MASK(32),
1066 },
1067 .resource = pxa3xx_resource_ssp4,
1068 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
1069};
1070#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
Guennadi Liakhovetskie1722742008-06-13 09:17:31 +01001071
Haojian Zhuang157d2642011-10-17 20:37:52 +08001072struct resource pxa_resource_gpio[] = {
1073 {
1074 .start = 0x40e00000,
1075 .end = 0x40e0ffff,
1076 .flags = IORESOURCE_MEM,
1077 }, {
1078 .start = IRQ_GPIO0,
1079 .end = IRQ_GPIO0,
1080 .name = "gpio0",
1081 .flags = IORESOURCE_IRQ,
1082 }, {
1083 .start = IRQ_GPIO1,
1084 .end = IRQ_GPIO1,
1085 .name = "gpio1",
1086 .flags = IORESOURCE_IRQ,
1087 }, {
1088 .start = IRQ_GPIO_2_x,
1089 .end = IRQ_GPIO_2_x,
1090 .name = "gpio_mux",
1091 .flags = IORESOURCE_IRQ,
1092 },
1093};
1094
1095struct platform_device pxa_device_gpio = {
1096 .name = "pxa-gpio",
1097 .id = -1,
1098 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1099 .resource = pxa_resource_gpio,
1100};
1101
Guennadi Liakhovetskie1722742008-06-13 09:17:31 +01001102/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1103 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1104void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1105{
1106 struct platform_device *pd;
1107
1108 pd = platform_device_alloc("pxa2xx-spi", id);
1109 if (pd == NULL) {
1110 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1111 id);
1112 return;
1113 }
1114
1115 pd->dev.platform_data = info;
1116 platform_device_add(pd);
1117}