blob: 97033fea102e0548f143cd587c37e4988cdc88de [file] [log] [blame]
Roy Huang24a07a12007-07-12 22:41:45 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Roy Huang24a07a12007-07-12 22:41:45 +08005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Roy Huang24a07a12007-07-12 22:41:45 +08007 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
Mike Frysingerde8c43f2008-01-24 17:14:04 +080013#include <linux/mtd/physmap.h>
Roy Huang24a07a12007-07-12 22:41:45 +080014#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080016#include <linux/irq.h>
Bryan Wu81d9c7f2008-03-26 10:02:13 +080017#include <linux/i2c.h>
Roy Huang24a07a12007-07-12 22:41:45 +080018#include <linux/interrupt.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080019#include <linux/usb/musb.h>
Roy Huang24a07a12007-07-12 22:41:45 +080020#include <asm/bfin5xx_spi.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080021#include <asm/dma.h>
22#include <asm/gpio.h>
23#include <asm/nand.h>
Michael Hennerich14b03202008-05-07 11:41:26 +080024#include <asm/dpmc.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080025#include <asm/portmux.h>
Cliff Cai501674a2009-01-07 23:14:38 +080026#include <asm/bfin_sdh.h>
Bryan Wu639f6572008-08-27 10:51:02 +080027#include <mach/bf54x_keys.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080028#include <linux/input.h>
29#include <linux/spi/ad7877.h>
Roy Huang24a07a12007-07-12 22:41:45 +080030
31/*
32 * Name the Board for the /proc/cpuinfo
33 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080034const char bfin_board_name[] = "ADI BF548-EZKIT";
Roy Huang24a07a12007-07-12 22:41:45 +080035
36/*
37 * Driver needs to know address, irq and flag pin.
38 */
39
Michael Hennerich0a6304a2008-07-26 16:14:57 +080040#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
Michael Hennerich3f375692008-11-18 17:48:22 +080041#include <linux/usb/isp1760.h>
42static struct resource bfin_isp1760_resources[] = {
Michael Hennerich0a6304a2008-07-26 16:14:57 +080043 [0] = {
Michael Hennerich0a6304a2008-07-26 16:14:57 +080044 .start = 0x2C0C0000,
45 .end = 0x2C0C0000 + 0xfffff,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = IRQ_PG7,
50 .end = IRQ_PG7,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
Michael Hennerich3f375692008-11-18 17:48:22 +080055static struct isp1760_platform_data isp1760_priv = {
56 .is_isp1761 = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080057 .bus_width_16 = 1,
58 .port1_otg = 0,
59 .analog_oc = 0,
60 .dack_polarity_high = 0,
61 .dreq_polarity_high = 0,
62};
63
64static struct platform_device bfin_isp1760_device = {
Michael Hennerichc6feb762009-10-15 10:37:33 +000065 .name = "isp1760",
Michael Hennerich0a6304a2008-07-26 16:14:57 +080066 .id = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080067 .dev = {
68 .platform_data = &isp1760_priv,
69 },
70 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
71 .resource = bfin_isp1760_resources,
Michael Hennerich0a6304a2008-07-26 16:14:57 +080072};
Michael Hennerich0a6304a2008-07-26 16:14:57 +080073#endif
74
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080075#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
76
Bryan Wu639f6572008-08-27 10:51:02 +080077#include <mach/bf54x-lq043.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080078
79static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
Stefan Pledl0e101ec2009-07-29 08:09:45 +000080 .width = 95,
81 .height = 54,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080082 .xres = {480, 480, 480},
83 .yres = {272, 272, 272},
84 .bpp = {24, 24, 24},
85 .disp = GPIO_PE3,
86};
87
88static struct resource bf54x_lq043_resources[] = {
89 {
90 .start = IRQ_EPPI0_ERR,
91 .end = IRQ_EPPI0_ERR,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96static struct platform_device bf54x_lq043_device = {
97 .name = "bf54x-lq043",
98 .id = -1,
99 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
100 .resource = bf54x_lq043_resources,
101 .dev = {
102 .platform_data = &bf54x_lq043_data,
103 },
104};
105#endif
106
107#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
Michael Hennerich8f740ef2007-10-13 00:36:46 -0400108static const unsigned int bf548_keymap[] = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800109 KEYVAL(0, 0, KEY_ENTER),
110 KEYVAL(0, 1, KEY_HELP),
111 KEYVAL(0, 2, KEY_0),
112 KEYVAL(0, 3, KEY_BACKSPACE),
113 KEYVAL(1, 0, KEY_TAB),
114 KEYVAL(1, 1, KEY_9),
115 KEYVAL(1, 2, KEY_8),
116 KEYVAL(1, 3, KEY_7),
117 KEYVAL(2, 0, KEY_DOWN),
118 KEYVAL(2, 1, KEY_6),
119 KEYVAL(2, 2, KEY_5),
120 KEYVAL(2, 3, KEY_4),
121 KEYVAL(3, 0, KEY_UP),
122 KEYVAL(3, 1, KEY_3),
123 KEYVAL(3, 2, KEY_2),
124 KEYVAL(3, 3, KEY_1),
125};
126
127static struct bfin_kpad_platform_data bf54x_kpad_data = {
128 .rows = 4,
129 .cols = 4,
Michael Hennerich8f740ef2007-10-13 00:36:46 -0400130 .keymap = bf548_keymap,
131 .keymapsize = ARRAY_SIZE(bf548_keymap),
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800132 .repeat = 0,
133 .debounce_time = 5000, /* ns (5ms) */
134 .coldrive_time = 1000, /* ns (1ms) */
135 .keyup_test_interval = 50, /* ms (50ms) */
136};
137
138static struct resource bf54x_kpad_resources[] = {
139 {
140 .start = IRQ_KEY,
141 .end = IRQ_KEY,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static struct platform_device bf54x_kpad_device = {
147 .name = "bf54x-keys",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
150 .resource = bf54x_kpad_resources,
151 .dev = {
152 .platform_data = &bf54x_kpad_data,
153 },
154};
155#endif
156
Michael Hennerichadfc0462009-10-09 07:37:03 +0000157#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
Michael Hennerichaca5e4a2008-10-08 14:27:59 +0800158#include <asm/bfin_rotary.h>
159
160static struct bfin_rotary_platform_data bfin_rotary_data = {
161 /*.rotary_up_key = KEY_UP,*/
162 /*.rotary_down_key = KEY_DOWN,*/
163 .rotary_rel_code = REL_WHEEL,
164 .rotary_button_key = KEY_ENTER,
165 .debounce = 10, /* 0..17 */
166 .mode = ROT_QUAD_ENC | ROT_DEBE,
167};
168
169static struct resource bfin_rotary_resources[] = {
170 {
171 .start = IRQ_CNT,
172 .end = IRQ_CNT,
173 .flags = IORESOURCE_IRQ,
174 },
175};
176
177static struct platform_device bfin_rotary_device = {
178 .name = "bfin-rotary",
179 .id = -1,
180 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
181 .resource = bfin_rotary_resources,
182 .dev = {
183 .platform_data = &bfin_rotary_data,
184 },
185};
186#endif
187
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000188#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000189#include <linux/input/adxl34x.h>
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000190static const struct adxl34x_platform_data adxl34x_info = {
191 .x_axis_offset = 0,
192 .y_axis_offset = 0,
193 .z_axis_offset = 0,
194 .tap_threshold = 0x31,
195 .tap_duration = 0x10,
196 .tap_latency = 0x60,
197 .tap_window = 0xF0,
198 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
199 .act_axis_control = 0xFF,
200 .activity_threshold = 5,
201 .inactivity_threshold = 3,
202 .inactivity_time = 4,
203 .free_fall_threshold = 0x7,
204 .free_fall_time = 0x20,
205 .data_rate = 0x8,
206 .data_range = ADXL_FULL_RES,
207
208 .ev_type = EV_ABS,
209 .ev_code_x = ABS_X, /* EV_REL */
210 .ev_code_y = ABS_Y, /* EV_REL */
211 .ev_code_z = ABS_Z, /* EV_REL */
212
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000213 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000214
215/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
216/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
217 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
218 .fifo_mode = ADXL_FIFO_STREAM,
Michael Hennerich5db40362009-10-29 13:48:10 +0000219 .orientation_enable = ADXL_EN_ORIENTATION_3D,
220 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
221 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
222 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
223 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000224};
225#endif
226
Roy Huang24a07a12007-07-12 22:41:45 +0800227#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
228static struct platform_device rtc_device = {
229 .name = "rtc-bfin",
230 .id = -1,
231};
232#endif
233
234#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Roy Huang24a07a12007-07-12 22:41:45 +0800235#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000236static struct resource bfin_uart0_resources[] = {
Roy Huang24a07a12007-07-12 22:41:45 +0800237 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000238 .start = UART0_DLL,
239 .end = UART0_RBR+2,
Roy Huang24a07a12007-07-12 22:41:45 +0800240 .flags = IORESOURCE_MEM,
241 },
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000242 {
243 .start = IRQ_UART0_RX,
244 .end = IRQ_UART0_RX+1,
245 .flags = IORESOURCE_IRQ,
246 },
247 {
248 .start = IRQ_UART0_ERROR,
249 .end = IRQ_UART0_ERROR,
250 .flags = IORESOURCE_IRQ,
251 },
252 {
253 .start = CH_UART0_TX,
254 .end = CH_UART0_TX,
255 .flags = IORESOURCE_DMA,
256 },
257 {
258 .start = CH_UART0_RX,
259 .end = CH_UART0_RX,
260 .flags = IORESOURCE_DMA,
261 },
262};
263
264unsigned short bfin_uart0_peripherals[] = {
265 P_UART0_TX, P_UART0_RX, 0
266};
267
268static struct platform_device bfin_uart0_device = {
269 .name = "bfin-uart",
270 .id = 0,
271 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
272 .resource = bfin_uart0_resources,
273 .dev = {
274 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
275 },
276};
Roy Huang24a07a12007-07-12 22:41:45 +0800277#endif
278#ifdef CONFIG_SERIAL_BFIN_UART1
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000279static struct resource bfin_uart1_resources[] = {
Roy Huang24a07a12007-07-12 22:41:45 +0800280 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000281 .start = UART1_DLL,
282 .end = UART1_RBR+2,
Roy Huang24a07a12007-07-12 22:41:45 +0800283 .flags = IORESOURCE_MEM,
284 },
Roy Huang24a07a12007-07-12 22:41:45 +0800285 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000286 .start = IRQ_UART1_RX,
287 .end = IRQ_UART1_RX+1,
288 .flags = IORESOURCE_IRQ,
Roy Huang24a07a12007-07-12 22:41:45 +0800289 },
Roy Huang24a07a12007-07-12 22:41:45 +0800290 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000291 .start = IRQ_UART1_ERROR,
292 .end = IRQ_UART1_ERROR,
293 .flags = IORESOURCE_IRQ,
294 },
295 {
296 .start = CH_UART1_TX,
297 .end = CH_UART1_TX,
298 .flags = IORESOURCE_DMA,
299 },
300 {
301 .start = CH_UART1_RX,
302 .end = CH_UART1_RX,
303 .flags = IORESOURCE_DMA,
304 },
305#ifdef CONFIG_BFIN_UART1_CTSRTS
306 { /* CTS pin -- 0 means not supported */
307 .start = GPIO_PE10,
308 .end = GPIO_PE10,
309 .flags = IORESOURCE_IO,
310 },
311 { /* RTS pin -- 0 means not supported */
312 .start = GPIO_PE9,
313 .end = GPIO_PE9,
314 .flags = IORESOURCE_IO,
Roy Huang24a07a12007-07-12 22:41:45 +0800315 },
316#endif
317};
318
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000319unsigned short bfin_uart1_peripherals[] = {
320 P_UART1_TX, P_UART1_RX,
321#ifdef CONFIG_BFIN_UART1_CTSRTS
322 P_UART1_RTS, P_UART1_CTS,
323#endif
324 0
325};
326
327static struct platform_device bfin_uart1_device = {
Roy Huang24a07a12007-07-12 22:41:45 +0800328 .name = "bfin-uart",
329 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000330 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
331 .resource = bfin_uart1_resources,
332 .dev = {
333 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
334 },
Roy Huang24a07a12007-07-12 22:41:45 +0800335};
336#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000337#ifdef CONFIG_SERIAL_BFIN_UART2
338static struct resource bfin_uart2_resources[] = {
339 {
340 .start = UART2_DLL,
341 .end = UART2_RBR+2,
342 .flags = IORESOURCE_MEM,
343 },
344 {
345 .start = IRQ_UART2_RX,
346 .end = IRQ_UART2_RX+1,
347 .flags = IORESOURCE_IRQ,
348 },
349 {
350 .start = IRQ_UART2_ERROR,
351 .end = IRQ_UART2_ERROR,
352 .flags = IORESOURCE_IRQ,
353 },
354 {
355 .start = CH_UART2_TX,
356 .end = CH_UART2_TX,
357 .flags = IORESOURCE_DMA,
358 },
359 {
360 .start = CH_UART2_RX,
361 .end = CH_UART2_RX,
362 .flags = IORESOURCE_DMA,
363 },
364};
365
366unsigned short bfin_uart2_peripherals[] = {
367 P_UART2_TX, P_UART2_RX, 0
368};
369
370static struct platform_device bfin_uart2_device = {
371 .name = "bfin-uart",
372 .id = 2,
373 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
374 .resource = bfin_uart2_resources,
375 .dev = {
376 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
377 },
378};
379#endif
380#ifdef CONFIG_SERIAL_BFIN_UART3
381static struct resource bfin_uart3_resources[] = {
382 {
383 .start = UART3_DLL,
384 .end = UART3_RBR+2,
385 .flags = IORESOURCE_MEM,
386 },
387 {
388 .start = IRQ_UART3_RX,
389 .end = IRQ_UART3_RX+1,
390 .flags = IORESOURCE_IRQ,
391 },
392 {
393 .start = IRQ_UART3_ERROR,
394 .end = IRQ_UART3_ERROR,
395 .flags = IORESOURCE_IRQ,
396 },
397 {
398 .start = CH_UART3_TX,
399 .end = CH_UART3_TX,
400 .flags = IORESOURCE_DMA,
401 },
402 {
403 .start = CH_UART3_RX,
404 .end = CH_UART3_RX,
405 .flags = IORESOURCE_DMA,
406 },
407#ifdef CONFIG_BFIN_UART3_CTSRTS
408 { /* CTS pin -- 0 means not supported */
409 .start = GPIO_PB3,
410 .end = GPIO_PB3,
411 .flags = IORESOURCE_IO,
412 },
413 { /* RTS pin -- 0 means not supported */
414 .start = GPIO_PB2,
415 .end = GPIO_PB2,
416 .flags = IORESOURCE_IO,
417 },
418#endif
419};
420
421unsigned short bfin_uart3_peripherals[] = {
422 P_UART3_TX, P_UART3_RX,
423#ifdef CONFIG_BFIN_UART3_CTSRTS
424 P_UART3_RTS, P_UART3_CTS,
425#endif
426 0
427};
428
429static struct platform_device bfin_uart3_device = {
430 .name = "bfin-uart",
431 .id = 3,
432 .num_resources = ARRAY_SIZE(bfin_uart3_resources),
433 .resource = bfin_uart3_resources,
434 .dev = {
435 .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
436 },
437};
438#endif
439#endif
Roy Huang24a07a12007-07-12 22:41:45 +0800440
Graf Yang5be36d22008-04-25 03:09:15 +0800441#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +0800442#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800443static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800444 {
445 .start = 0xFFC00400,
446 .end = 0xFFC004FF,
447 .flags = IORESOURCE_MEM,
448 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800449 {
450 .start = IRQ_UART0_RX,
451 .end = IRQ_UART0_RX+1,
452 .flags = IORESOURCE_IRQ,
453 },
454 {
455 .start = CH_UART0_RX,
456 .end = CH_UART0_RX+1,
457 .flags = IORESOURCE_DMA,
458 },
459};
460static struct platform_device bfin_sir0_device = {
461 .name = "bfin_sir",
462 .id = 0,
463 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
464 .resource = bfin_sir0_resources,
465};
Graf Yang5be36d22008-04-25 03:09:15 +0800466#endif
467#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800468static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800469 {
470 .start = 0xFFC02000,
471 .end = 0xFFC020FF,
472 .flags = IORESOURCE_MEM,
473 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800474 {
475 .start = IRQ_UART1_RX,
476 .end = IRQ_UART1_RX+1,
477 .flags = IORESOURCE_IRQ,
478 },
479 {
480 .start = CH_UART1_RX,
481 .end = CH_UART1_RX+1,
482 .flags = IORESOURCE_DMA,
483 },
484};
485static struct platform_device bfin_sir1_device = {
486 .name = "bfin_sir",
487 .id = 1,
488 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
489 .resource = bfin_sir1_resources,
490};
Graf Yang5be36d22008-04-25 03:09:15 +0800491#endif
492#ifdef CONFIG_BFIN_SIR2
Graf Yang42bd8bc2009-01-07 23:14:39 +0800493static struct resource bfin_sir2_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800494 {
495 .start = 0xFFC02100,
496 .end = 0xFFC021FF,
497 .flags = IORESOURCE_MEM,
498 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800499 {
500 .start = IRQ_UART2_RX,
501 .end = IRQ_UART2_RX+1,
502 .flags = IORESOURCE_IRQ,
503 },
504 {
505 .start = CH_UART2_RX,
506 .end = CH_UART2_RX+1,
507 .flags = IORESOURCE_DMA,
508 },
509};
510static struct platform_device bfin_sir2_device = {
511 .name = "bfin_sir",
512 .id = 2,
513 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
514 .resource = bfin_sir2_resources,
515};
Graf Yang5be36d22008-04-25 03:09:15 +0800516#endif
517#ifdef CONFIG_BFIN_SIR3
Graf Yang42bd8bc2009-01-07 23:14:39 +0800518static struct resource bfin_sir3_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800519 {
520 .start = 0xFFC03100,
521 .end = 0xFFC031FF,
522 .flags = IORESOURCE_MEM,
523 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800524 {
525 .start = IRQ_UART3_RX,
526 .end = IRQ_UART3_RX+1,
527 .flags = IORESOURCE_IRQ,
528 },
529 {
530 .start = CH_UART3_RX,
531 .end = CH_UART3_RX+1,
532 .flags = IORESOURCE_DMA,
533 },
Graf Yang5be36d22008-04-25 03:09:15 +0800534};
Graf Yang42bd8bc2009-01-07 23:14:39 +0800535static struct platform_device bfin_sir3_device = {
Graf Yang5be36d22008-04-25 03:09:15 +0800536 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800537 .id = 3,
538 .num_resources = ARRAY_SIZE(bfin_sir3_resources),
539 .resource = bfin_sir3_resources,
Graf Yang5be36d22008-04-25 03:09:15 +0800540};
541#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800542#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800543
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800544#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
Mike Frysinger7a8b71d2009-06-05 20:41:17 -0400545#include <linux/smsc911x.h>
546
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800547static struct resource smsc911x_resources[] = {
548 {
549 .name = "smsc911x-memory",
550 .start = 0x24000000,
551 .end = 0x24000000 + 0xFF,
552 .flags = IORESOURCE_MEM,
553 },
554 {
555 .start = IRQ_PE8,
556 .end = IRQ_PE8,
557 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
558 },
559};
Mike Frysinger7a8b71d2009-06-05 20:41:17 -0400560
561static struct smsc911x_platform_config smsc911x_config = {
562 .flags = SMSC911X_USE_32BIT,
563 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
564 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
565 .phy_interface = PHY_INTERFACE_MODE_MII,
566};
567
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800568static struct platform_device smsc911x_device = {
569 .name = "smsc911x",
570 .id = 0,
571 .num_resources = ARRAY_SIZE(smsc911x_resources),
572 .resource = smsc911x_resources,
Mike Frysinger7a8b71d2009-06-05 20:41:17 -0400573 .dev = {
574 .platform_data = &smsc911x_config,
575 },
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800576};
577#endif
578
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800579#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
580static struct resource musb_resources[] = {
581 [0] = {
582 .start = 0xFFC03C00,
583 .end = 0xFFC040FF,
584 .flags = IORESOURCE_MEM,
585 },
586 [1] = { /* general IRQ */
587 .start = IRQ_USB_INT0,
588 .end = IRQ_USB_INT0,
589 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
590 },
591 [2] = { /* DMA IRQ */
592 .start = IRQ_USB_DMA,
593 .end = IRQ_USB_DMA,
594 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
595 },
596};
597
Bryan Wu50041ac2008-10-08 13:39:40 +0800598static struct musb_hdrc_config musb_config = {
599 .multipoint = 0,
600 .dyn_fifo = 0,
601 .soft_con = 1,
602 .dma = 1,
Bryan Wufea05da2009-01-07 23:14:39 +0800603 .num_eps = 8,
604 .dma_channels = 8,
Bryan Wu50041ac2008-10-08 13:39:40 +0800605 .gpio_vrsel = GPIO_PE7,
606};
607
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800608static struct musb_hdrc_platform_data musb_plat = {
Bryan Wu29350772007-12-24 12:20:19 +0800609#if defined(CONFIG_USB_MUSB_OTG)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800610 .mode = MUSB_OTG,
Bryan Wu29350772007-12-24 12:20:19 +0800611#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800612 .mode = MUSB_HOST,
Bryan Wu29350772007-12-24 12:20:19 +0800613#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800614 .mode = MUSB_PERIPHERAL,
615#endif
Bryan Wu50041ac2008-10-08 13:39:40 +0800616 .config = &musb_config,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800617};
618
619static u64 musb_dmamask = ~(u32)0;
620
621static struct platform_device musb_device = {
622 .name = "musb_hdrc",
623 .id = 0,
624 .dev = {
625 .dma_mask = &musb_dmamask,
626 .coherent_dma_mask = 0xffffffff,
627 .platform_data = &musb_plat,
628 },
629 .num_resources = ARRAY_SIZE(musb_resources),
630 .resource = musb_resources,
631};
632#endif
633
Sonic Zhangdf5de262009-09-23 05:01:56 +0000634#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
635#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
636static struct resource bfin_sport0_uart_resources[] = {
637 {
638 .start = SPORT0_TCR1,
639 .end = SPORT0_MRCS3+4,
640 .flags = IORESOURCE_MEM,
641 },
642 {
643 .start = IRQ_SPORT0_RX,
644 .end = IRQ_SPORT0_RX+1,
645 .flags = IORESOURCE_IRQ,
646 },
647 {
648 .start = IRQ_SPORT0_ERROR,
649 .end = IRQ_SPORT0_ERROR,
650 .flags = IORESOURCE_IRQ,
651 },
652};
653
654unsigned short bfin_sport0_peripherals[] = {
655 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
656 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
657};
658
659static struct platform_device bfin_sport0_uart_device = {
660 .name = "bfin-sport-uart",
661 .id = 0,
662 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
663 .resource = bfin_sport0_uart_resources,
664 .dev = {
665 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
666 },
667};
668#endif
669#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
670static struct resource bfin_sport1_uart_resources[] = {
671 {
672 .start = SPORT1_TCR1,
673 .end = SPORT1_MRCS3+4,
674 .flags = IORESOURCE_MEM,
675 },
676 {
677 .start = IRQ_SPORT1_RX,
678 .end = IRQ_SPORT1_RX+1,
679 .flags = IORESOURCE_IRQ,
680 },
681 {
682 .start = IRQ_SPORT1_ERROR,
683 .end = IRQ_SPORT1_ERROR,
684 .flags = IORESOURCE_IRQ,
685 },
686};
687
688unsigned short bfin_sport1_peripherals[] = {
689 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
690 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
691};
692
693static struct platform_device bfin_sport1_uart_device = {
694 .name = "bfin-sport-uart",
695 .id = 1,
696 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
697 .resource = bfin_sport1_uart_resources,
698 .dev = {
699 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
700 },
701};
702#endif
703#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
704static struct resource bfin_sport2_uart_resources[] = {
705 {
706 .start = SPORT2_TCR1,
707 .end = SPORT2_MRCS3+4,
708 .flags = IORESOURCE_MEM,
709 },
710 {
711 .start = IRQ_SPORT2_RX,
712 .end = IRQ_SPORT2_RX+1,
713 .flags = IORESOURCE_IRQ,
714 },
715 {
716 .start = IRQ_SPORT2_ERROR,
717 .end = IRQ_SPORT2_ERROR,
718 .flags = IORESOURCE_IRQ,
719 },
720};
721
722unsigned short bfin_sport2_peripherals[] = {
723 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
724 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
725};
726
727static struct platform_device bfin_sport2_uart_device = {
728 .name = "bfin-sport-uart",
729 .id = 2,
730 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
731 .resource = bfin_sport2_uart_resources,
732 .dev = {
733 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
734 },
735};
736#endif
737#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
738static struct resource bfin_sport3_uart_resources[] = {
739 {
740 .start = SPORT3_TCR1,
741 .end = SPORT3_MRCS3+4,
742 .flags = IORESOURCE_MEM,
743 },
744 {
745 .start = IRQ_SPORT3_RX,
746 .end = IRQ_SPORT3_RX+1,
747 .flags = IORESOURCE_IRQ,
748 },
749 {
750 .start = IRQ_SPORT3_ERROR,
751 .end = IRQ_SPORT3_ERROR,
752 .flags = IORESOURCE_IRQ,
753 },
754};
755
756unsigned short bfin_sport3_peripherals[] = {
757 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
758 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
759};
760
761static struct platform_device bfin_sport3_uart_device = {
762 .name = "bfin-sport-uart",
763 .id = 3,
764 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
765 .resource = bfin_sport3_uart_resources,
766 .dev = {
767 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
768 },
769};
770#endif
771#endif
772
Barry Song706a01b2009-11-02 07:29:07 +0000773#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
774unsigned short bfin_can_peripherals[] = {
775 P_CAN0_RX, P_CAN0_TX, 0
776};
777
778static struct resource bfin_can_resources[] = {
779 {
780 .start = 0xFFC02A00,
781 .end = 0xFFC02FFF,
782 .flags = IORESOURCE_MEM,
783 },
784 {
785 .start = IRQ_CAN0_RX,
786 .end = IRQ_CAN0_RX,
787 .flags = IORESOURCE_IRQ,
788 },
789 {
790 .start = IRQ_CAN0_TX,
791 .end = IRQ_CAN0_TX,
792 .flags = IORESOURCE_IRQ,
793 },
794 {
795 .start = IRQ_CAN0_ERROR,
796 .end = IRQ_CAN0_ERROR,
797 .flags = IORESOURCE_IRQ,
798 },
799};
800
801static struct platform_device bfin_can_device = {
802 .name = "bfin_can",
803 .num_resources = ARRAY_SIZE(bfin_can_resources),
804 .resource = bfin_can_resources,
805 .dev = {
806 .platform_data = &bfin_can_peripherals, /* Passed to driver */
807 },
808};
809#endif
810
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800811#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
812static struct resource bfin_atapi_resources[] = {
813 {
814 .start = 0xFFC03800,
815 .end = 0xFFC0386F,
816 .flags = IORESOURCE_MEM,
817 },
818 {
819 .start = IRQ_ATAPI_ERR,
820 .end = IRQ_ATAPI_ERR,
821 .flags = IORESOURCE_IRQ,
822 },
823};
824
825static struct platform_device bfin_atapi_device = {
826 .name = "pata-bf54x",
827 .id = -1,
828 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
829 .resource = bfin_atapi_resources,
830};
831#endif
832
833#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
834static struct mtd_partition partition_info[] = {
835 {
Robin Getzaa582972008-08-05 17:47:29 +0800836 .name = "linux kernel(nand)",
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800837 .offset = 0,
Mike Frysingerf4585a02008-10-13 14:45:21 +0800838 .size = 4 * 1024 * 1024,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800839 },
840 {
Robin Getzaa582972008-08-05 17:47:29 +0800841 .name = "file system(nand)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800842 .offset = MTDPART_OFS_APPEND,
843 .size = MTDPART_SIZ_FULL,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800844 },
845};
846
847static struct bf5xx_nand_platform bf5xx_nand_platform = {
848 .page_size = NFC_PG_SIZE_256,
849 .data_width = NFC_NWIDTH_8,
850 .partitions = partition_info,
851 .nr_partitions = ARRAY_SIZE(partition_info),
852 .rd_dly = 3,
853 .wr_dly = 3,
854};
855
856static struct resource bf5xx_nand_resources[] = {
857 {
858 .start = 0xFFC03B00,
859 .end = 0xFFC03B4F,
860 .flags = IORESOURCE_MEM,
861 },
862 {
863 .start = CH_NFC,
864 .end = CH_NFC,
865 .flags = IORESOURCE_IRQ,
866 },
867};
868
869static struct platform_device bf5xx_nand_device = {
870 .name = "bf5xx-nand",
871 .id = 0,
872 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
873 .resource = bf5xx_nand_resources,
874 .dev = {
875 .platform_data = &bf5xx_nand_platform,
876 },
877};
878#endif
879
Michael Hennerich3d7e6cf2008-03-03 17:40:28 -0700880#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
Cliff Cai501674a2009-01-07 23:14:38 +0800881
882static struct bfin_sd_host bfin_sdh_data = {
883 .dma_chan = CH_SDH,
884 .irq_int0 = IRQ_SDH_MASK0,
885 .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
886};
887
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800888static struct platform_device bf54x_sdh_device = {
889 .name = "bfin-sdh",
890 .id = 0,
Cliff Cai501674a2009-01-07 23:14:38 +0800891 .dev = {
892 .platform_data = &bfin_sdh_data,
893 },
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800894};
895#endif
896
Mike Frysinger793dc272008-03-26 08:09:12 +0800897#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800898static struct mtd_partition ezkit_partitions[] = {
899 {
Robin Getzaa582972008-08-05 17:47:29 +0800900 .name = "bootloader(nor)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800901 .size = 0x40000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800902 .offset = 0,
903 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800904 .name = "linux kernel(nor)",
Mike Frysinger664d0402008-10-09 17:28:36 +0800905 .size = 0x400000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800906 .offset = MTDPART_OFS_APPEND,
907 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800908 .name = "file system(nor)",
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800909 .size = MTDPART_SIZ_FULL,
910 .offset = MTDPART_OFS_APPEND,
911 }
912};
913
914static struct physmap_flash_data ezkit_flash_data = {
915 .width = 2,
916 .parts = ezkit_partitions,
917 .nr_parts = ARRAY_SIZE(ezkit_partitions),
918};
919
920static struct resource ezkit_flash_resource = {
921 .start = 0x20000000,
Mike Frysinger664d0402008-10-09 17:28:36 +0800922 .end = 0x21ffffff,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800923 .flags = IORESOURCE_MEM,
924};
925
926static struct platform_device ezkit_flash_device = {
927 .name = "physmap-flash",
928 .id = 0,
929 .dev = {
930 .platform_data = &ezkit_flash_data,
931 },
932 .num_resources = 1,
933 .resource = &ezkit_flash_resource,
934};
Mike Frysinger793dc272008-03-26 08:09:12 +0800935#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800936
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800937#if defined(CONFIG_MTD_M25P80) \
938 || defined(CONFIG_MTD_M25P80_MODULE)
939/* SPI flash chip (m25p16) */
940static struct mtd_partition bfin_spi_flash_partitions[] = {
941 {
Robin Getzaa582972008-08-05 17:47:29 +0800942 .name = "bootloader(spi)",
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800943 .size = 0x00040000,
944 .offset = 0,
945 .mask_flags = MTD_CAP_ROM
946 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800947 .name = "linux kernel(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800948 .size = MTDPART_SIZ_FULL,
949 .offset = MTDPART_OFS_APPEND,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800950 }
951};
952
953static struct flash_platform_data bfin_spi_flash_data = {
954 .name = "m25p80",
955 .parts = bfin_spi_flash_partitions,
956 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
957 .type = "m25p16",
958};
959
960static struct bfin5xx_spi_chip spi_flash_chip_info = {
961 .enable_dma = 0, /* use dma transfer with this chip*/
962 .bits_per_word = 8,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800963};
964#endif
965
Bernd Schmidt37fa2422008-04-24 05:19:02 +0800966#if defined(CONFIG_SND_BLACKFIN_AD1836) \
967 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
968static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
969 .enable_dma = 0,
970 .bits_per_word = 16,
971};
972#endif
973
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800974#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
975static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800976 .enable_dma = 0,
977 .bits_per_word = 16,
978};
979
980static const struct ad7877_platform_data bfin_ad7877_ts_info = {
981 .model = 7877,
982 .vref_delay_usecs = 50, /* internal, no capacitor */
983 .x_plate_ohms = 419,
984 .y_plate_ohms = 486,
985 .pressure_max = 1000,
986 .pressure_min = 0,
987 .stopacq_polarity = 1,
988 .first_conversion_delay = 3,
989 .acquisition_time = 1,
990 .averaging = 1,
991 .pen_down_acc_interval = 1,
992};
993#endif
994
Michael Hennerich6e668932008-02-09 01:54:09 +0800995#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
996static struct bfin5xx_spi_chip spidev_chip_info = {
997 .enable_dma = 0,
998 .bits_per_word = 8,
999};
1000#endif
1001
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001002#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1003static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
1004 .enable_dma = 0, /* use dma transfer with this chip*/
1005 .bits_per_word = 8,
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001006};
1007#endif
1008
Mike Frysinger5bda2722008-06-07 15:03:01 +08001009static struct spi_board_info bfin_spi_board_info[] __initdata = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001010#if defined(CONFIG_MTD_M25P80) \
1011 || defined(CONFIG_MTD_M25P80_MODULE)
1012 {
1013 /* the modalias must be the same as spi device driver name */
1014 .modalias = "m25p80", /* Name of spi_driver for this device */
1015 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
1016 .bus_num = 0, /* Framework bus number */
1017 .chip_select = 1, /* SPI_SSEL1*/
1018 .platform_data = &bfin_spi_flash_data,
1019 .controller_data = &spi_flash_chip_info,
1020 .mode = SPI_MODE_3,
1021 },
1022#endif
Bernd Schmidt37fa2422008-04-24 05:19:02 +08001023#if defined(CONFIG_SND_BLACKFIN_AD1836) \
1024 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
1025 {
Barry Songdac98172009-08-13 21:07:37 +00001026 .modalias = "ad1836",
Bernd Schmidt37fa2422008-04-24 05:19:02 +08001027 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1028 .bus_num = 1,
1029 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
1030 .controller_data = &ad1836_spi_chip_info,
1031 },
1032#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001033#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001034 {
1035 .modalias = "ad7877",
1036 .platform_data = &bfin_ad7877_ts_info,
1037 .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
1038 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1039 .bus_num = 0,
1040 .chip_select = 2,
1041 .controller_data = &spi_ad7877_chip_info,
1042 },
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001043#endif
Michael Hennerich6e668932008-02-09 01:54:09 +08001044#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1045 {
1046 .modalias = "spidev",
1047 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1048 .bus_num = 0,
1049 .chip_select = 1,
1050 .controller_data = &spidev_chip_info,
1051 },
1052#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001053#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1054 {
1055 .modalias = "adxl34x",
1056 .platform_data = &adxl34x_info,
1057 .irq = IRQ_PC5,
1058 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1059 .bus_num = 1,
1060 .chip_select = 2,
1061 .controller_data = &spi_adxl34x_chip_info,
1062 .mode = SPI_MODE_3,
1063 },
1064#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001065};
Mike Frysinger5bda2722008-06-07 15:03:01 +08001066#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001067/* SPI (0) */
1068static struct resource bfin_spi0_resource[] = {
1069 [0] = {
1070 .start = SPI0_REGBASE,
1071 .end = SPI0_REGBASE + 0xFF,
1072 .flags = IORESOURCE_MEM,
1073 },
1074 [1] = {
1075 .start = CH_SPI0,
1076 .end = CH_SPI0,
Yi Li53122692009-06-05 12:11:11 +00001077 .flags = IORESOURCE_DMA,
1078 },
1079 [2] = {
1080 .start = IRQ_SPI0,
1081 .end = IRQ_SPI0,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001082 .flags = IORESOURCE_IRQ,
1083 }
1084};
1085
1086/* SPI (1) */
1087static struct resource bfin_spi1_resource[] = {
1088 [0] = {
1089 .start = SPI1_REGBASE,
1090 .end = SPI1_REGBASE + 0xFF,
1091 .flags = IORESOURCE_MEM,
1092 },
1093 [1] = {
1094 .start = CH_SPI1,
1095 .end = CH_SPI1,
Yi Li53122692009-06-05 12:11:11 +00001096 .flags = IORESOURCE_DMA,
1097 },
1098 [2] = {
1099 .start = IRQ_SPI1,
1100 .end = IRQ_SPI1,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001101 .flags = IORESOURCE_IRQ,
1102 }
1103};
1104
1105/* SPI controller data */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001106static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
Yi Li4e4d4962009-08-30 20:45:50 +00001107 .num_chipselect = 3,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001108 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001109 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001110};
1111
1112static struct platform_device bf54x_spi_master0 = {
1113 .name = "bfin-spi",
1114 .id = 0, /* Bus number */
1115 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1116 .resource = bfin_spi0_resource,
1117 .dev = {
Bryan Wu5d448dd2007-11-12 23:24:42 +08001118 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001119 },
1120};
1121
Bryan Wu5d448dd2007-11-12 23:24:42 +08001122static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
Yi Li4e4d4962009-08-30 20:45:50 +00001123 .num_chipselect = 3,
Bryan Wu5d448dd2007-11-12 23:24:42 +08001124 .enable_dma = 1, /* master has the ability to do dma transfer */
1125 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1126};
1127
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001128static struct platform_device bf54x_spi_master1 = {
1129 .name = "bfin-spi",
1130 .id = 1, /* Bus number */
1131 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1132 .resource = bfin_spi1_resource,
1133 .dev = {
Bryan Wu5d448dd2007-11-12 23:24:42 +08001134 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001135 },
1136};
1137#endif /* spi master and devices */
1138
1139#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1140static struct resource bfin_twi0_resource[] = {
1141 [0] = {
1142 .start = TWI0_REGBASE,
1143 .end = TWI0_REGBASE + 0xFF,
1144 .flags = IORESOURCE_MEM,
1145 },
1146 [1] = {
1147 .start = IRQ_TWI0,
1148 .end = IRQ_TWI0,
1149 .flags = IORESOURCE_IRQ,
1150 },
1151};
1152
1153static struct platform_device i2c_bfin_twi0_device = {
1154 .name = "i2c-bfin-twi",
1155 .id = 0,
1156 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1157 .resource = bfin_twi0_resource,
1158};
1159
Mike Frysinger7160e9502007-11-21 16:03:07 +08001160#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001161static struct resource bfin_twi1_resource[] = {
1162 [0] = {
1163 .start = TWI1_REGBASE,
1164 .end = TWI1_REGBASE + 0xFF,
1165 .flags = IORESOURCE_MEM,
1166 },
1167 [1] = {
1168 .start = IRQ_TWI1,
1169 .end = IRQ_TWI1,
1170 .flags = IORESOURCE_IRQ,
1171 },
1172};
1173
1174static struct platform_device i2c_bfin_twi1_device = {
1175 .name = "i2c-bfin-twi",
1176 .id = 1,
1177 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1178 .resource = bfin_twi1_resource,
1179};
1180#endif
Mike Frysinger7160e9502007-11-21 16:03:07 +08001181#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001182
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001183static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1184};
1185
1186#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1187static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
Michael Hennerichebd58332009-07-02 11:00:38 +00001188#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001189 {
1190 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001191 },
1192#endif
Michael Hennerich204844e2009-06-30 14:57:22 +00001193#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001194 {
1195 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001196 .irq = 212,
1197 },
1198#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001199#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1200 {
1201 I2C_BOARD_INFO("adxl34x", 0x53),
1202 .irq = IRQ_PC5,
1203 .platform_data = (void *)&adxl34x_info,
1204 },
1205#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001206};
1207#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001208
Michael Hennerich2463ef22008-01-27 16:49:48 +08001209#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1210#include <linux/gpio_keys.h>
1211
1212static struct gpio_keys_button bfin_gpio_keys_table[] = {
1213 {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
1214 {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
1215 {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
1216 {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
1217};
1218
1219static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1220 .buttons = bfin_gpio_keys_table,
1221 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1222};
1223
1224static struct platform_device bfin_device_gpiokeys = {
1225 .name = "gpio-keys",
1226 .dev = {
1227 .platform_data = &bfin_gpio_keys_data,
1228 },
1229};
1230#endif
1231
Michael Hennerich14b03202008-05-07 11:41:26 +08001232static const unsigned int cclk_vlev_datasheet[] =
1233{
1234/*
1235 * Internal VLEV BF54XSBBC1533
1236 ****temporarily using these values until data sheet is updated
1237 */
1238 VRPAIR(VLEV_085, 150000000),
1239 VRPAIR(VLEV_090, 250000000),
1240 VRPAIR(VLEV_110, 276000000),
1241 VRPAIR(VLEV_115, 301000000),
1242 VRPAIR(VLEV_120, 525000000),
1243 VRPAIR(VLEV_125, 550000000),
1244 VRPAIR(VLEV_130, 600000000),
1245};
1246
1247static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1248 .tuple_tab = cclk_vlev_datasheet,
1249 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1250 .vr_settling_time = 25 /* us */,
1251};
1252
1253static struct platform_device bfin_dpmc = {
1254 .name = "bfin dpmc",
1255 .dev = {
1256 .platform_data = &bfin_dmpc_vreg_data,
1257 },
1258};
1259
Roy Huang24a07a12007-07-12 22:41:45 +08001260static struct platform_device *ezkit_devices[] __initdata = {
Michael Hennerich14b03202008-05-07 11:41:26 +08001261
1262 &bfin_dpmc,
1263
Roy Huang24a07a12007-07-12 22:41:45 +08001264#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1265 &rtc_device,
1266#endif
1267
1268#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001269#ifdef CONFIG_SERIAL_BFIN_UART0
1270 &bfin_uart0_device,
1271#endif
1272#ifdef CONFIG_SERIAL_BFIN_UART1
1273 &bfin_uart1_device,
1274#endif
1275#ifdef CONFIG_SERIAL_BFIN_UART2
1276 &bfin_uart2_device,
1277#endif
1278#ifdef CONFIG_SERIAL_BFIN_UART3
1279 &bfin_uart3_device,
1280#endif
Roy Huang24a07a12007-07-12 22:41:45 +08001281#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001282
Graf Yang5be36d22008-04-25 03:09:15 +08001283#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +08001284#ifdef CONFIG_BFIN_SIR0
1285 &bfin_sir0_device,
1286#endif
1287#ifdef CONFIG_BFIN_SIR1
1288 &bfin_sir1_device,
1289#endif
1290#ifdef CONFIG_BFIN_SIR2
1291 &bfin_sir2_device,
1292#endif
1293#ifdef CONFIG_BFIN_SIR3
1294 &bfin_sir3_device,
1295#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001296#endif
1297
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001298#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
1299 &bf54x_lq043_device,
1300#endif
1301
1302#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
1303 &smsc911x_device,
1304#endif
1305
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001306#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1307 &musb_device,
1308#endif
1309
Michael Hennerich3f375692008-11-18 17:48:22 +08001310#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1311 &bfin_isp1760_device,
1312#endif
1313
Sonic Zhangdf5de262009-09-23 05:01:56 +00001314#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1315#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1316 &bfin_sport0_uart_device,
1317#endif
1318#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1319 &bfin_sport1_uart_device,
1320#endif
1321#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1322 &bfin_sport2_uart_device,
1323#endif
1324#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1325 &bfin_sport3_uart_device,
1326#endif
1327#endif
1328
Barry Song706a01b2009-11-02 07:29:07 +00001329#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1330 &bfin_can_device,
1331#endif
1332
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001333#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
1334 &bfin_atapi_device,
1335#endif
1336
1337#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1338 &bf5xx_nand_device,
1339#endif
1340
Michael Hennerich3d7e6cf2008-03-03 17:40:28 -07001341#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001342 &bf54x_sdh_device,
1343#endif
1344
1345#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1346 &bf54x_spi_master0,
Bryan Wud4b1d272007-10-21 17:03:55 +08001347 &bf54x_spi_master1,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001348#endif
1349
1350#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
1351 &bf54x_kpad_device,
1352#endif
1353
Michael Hennerichadfc0462009-10-09 07:37:03 +00001354#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
Michael Hennerichaca5e4a2008-10-08 14:27:59 +08001355 &bfin_rotary_device,
1356#endif
1357
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001358#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1359 &i2c_bfin_twi0_device,
Mike Frysinger7160e9502007-11-21 16:03:07 +08001360#if !defined(CONFIG_BF542)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001361 &i2c_bfin_twi1_device,
1362#endif
Mike Frysinger7160e9502007-11-21 16:03:07 +08001363#endif
Michael Hennerich2463ef22008-01-27 16:49:48 +08001364
1365#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1366 &bfin_device_gpiokeys,
1367#endif
Mike Frysingercad2ab62008-02-22 17:01:31 +08001368
Mike Frysinger793dc272008-03-26 08:09:12 +08001369#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +08001370 &ezkit_flash_device,
Mike Frysinger793dc272008-03-26 08:09:12 +08001371#endif
Roy Huang24a07a12007-07-12 22:41:45 +08001372};
1373
Mike Frysingera01d7a72008-02-02 15:34:56 +08001374static int __init ezkit_init(void)
Roy Huang24a07a12007-07-12 22:41:45 +08001375{
Harvey Harrisonb85d8582008-04-23 09:39:01 +08001376 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001377
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001378 i2c_register_board_info(0, bfin_i2c_board_info0,
1379 ARRAY_SIZE(bfin_i2c_board_info0));
1380#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1381 i2c_register_board_info(1, bfin_i2c_board_info1,
1382 ARRAY_SIZE(bfin_i2c_board_info1));
1383#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001384
Roy Huang24a07a12007-07-12 22:41:45 +08001385 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001386
Mike Frysinger5bda2722008-06-07 15:03:01 +08001387 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001388
Roy Huang24a07a12007-07-12 22:41:45 +08001389 return 0;
1390}
1391
Mike Frysingera01d7a72008-02-02 15:34:56 +08001392arch_initcall(ezkit_init);