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gerrit-public.fairphone.software / kernel / msm-5.4 / e0373607855d033283b19014c8f14b90b3836924 / . / arch / arm / boot / dts / spear320-evb.dts
blob: 0c6463b71a37968c93fe9cfa879264929dc974a9 [file] [log] [blame]
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]1/*
2 * DTS file for SPEAr320 Evaluation Baord
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "spear320.dtsi"
16
17/ {
18 model = "ST SPEAr300 Evaluation Board";
19 compatible = "st,spear300-evb", "st,spear300";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 memory {
24 reg = <0 0x40000000>;
25 };
26
27 ahb {
Viresh Kumare0373602012-03-29 08:30:19 +0530[diff] [blame^]28 pinmux@b3000000 {
29 st,pinmux-mode = <3>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&state_default>;
32
33 state_default: pinmux {
34 i2c0 {
35 st,pins = "i2c0_grp";
36 st,function = "i2c0";
37 };
38 mii0 {
39 st,pins = "mii0_grp";
40 st,function = "mii0";
41 };
42 ssp0 {
43 st,pins = "ssp0_grp";
44 st,function = "ssp0";
45 };
46 uart0 {
47 st,pins = "uart0_grp";
48 st,function = "uart0";
49 };
50 sdhci {
51 st,pins = "sdhci_cd_51_grp";
52 st,function = "sdhci";
53 };
54 i2s {
55 st,pins = "i2s_grp";
56 st,function = "i2s";
57 };
58 uart1 {
59 st,pins = "uart1_grp";
60 st,function = "uart1";
61 };
62 uart2 {
63 st,pins = "uart2_grp";
64 st,function = "uart2";
65 };
66 can0 {
67 st,pins = "can0_grp";
68 st,function = "can0";
69 };
70 can1 {
71 st,pins = "can1_grp";
72 st,function = "can1";
73 };
74 mii2 {
75 st,pins = "mii2_grp";
76 st,function = "mii2";
77 };
78 pwm0_1 {
79 st,pins = "pwm0_1_pin_14_15_grp";
80 st,function = "pwm0_1";
81 };
82 pwm2 {
83 st,pins = "pwm2_pin_13_grp";
84 st,function = "pwm2";
85 };
86 };
87 };
88
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]89 clcd@90000000 {
90 status = "okay";
91 };
92
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530[diff] [blame]93 dma@fc400000 {
94 status = "okay";
95 };
96
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]97 fsmc: flash@4c000000 {
98 status = "okay";
99 };
100
101 gmac: eth@e0800000 {
102 status = "okay";
103 };
104
105 sdhci@70000000 {
106 power-gpio = <&gpio0 2 1>;
107 power_always_enb;
108 status = "okay";
109 };
110
111 smi: flash@fc000000 {
112 status = "okay";
113 };
114
115 spi0: spi@d0100000 {
116 status = "okay";
117 };
118
119 spi1: spi@a5000000 {
120 status = "okay";
121 };
122
123 spi2: spi@a6000000 {
124 status = "okay";
125 };
126
127 ehci@e1800000 {
128 status = "okay";
129 };
130
131 ohci@e1900000 {
132 status = "okay";
133 };
134
135 ohci@e2100000 {
136 status = "okay";
137 };
138
139 apb {
140 gpio0: gpio@fc980000 {
141 status = "okay";
142 };
143
144 i2c0: i2c@d0180000 {
145 status = "okay";
146 };
147
148 i2c1: i2c@a7000000 {
149 status = "okay";
150 };
151
152 rtc@fc900000 {
153 status = "okay";
154 };
155
156 serial@d0000000 {
157 status = "okay";
158 };
159
160 serial@a3000000 {
161 status = "okay";
162 };
163
164 serial@a4000000 {
165 status = "okay";
166 };
167
168 wdt@fc880000 {
169 status = "okay";
170 };
171 };
172 };
173};