blob: 7e2546b853cae3d21e1229b0670955e1be537489 [file] [log] [blame]
Jerome Anand5dab11d2017-01-25 04:27:52 +05301/*
2 * Copyright (C) 2016 Intel Corporation
3 * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
4 * Ramesh Babu K V <ramesh.babu@intel.com>
5 * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
6 * Jerome Anand <jerome.anand@intel.com>
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining
9 * a copy of this software and associated documentation files
10 * (the "Software"), to deal in the Software without restriction,
11 * including without limitation the rights to use, copy, modify, merge,
12 * publish, distribute, sublicense, and/or sell copies of the Software,
13 * and to permit persons to whom the Software is furnished to do so,
14 * subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial
18 * portions of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
23 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
24 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
25 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
26 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
27 * SOFTWARE.
28 */
29
30#ifndef _INTEL_HDMI_AUDIO_H_
31#define _INTEL_HDMI_AUDIO_H_
32
Jerome Anand5dab11d2017-01-25 04:27:52 +053033#include "intel_hdmi_lpe_audio.h"
34
35#define PCM_INDEX 0
36#define MAX_PB_STREAMS 1
37#define MAX_CAP_STREAMS 0
Jerome Anand5dab11d2017-01-25 04:27:52 +053038
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -060039#define HDMI_INFO_FRAME_WORD1 0x000a0184
40#define DP_INFO_FRAME_WORD1 0x00441b84
Jerome Anand5dab11d2017-01-25 04:27:52 +053041#define FIFO_THRESHOLD 0xFE
42#define DMA_FIFO_THRESHOLD 0x7
43#define BYTES_PER_WORD 0x4
44
45/* Sampling rate as per IEC60958 Ver 3 */
46#define CH_STATUS_MAP_32KHZ 0x3
47#define CH_STATUS_MAP_44KHZ 0x0
48#define CH_STATUS_MAP_48KHZ 0x2
49#define CH_STATUS_MAP_88KHZ 0x8
50#define CH_STATUS_MAP_96KHZ 0xA
51#define CH_STATUS_MAP_176KHZ 0xC
52#define CH_STATUS_MAP_192KHZ 0xE
53
54#define MAX_SMPL_WIDTH_20 0x0
55#define MAX_SMPL_WIDTH_24 0x1
56#define SMPL_WIDTH_16BITS 0x1
57#define SMPL_WIDTH_24BITS 0x5
58#define CHANNEL_ALLOCATION 0x1F
Jerome Anand5dab11d2017-01-25 04:27:52 +053059#define VALID_DIP_WORDS 3
60#define LAYOUT0 0
61#define LAYOUT1 1
62#define SWAP_LFE_CENTER 0x00fac4c8
Takashi Iwai4151ee82017-01-31 18:14:15 +010063#define AUD_CONFIG_CH_MASK 0x70
Jerome Anand5dab11d2017-01-25 04:27:52 +053064
65struct pcm_stream_info {
Takashi Iwai313d9f22017-02-02 13:00:12 +010066 struct snd_pcm_substream *substream;
Takashi Iwai313d9f22017-02-02 13:00:12 +010067 int substream_refcount;
Takashi Iwaif69bd102017-02-02 14:57:22 +010068 bool running;
Jerome Anand5dab11d2017-01-25 04:27:52 +053069};
70
Takashi Iwai03c34372017-02-02 16:19:03 +010071/*
Jerome Anand5dab11d2017-01-25 04:27:52 +053072 * struct snd_intelhad - intelhad driver structure
73 *
74 * @card: ptr to hold card details
Takashi Iwai91b0cb02017-02-02 17:46:49 +010075 * @connected: the monitor connection status
Jerome Anand5dab11d2017-01-25 04:27:52 +053076 * @stream_info: stream information
Takashi Iwaida864802017-01-31 13:52:22 +010077 * @eld: holds ELD info
Jerome Anand5dab11d2017-01-25 04:27:52 +053078 * @curr_buf: pointer to hold current active ring buf
79 * @valid_buf_cnt: ring buffer count for stream
80 * @had_spinlock: driver lock
81 * @aes_bits: IEC958 status bits
82 * @buff_done: id of current buffer done intr
83 * @dev: platoform device handle
Jerome Anand5dab11d2017-01-25 04:27:52 +053084 * @chmap: holds channel map info
Jerome Anand5dab11d2017-01-25 04:27:52 +053085 */
86struct snd_intelhad {
87 struct snd_card *card;
Takashi Iwai91b0cb02017-02-02 17:46:49 +010088 bool connected;
Jerome Anand5dab11d2017-01-25 04:27:52 +053089 struct pcm_stream_info stream_info;
Takashi Iwaidf0435d2017-02-02 15:37:11 +010090 unsigned char eld[HDMI_MAX_ELD_BYTES];
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -060091 bool dp_output;
Jerome Anand5dab11d2017-01-25 04:27:52 +053092 unsigned int aes_bits;
Jerome Anand5dab11d2017-01-25 04:27:52 +053093 spinlock_t had_spinlock;
Jerome Anand5dab11d2017-01-25 04:27:52 +053094 struct device *dev;
Jerome Anand5dab11d2017-01-25 04:27:52 +053095 struct snd_pcm_chmap *chmap;
Takashi Iwaida864802017-01-31 13:52:22 +010096 int tmds_clock_speed;
97 int link_rate;
98
Takashi Iwaie1b239f32017-02-03 00:01:18 +010099 /* ring buffer (BD) position index */
100 unsigned int bd_head;
101 /* PCM buffer position indices */
102 unsigned int pcmbuf_head; /* being processed */
103 unsigned int pcmbuf_filled; /* to be filled */
104
105 unsigned int num_bds; /* number of BDs */
106 unsigned int period_bytes; /* PCM period size in bytes */
107
Takashi Iwaida864802017-01-31 13:52:22 +0100108 /* internal stuff */
109 int irq;
110 void __iomem *mmio_start;
111 unsigned int had_config_offset;
Takashi Iwaida864802017-01-31 13:52:22 +0100112 struct work_struct hdmi_audio_wq;
Takashi Iwai0e9c67d2017-02-01 17:53:19 +0100113 struct mutex mutex; /* for protecting chmap and eld */
Jerome Anand5dab11d2017-01-25 04:27:52 +0530114};
115
Jerome Anand5dab11d2017-01-25 04:27:52 +0530116#endif /* _INTEL_HDMI_AUDIO_ */