blob: dce1ea5f52a85e20bb77fddaf6322c1ecf2152d9 [file] [log] [blame]
Andy Yanb21f4b62014-12-05 14:26:31 +08001/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
2 *
3 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include <linux/component.h>
12#include <linux/mfd/syscon.h>
13#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
14#include <drm/bridge/dw_hdmi.h>
15#include <video/imx-ipu-v3.h>
16#include <linux/regmap.h>
17#include <drm/drm_of.h>
18#include <drm/drmP.h>
19#include <drm/drm_crtc_helper.h>
20#include <drm/drm_edid.h>
21#include <drm/drm_encoder_slave.h>
22
23#include "imx-drm.h"
24
Liu Ying032003c2016-07-08 17:40:58 +080025#define imx_enc_to_imx_hdmi(x) container_of(x, struct imx_hdmi, imx_encoder)
26
Andy Yanb21f4b62014-12-05 14:26:31 +080027struct imx_hdmi {
28 struct device *dev;
Liu Ying032003c2016-07-08 17:40:58 +080029 struct imx_drm_encoder imx_encoder;
Andy Yanb21f4b62014-12-05 14:26:31 +080030 struct regmap *regmap;
31};
32
33static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
34 {
35 45250000, {
36 { 0x01e0, 0x0000 },
37 { 0x21e1, 0x0000 },
38 { 0x41e2, 0x0000 }
39 },
40 }, {
41 92500000, {
42 { 0x0140, 0x0005 },
43 { 0x2141, 0x0005 },
44 { 0x4142, 0x0005 },
45 },
46 }, {
47 148500000, {
48 { 0x00a0, 0x000a },
49 { 0x20a1, 0x000a },
50 { 0x40a2, 0x000a },
51 },
52 }, {
Lucas Stacha5f41852015-10-15 15:42:17 +020053 216000000, {
Andy Yanb21f4b62014-12-05 14:26:31 +080054 { 0x00a0, 0x000a },
55 { 0x2001, 0x000f },
56 { 0x4002, 0x000f },
57 },
Lucas Stacha5f41852015-10-15 15:42:17 +020058 }, {
59 ~0UL, {
60 { 0x0000, 0x0000 },
61 { 0x0000, 0x0000 },
62 { 0x0000, 0x0000 },
63 },
Andy Yanb21f4b62014-12-05 14:26:31 +080064 }
65};
66
67static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
68 /* pixelclk bpp8 bpp10 bpp12 */
69 {
70 54000000, { 0x091c, 0x091c, 0x06dc },
71 }, {
72 58400000, { 0x091c, 0x06dc, 0x06dc },
73 }, {
74 72000000, { 0x06dc, 0x06dc, 0x091c },
75 }, {
76 74250000, { 0x06dc, 0x0b5c, 0x091c },
77 }, {
78 118800000, { 0x091c, 0x091c, 0x06dc },
79 }, {
80 216000000, { 0x06dc, 0x0b5c, 0x091c },
Philipp Zabel6e8958e2015-01-07 23:49:41 +010081 }, {
82 ~0UL, { 0x0000, 0x0000, 0x0000 },
83 },
Andy Yanb21f4b62014-12-05 14:26:31 +080084};
85
Russell King36b8ae02015-03-31 18:23:16 +010086/*
87 * Resistance term 133Ohm Cfg
88 * PREEMP config 0.00
89 * TX/CK level 10
90 */
Yakir Yang034705a2015-03-31 23:56:10 -040091static const struct dw_hdmi_phy_config imx_phy_config[] = {
92 /*pixelclk symbol term vlev */
Lucas Stacha5f41852015-10-15 15:42:17 +020093 { 216000000, 0x800d, 0x0005, 0x01ad},
Yakir Yang034705a2015-03-31 23:56:10 -040094 { ~0UL, 0x0000, 0x0000, 0x0000}
Andy Yanb21f4b62014-12-05 14:26:31 +080095};
96
97static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
98{
99 struct device_node *np = hdmi->dev->of_node;
100
101 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
102 if (IS_ERR(hdmi->regmap)) {
103 dev_err(hdmi->dev, "Unable to get gpr\n");
104 return PTR_ERR(hdmi->regmap);
105 }
106
107 return 0;
108}
109
110static void dw_hdmi_imx_encoder_disable(struct drm_encoder *encoder)
111{
112}
113
Liu Yingf6e396e2016-07-08 17:41:01 +0800114static void dw_hdmi_imx_encoder_enable(struct drm_encoder *encoder)
Andy Yanb21f4b62014-12-05 14:26:31 +0800115{
Liu Ying032003c2016-07-08 17:40:58 +0800116 struct imx_drm_encoder *imx_encoder = enc_to_imx_enc(encoder);
117 struct imx_hdmi *hdmi = imx_enc_to_imx_hdmi(imx_encoder);
Philipp Zabel53141e42015-02-24 11:41:28 +0100118 int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder);
Andy Yanb21f4b62014-12-05 14:26:31 +0800119
120 regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
121 IMX6Q_GPR3_HDMI_MUX_CTL_MASK,
122 mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT);
123}
124
Ville Syrjälä7ae847d2015-12-15 12:21:09 +0100125static const struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = {
Liu Yingf6e396e2016-07-08 17:41:01 +0800126 .enable = dw_hdmi_imx_encoder_enable,
Andy Yanb21f4b62014-12-05 14:26:31 +0800127 .disable = dw_hdmi_imx_encoder_disable,
128};
129
Ville Syrjälä7ae847d2015-12-15 12:21:09 +0100130static const struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = {
Andy Yanb21f4b62014-12-05 14:26:31 +0800131 .destroy = drm_encoder_cleanup,
132};
133
Philipp Zabel081c80e2015-01-07 23:52:15 +0100134static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con,
135 struct drm_display_mode *mode)
136{
137 if (mode->clock < 13500)
138 return MODE_CLOCK_LOW;
Lucas Stacha5f41852015-10-15 15:42:17 +0200139 /* FIXME: Hardware is capable of 266MHz, but setup data is missing. */
140 if (mode->clock > 216000)
Philipp Zabel081c80e2015-01-07 23:52:15 +0100141 return MODE_CLOCK_HIGH;
142
143 return MODE_OK;
144}
145
146static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con,
147 struct drm_display_mode *mode)
148{
149 if (mode->clock < 13500)
150 return MODE_CLOCK_LOW;
Lucas Stacha5f41852015-10-15 15:42:17 +0200151 /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */
152 if (mode->clock > 216000)
Philipp Zabel081c80e2015-01-07 23:52:15 +0100153 return MODE_CLOCK_HIGH;
154
155 return MODE_OK;
156}
157
Andy Yanb21f4b62014-12-05 14:26:31 +0800158static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
Philipp Zabel081c80e2015-01-07 23:52:15 +0100159 .mpll_cfg = imx_mpll_cfg,
160 .cur_ctr = imx_cur_ctr,
Yakir Yang034705a2015-03-31 23:56:10 -0400161 .phy_config = imx_phy_config,
Philipp Zabel081c80e2015-01-07 23:52:15 +0100162 .dev_type = IMX6Q_HDMI,
163 .mode_valid = imx6q_hdmi_mode_valid,
Andy Yanb21f4b62014-12-05 14:26:31 +0800164};
165
166static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
167 .mpll_cfg = imx_mpll_cfg,
168 .cur_ctr = imx_cur_ctr,
Yakir Yang034705a2015-03-31 23:56:10 -0400169 .phy_config = imx_phy_config,
Andy Yanb21f4b62014-12-05 14:26:31 +0800170 .dev_type = IMX6DL_HDMI,
Philipp Zabel081c80e2015-01-07 23:52:15 +0100171 .mode_valid = imx6dl_hdmi_mode_valid,
Andy Yanb21f4b62014-12-05 14:26:31 +0800172};
173
174static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
175 { .compatible = "fsl,imx6q-hdmi",
176 .data = &imx6q_hdmi_drv_data
177 }, {
178 .compatible = "fsl,imx6dl-hdmi",
179 .data = &imx6dl_hdmi_drv_data
180 },
181 {},
182};
183MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids);
184
185static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
186 void *data)
187{
188 struct platform_device *pdev = to_platform_device(dev);
189 const struct dw_hdmi_plat_data *plat_data;
190 const struct of_device_id *match;
191 struct drm_device *drm = data;
192 struct drm_encoder *encoder;
193 struct imx_hdmi *hdmi;
194 struct resource *iores;
195 int irq;
196 int ret;
197
198 if (!pdev->dev.of_node)
199 return -ENODEV;
200
201 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
202 if (!hdmi)
203 return -ENOMEM;
204
205 match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node);
206 plat_data = match->data;
207 hdmi->dev = &pdev->dev;
Liu Ying032003c2016-07-08 17:40:58 +0800208 encoder = &hdmi->imx_encoder.encoder;
209 hdmi->imx_encoder.bus_format = MEDIA_BUS_FMT_RGB888_1X24;
210 hdmi->imx_encoder.di_hsync_pin = 2;
211 hdmi->imx_encoder.di_vsync_pin = 3;
Andy Yanb21f4b62014-12-05 14:26:31 +0800212
213 irq = platform_get_irq(pdev, 0);
214 if (irq < 0)
215 return irq;
216
217 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
218 if (!iores)
219 return -ENXIO;
220
Andy Yanb21f4b62014-12-05 14:26:31 +0800221 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
222 /*
223 * If we failed to find the CRTC(s) which this encoder is
224 * supposed to be connected to, it's because the CRTC has
225 * not been registered yet. Defer probing, and hope that
226 * the required CRTC is added later.
227 */
228 if (encoder->possible_crtcs == 0)
229 return -EPROBE_DEFER;
230
231 ret = dw_hdmi_imx_parse_dt(hdmi);
232 if (ret < 0)
233 return ret;
234
235 drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs);
236 drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs,
Ville Syrjälä13a3d912015-12-09 16:20:18 +0200237 DRM_MODE_ENCODER_TMDS, NULL);
Andy Yanb21f4b62014-12-05 14:26:31 +0800238
Douglas Anderson788c8dd2016-03-07 14:00:51 -0800239 ret = dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
240
241 /*
242 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
243 * which would have called the encoder cleanup. Do it manually.
244 */
245 if (ret)
246 drm_encoder_cleanup(encoder);
247
248 return ret;
Andy Yanb21f4b62014-12-05 14:26:31 +0800249}
250
251static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
252 void *data)
253{
254 return dw_hdmi_unbind(dev, master, data);
255}
256
257static const struct component_ops dw_hdmi_imx_ops = {
258 .bind = dw_hdmi_imx_bind,
259 .unbind = dw_hdmi_imx_unbind,
260};
261
262static int dw_hdmi_imx_probe(struct platform_device *pdev)
263{
264 return component_add(&pdev->dev, &dw_hdmi_imx_ops);
265}
266
267static int dw_hdmi_imx_remove(struct platform_device *pdev)
268{
269 component_del(&pdev->dev, &dw_hdmi_imx_ops);
270
271 return 0;
272}
273
274static struct platform_driver dw_hdmi_imx_platform_driver = {
275 .probe = dw_hdmi_imx_probe,
276 .remove = dw_hdmi_imx_remove,
277 .driver = {
278 .name = "dwhdmi-imx",
279 .of_match_table = dw_hdmi_imx_dt_ids,
280 },
281};
282
283module_platform_driver(dw_hdmi_imx_platform_driver);
284
285MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
286MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
287MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension");
288MODULE_LICENSE("GPL");
289MODULE_ALIAS("platform:dwhdmi-imx");