blob: fe7a7de046fe49b13f5a2743c7f4098fd16f88ed [file] [log] [blame]
Stefano Brivio61bca6e2007-11-06 22:49:05 +01001/*
2
3 Broadcom B43 wireless driver
4
5 PHY workarounds.
6
Stefano Brivio1f21ad22007-11-06 22:49:20 +01007 Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
Stefano Brivio61bca6e2007-11-06 22:49:05 +01008 Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de>
Stefano Brivio61bca6e2007-11-06 22:49:05 +01009
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; see the file COPYING. If not, write to
22 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
23 Boston, MA 02110-1301, USA.
24
25*/
26
27#include "b43.h"
28#include "main.h"
29#include "tables.h"
Michael Bueschef1a6282008-08-27 18:53:02 +020030#include "phy_common.h"
Stefano Brivio61bca6e2007-11-06 22:49:05 +010031#include "wa.h"
32
33static void b43_wa_papd(struct b43_wldev *dev)
34{
35 u16 backup;
36
37 backup = b43_ofdmtab_read16(dev, B43_OFDMTAB_PWRDYN2, 0);
38 b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, 7);
39 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 0, 0);
40 b43_dummy_transmission(dev);
41 b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, backup);
42}
43
44static void b43_wa_auxclipthr(struct b43_wldev *dev)
45{
46 b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x3800);
47}
48
49static void b43_wa_afcdac(struct b43_wldev *dev)
50{
51 b43_phy_write(dev, 0x0035, 0x03FF);
52 b43_phy_write(dev, 0x0036, 0x0400);
53}
54
55static void b43_wa_txdc_offset(struct b43_wldev *dev)
56{
57 b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 0, 0x0051);
58}
59
60void b43_wa_initgains(struct b43_wldev *dev)
61{
62 struct b43_phy *phy = &dev->phy;
63
64 b43_phy_write(dev, B43_PHY_LNAHPFCTL, 0x1FF9);
65 b43_phy_write(dev, B43_PHY_LPFGAINCTL,
66 b43_phy_read(dev, B43_PHY_LPFGAINCTL) & 0xFF0F);
67 if (phy->rev <= 2)
68 b43_ofdmtab_write16(dev, B43_OFDMTAB_LPFGAIN, 0, 0x1FBF);
69 b43_radio_write16(dev, 0x0002, 0x1FBF);
70
71 b43_phy_write(dev, 0x0024, 0x4680);
72 b43_phy_write(dev, 0x0020, 0x0003);
73 b43_phy_write(dev, 0x001D, 0x0F40);
74 b43_phy_write(dev, 0x001F, 0x1C00);
75 if (phy->rev <= 3)
76 b43_phy_write(dev, 0x002A,
77 (b43_phy_read(dev, 0x002A) & 0x00FF) | 0x0400);
78 else if (phy->rev == 5) {
79 b43_phy_write(dev, 0x002A,
80 (b43_phy_read(dev, 0x002A) & 0x00FF) | 0x1A00);
81 b43_phy_write(dev, 0x00CC, 0x2121);
82 }
83 if (phy->rev >= 3)
84 b43_phy_write(dev, 0x00BA, 0x3ED5);
85}
86
87static void b43_wa_divider(struct b43_wldev *dev)
88{
89 b43_phy_write(dev, 0x002B, b43_phy_read(dev, 0x002B) & ~0x0100);
90 b43_phy_write(dev, 0x008E, 0x58C1);
91}
92
93static void b43_wa_gt(struct b43_wldev *dev) /* Gain table. */
94{
95 if (dev->phy.rev <= 2) {
96 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 0, 15);
97 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 1, 31);
98 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 2, 42);
99 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 3, 48);
100 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 4, 58);
101 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19);
102 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19);
103 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19);
104 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19);
105 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21);
106 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21);
107 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25);
108 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 0, 3);
109 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 1, 3);
110 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 2, 7);
111 } else {
112 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19);
113 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19);
114 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19);
115 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19);
116 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21);
117 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21);
118 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25);
119 }
120}
121
122static void b43_wa_rssi_lt(struct b43_wldev *dev) /* RSSI lookup table */
123{
124 int i;
125
Michael Buesch38d1b4c2007-12-12 22:05:18 +0100126 if (0 /* FIXME: For APHY.rev=2 this might be needed */) {
127 for (i = 0; i < 8; i++)
128 b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
129 for (i = 8; i < 16; i++)
130 b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
131 } else {
132 for (i = 0; i < 64; i++)
133 b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i);
134 }
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100135}
136
137static void b43_wa_analog(struct b43_wldev *dev)
138{
139 struct b43_phy *phy = &dev->phy;
Michael Buesch38d1b4c2007-12-12 22:05:18 +0100140 u16 ofdmrev;
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100141
Michael Buesch38d1b4c2007-12-12 22:05:18 +0100142 ofdmrev = b43_phy_read(dev, B43_PHY_VERSION_OFDM) & B43_PHYVER_VERSION;
143 if (ofdmrev > 2) {
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100144 if (phy->type == B43_PHYTYPE_A)
145 b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1808);
146 else
147 b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1000);
148 } else {
149 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 3, 0x1044);
150 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 4, 0x7201);
151 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 6, 0x0040);
152 }
153}
154
155static void b43_wa_dac(struct b43_wldev *dev)
156{
157 if (dev->phy.analog == 1)
158 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1,
159 (b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0034) | 0x0008);
160 else
161 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1,
162 (b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0078) | 0x0010);
163}
164
165static void b43_wa_fft(struct b43_wldev *dev) /* Fine frequency table */
166{
167 int i;
168
169 if (dev->phy.type == B43_PHYTYPE_A)
170 for (i = 0; i < B43_TAB_FINEFREQA_SIZE; i++)
171 b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqa[i]);
172 else
173 for (i = 0; i < B43_TAB_FINEFREQG_SIZE; i++)
174 b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqg[i]);
175}
176
177static void b43_wa_nft(struct b43_wldev *dev) /* Noise figure table */
178{
179 struct b43_phy *phy = &dev->phy;
180 int i;
181
182 if (phy->type == B43_PHYTYPE_A) {
183 if (phy->rev == 2)
184 for (i = 0; i < B43_TAB_NOISEA2_SIZE; i++)
185 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea2[i]);
186 else
187 for (i = 0; i < B43_TAB_NOISEA3_SIZE; i++)
188 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea3[i]);
189 } else {
190 if (phy->rev == 1)
191 for (i = 0; i < B43_TAB_NOISEG1_SIZE; i++)
192 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg1[i]);
193 else
194 for (i = 0; i < B43_TAB_NOISEG2_SIZE; i++)
195 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg2[i]);
196 }
197}
198
199static void b43_wa_rt(struct b43_wldev *dev) /* Rotor table */
200{
201 int i;
202
203 for (i = 0; i < B43_TAB_ROTOR_SIZE; i++)
204 b43_ofdmtab_write32(dev, B43_OFDMTAB_ROTOR, i, b43_tab_rotor[i]);
205}
206
Harvey Harrison40e024d2008-03-08 02:40:38 -0800207static void b43_write_null_nst(struct b43_wldev *dev)
208{
209 int i;
210
211 for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
212 b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, 0);
213}
214
215static void b43_write_nst(struct b43_wldev *dev, const u16 *nst)
216{
217 int i;
218
219 for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
220 b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, nst[i]);
221}
222
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100223static void b43_wa_nst(struct b43_wldev *dev) /* Noise scale table */
224{
225 struct b43_phy *phy = &dev->phy;
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100226
227 if (phy->type == B43_PHYTYPE_A) {
228 if (phy->rev <= 1)
Harvey Harrison40e024d2008-03-08 02:40:38 -0800229 b43_write_null_nst(dev);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100230 else if (phy->rev == 2)
Harvey Harrison40e024d2008-03-08 02:40:38 -0800231 b43_write_nst(dev, b43_tab_noisescalea2);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100232 else if (phy->rev == 3)
Harvey Harrison40e024d2008-03-08 02:40:38 -0800233 b43_write_nst(dev, b43_tab_noisescalea3);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100234 else
Harvey Harrison40e024d2008-03-08 02:40:38 -0800235 b43_write_nst(dev, b43_tab_noisescaleg3);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100236 } else {
237 if (phy->rev >= 6) {
238 if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
Harvey Harrison40e024d2008-03-08 02:40:38 -0800239 b43_write_nst(dev, b43_tab_noisescaleg3);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100240 else
Harvey Harrison40e024d2008-03-08 02:40:38 -0800241 b43_write_nst(dev, b43_tab_noisescaleg2);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100242 } else {
Harvey Harrison40e024d2008-03-08 02:40:38 -0800243 b43_write_nst(dev, b43_tab_noisescaleg1);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100244 }
245 }
246}
247
248static void b43_wa_art(struct b43_wldev *dev) /* ADV retard table */
249{
250 int i;
251
252 for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
253 b43_ofdmtab_write32(dev, B43_OFDMTAB_ADVRETARD,
254 i, b43_tab_retard[i]);
255}
256
257static void b43_wa_txlna_gain(struct b43_wldev *dev)
258{
259 b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 13, 0x0000);
260}
261
262static void b43_wa_crs_reset(struct b43_wldev *dev)
263{
264 b43_phy_write(dev, 0x002C, 0x0064);
265}
266
267static void b43_wa_2060txlna_gain(struct b43_wldev *dev)
268{
269 b43_hf_write(dev, b43_hf_read(dev) |
270 B43_HF_2060W);
271}
272
273static void b43_wa_lms(struct b43_wldev *dev)
274{
275 b43_phy_write(dev, 0x0055,
276 (b43_phy_read(dev, 0x0055) & 0xFFC0) | 0x0004);
277}
278
279static void b43_wa_mixedsignal(struct b43_wldev *dev)
280{
281 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1, 3);
282}
283
284static void b43_wa_msst(struct b43_wldev *dev) /* Min sigma square table */
285{
286 struct b43_phy *phy = &dev->phy;
287 int i;
288 const u16 *tab;
289
290 if (phy->type == B43_PHYTYPE_A) {
291 tab = b43_tab_sigmasqr1;
292 } else if (phy->type == B43_PHYTYPE_G) {
293 tab = b43_tab_sigmasqr2;
294 } else {
295 B43_WARN_ON(1);
296 return;
297 }
298
299 for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++) {
300 b43_ofdmtab_write16(dev, B43_OFDMTAB_MINSIGSQ,
301 i, tab[i]);
302 }
303}
304
305static void b43_wa_iqadc(struct b43_wldev *dev)
306{
307 if (dev->phy.analog == 4)
308 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 0,
309 b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 0) & ~0xF000);
310}
311
312static void b43_wa_crs_ed(struct b43_wldev *dev)
313{
314 struct b43_phy *phy = &dev->phy;
315
316 if (phy->rev == 1) {
Michael Buesch38d1b4c2007-12-12 22:05:18 +0100317 b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x4F19);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100318 } else if (phy->rev == 2) {
Michael Buesch38d1b4c2007-12-12 22:05:18 +0100319 b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x1861);
320 b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0271);
Michael Buesche59be0b2009-02-20 19:22:36 +0100321 b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100322 } else {
Michael Buesch38d1b4c2007-12-12 22:05:18 +0100323 b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x0098);
324 b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0070);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100325 b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080);
Michael Buesche59be0b2009-02-20 19:22:36 +0100326 b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100327 }
328}
329
330static void b43_wa_crs_thr(struct b43_wldev *dev)
331{
332 b43_phy_write(dev, B43_PHY_CRS0,
333 (b43_phy_read(dev, B43_PHY_CRS0) & ~0x03C0) | 0xD000);
334}
335
336static void b43_wa_crs_blank(struct b43_wldev *dev)
337{
338 b43_phy_write(dev, B43_PHY_OFDM(0x2C), 0x005A);
339}
340
341static void b43_wa_cck_shiftbits(struct b43_wldev *dev)
342{
343 b43_phy_write(dev, B43_PHY_CCKSHIFTBITS, 0x0026);
344}
345
346static void b43_wa_wrssi_offset(struct b43_wldev *dev)
347{
348 int i;
349
350 if (dev->phy.rev == 1) {
351 for (i = 0; i < 16; i++) {
352 b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI_R1,
353 i, 0x0020);
354 }
355 } else {
356 for (i = 0; i < 32; i++) {
357 b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI,
358 i, 0x0820);
359 }
360 }
361}
362
363static void b43_wa_txpuoff_rxpuon(struct b43_wldev *dev)
364{
365 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 2, 15);
366 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 3, 20);
367}
368
369static void b43_wa_altagc(struct b43_wldev *dev)
370{
371 struct b43_phy *phy = &dev->phy;
372
373 if (phy->rev == 1) {
374 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 254);
375 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 1, 13);
376 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 2, 19);
377 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 3, 25);
378 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 0, 0x2710);
379 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 1, 0x9B83);
380 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 2, 0x9B83);
381 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 3, 0x0F8D);
382 b43_phy_write(dev, B43_PHY_LMS, 4);
383 } else {
384 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0, 254);
385 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 1, 13);
386 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 2, 19);
387 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 3, 25);
388 }
389
390 b43_phy_write(dev, B43_PHY_CCKSHIFTBITS_WA,
391 (b43_phy_read(dev, B43_PHY_CCKSHIFTBITS_WA) & ~0xFF00) | 0x5700);
392 b43_phy_write(dev, B43_PHY_OFDM(0x1A),
393 (b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x007F) | 0x000F);
394 b43_phy_write(dev, B43_PHY_OFDM(0x1A),
395 (b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x3F80) | 0x2B80);
396 b43_phy_write(dev, B43_PHY_ANTWRSETT,
397 (b43_phy_read(dev, B43_PHY_ANTWRSETT) & 0xF0FF) | 0x0300);
398 b43_radio_write16(dev, 0x7A,
399 b43_radio_read16(dev, 0x7A) | 0x0008);
400 b43_phy_write(dev, B43_PHY_N1P1GAIN,
401 (b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x000F) | 0x0008);
402 b43_phy_write(dev, B43_PHY_P1P2GAIN,
403 (b43_phy_read(dev, B43_PHY_P1P2GAIN) & ~0x0F00) | 0x0600);
404 b43_phy_write(dev, B43_PHY_N1N2GAIN,
405 (b43_phy_read(dev, B43_PHY_N1N2GAIN) & ~0x0F00) | 0x0700);
406 b43_phy_write(dev, B43_PHY_N1P1GAIN,
407 (b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x0F00) | 0x0100);
408 if (phy->rev == 1) {
409 b43_phy_write(dev, B43_PHY_N1N2GAIN,
410 (b43_phy_read(dev, B43_PHY_N1N2GAIN)
411 & ~0x000F) | 0x0007);
412 }
413 b43_phy_write(dev, B43_PHY_OFDM(0x88),
414 (b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x00FF) | 0x001C);
415 b43_phy_write(dev, B43_PHY_OFDM(0x88),
416 (b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x3F00) | 0x0200);
417 b43_phy_write(dev, B43_PHY_OFDM(0x96),
418 (b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0x00FF) | 0x001C);
419 b43_phy_write(dev, B43_PHY_OFDM(0x89),
420 (b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x00FF) | 0x0020);
421 b43_phy_write(dev, B43_PHY_OFDM(0x89),
422 (b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x3F00) | 0x0200);
423 b43_phy_write(dev, B43_PHY_OFDM(0x82),
424 (b43_phy_read(dev, B43_PHY_OFDM(0x82)) & ~0x00FF) | 0x002E);
425 b43_phy_write(dev, B43_PHY_OFDM(0x96),
426 (b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0xFF00) | 0x1A00);
427 b43_phy_write(dev, B43_PHY_OFDM(0x81),
428 (b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0x00FF) | 0x0028);
429 b43_phy_write(dev, B43_PHY_OFDM(0x81),
430 (b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0xFF00) | 0x2C00);
431 if (phy->rev == 1) {
432 b43_phy_write(dev, B43_PHY_PEAK_COUNT, 0x092B);
433 b43_phy_write(dev, B43_PHY_OFDM(0x1B),
434 (b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E) | 0x0002);
435 } else {
436 b43_phy_write(dev, B43_PHY_OFDM(0x1B),
437 b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E);
438 b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A);
439 b43_phy_write(dev, B43_PHY_LPFGAINCTL,
440 (b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0x000F) | 0x0004);
441 if (phy->rev >= 6) {
442 b43_phy_write(dev, B43_PHY_OFDM(0x22), 0x287A);
443 b43_phy_write(dev, B43_PHY_LPFGAINCTL,
444 (b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0xF000) | 0x3000);
445 }
446 }
447 b43_phy_write(dev, B43_PHY_DIVSRCHIDX,
Michael Buesch38d1b4c2007-12-12 22:05:18 +0100448 (b43_phy_read(dev, B43_PHY_DIVSRCHIDX) & 0x8080) | 0x7874);
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100449 b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00);
450 if (phy->rev == 1) {
451 b43_phy_write(dev, B43_PHY_DIVP1P2GAIN,
452 (b43_phy_read(dev, B43_PHY_DIVP1P2GAIN) & ~0x0F00) | 0x0600);
453 b43_phy_write(dev, B43_PHY_OFDM(0x8B), 0x005E);
454 b43_phy_write(dev, B43_PHY_ANTWRSETT,
455 (b43_phy_read(dev, B43_PHY_ANTWRSETT) & ~0x00FF) | 0x001E);
456 b43_phy_write(dev, B43_PHY_OFDM(0x8D), 0x0002);
457 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 0, 0);
458 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 1, 7);
459 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 2, 16);
460 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 3, 28);
461 } else {
462 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 0, 0);
463 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 1, 7);
464 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 2, 16);
465 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 3, 28);
466 }
467 if (phy->rev >= 6) {
468 b43_phy_write(dev, B43_PHY_OFDM(0x26),
469 b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x0003);
470 b43_phy_write(dev, B43_PHY_OFDM(0x26),
471 b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x1000);
472 }
Michael Buesch38d1b4c2007-12-12 22:05:18 +0100473 b43_phy_read(dev, B43_PHY_VERSION_OFDM); /* Dummy read */
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100474}
475
476static void b43_wa_tr_ltov(struct b43_wldev *dev) /* TR Lookup Table Original Values */
477{
478 b43_gtab_write(dev, B43_GTAB_ORIGTR, 0, 0xC480);
479}
480
481static void b43_wa_cpll_nonpilot(struct b43_wldev *dev)
482{
483 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 0, 0);
484 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 1, 0);
485}
486
487static void b43_wa_rssi_adc(struct b43_wldev *dev)
488{
489 if (dev->phy.analog == 4)
490 b43_phy_write(dev, 0x00DC, 0x7454);
491}
492
493static void b43_wa_boards_a(struct b43_wldev *dev)
494{
495 struct ssb_bus *bus = dev->dev->bus;
496
497 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM &&
498 bus->boardinfo.type == SSB_BOARD_BU4306 &&
499 bus->boardinfo.rev < 0x30) {
500 b43_phy_write(dev, 0x0010, 0xE000);
501 b43_phy_write(dev, 0x0013, 0x0140);
502 b43_phy_write(dev, 0x0014, 0x0280);
503 } else {
504 if (bus->boardinfo.type == SSB_BOARD_MP4318 &&
505 bus->boardinfo.rev < 0x20) {
506 b43_phy_write(dev, 0x0013, 0x0210);
507 b43_phy_write(dev, 0x0014, 0x0840);
508 } else {
509 b43_phy_write(dev, 0x0013, 0x0140);
510 b43_phy_write(dev, 0x0014, 0x0280);
511 }
512 if (dev->phy.rev <= 4)
513 b43_phy_write(dev, 0x0010, 0xE000);
514 else
515 b43_phy_write(dev, 0x0010, 0x2000);
516 b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 1, 0x0039);
517 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 7, 0x0040);
518 }
519}
520
521static void b43_wa_boards_g(struct b43_wldev *dev)
522{
523 struct ssb_bus *bus = dev->dev->bus;
524 struct b43_phy *phy = &dev->phy;
525
526 if (bus->boardinfo.vendor != SSB_BOARDVENDOR_BCM ||
527 bus->boardinfo.type != SSB_BOARD_BU4306 ||
528 bus->boardinfo.rev != 0x17) {
529 if (phy->rev < 2) {
530 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 1, 0x0002);
531 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 2, 0x0001);
532 } else {
533 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 1, 0x0002);
534 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001);
Larry Finger95de2842007-11-09 16:57:18 -0600535 if ((bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100536 (phy->rev >= 7)) {
537 b43_phy_write(dev, B43_PHY_EXTG(0x11),
538 b43_phy_read(dev, B43_PHY_EXTG(0x11)) & 0xF7FF);
539 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001);
540 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0021, 0x0001);
541 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0022, 0x0001);
542 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0023, 0x0000);
543 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0000, 0x0000);
544 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0003, 0x0002);
545 }
546 }
547 }
Larry Finger95de2842007-11-09 16:57:18 -0600548 if (bus->sprom.boardflags_lo & B43_BFL_FEM) {
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100549 b43_phy_write(dev, B43_PHY_GTABCTL, 0x3120);
550 b43_phy_write(dev, B43_PHY_GTABDATA, 0xC480);
551 }
552}
553
554void b43_wa_all(struct b43_wldev *dev)
555{
556 struct b43_phy *phy = &dev->phy;
557
558 if (phy->type == B43_PHYTYPE_A) {
559 switch (phy->rev) {
560 case 2:
561 b43_wa_papd(dev);
562 b43_wa_auxclipthr(dev);
563 b43_wa_afcdac(dev);
564 b43_wa_txdc_offset(dev);
565 b43_wa_initgains(dev);
566 b43_wa_divider(dev);
567 b43_wa_gt(dev);
568 b43_wa_rssi_lt(dev);
569 b43_wa_analog(dev);
570 b43_wa_dac(dev);
571 b43_wa_fft(dev);
572 b43_wa_nft(dev);
573 b43_wa_rt(dev);
574 b43_wa_nst(dev);
575 b43_wa_art(dev);
576 b43_wa_txlna_gain(dev);
577 b43_wa_crs_reset(dev);
578 b43_wa_2060txlna_gain(dev);
579 b43_wa_lms(dev);
580 break;
581 case 3:
582 b43_wa_papd(dev);
583 b43_wa_mixedsignal(dev);
584 b43_wa_rssi_lt(dev);
585 b43_wa_txdc_offset(dev);
586 b43_wa_initgains(dev);
587 b43_wa_dac(dev);
588 b43_wa_nft(dev);
589 b43_wa_nst(dev);
590 b43_wa_msst(dev);
591 b43_wa_analog(dev);
592 b43_wa_gt(dev);
593 b43_wa_txpuoff_rxpuon(dev);
594 b43_wa_txlna_gain(dev);
595 break;
596 case 5:
597 b43_wa_iqadc(dev);
598 case 6:
599 b43_wa_papd(dev);
600 b43_wa_rssi_lt(dev);
601 b43_wa_txdc_offset(dev);
602 b43_wa_initgains(dev);
603 b43_wa_dac(dev);
604 b43_wa_nft(dev);
605 b43_wa_nst(dev);
606 b43_wa_msst(dev);
607 b43_wa_analog(dev);
608 b43_wa_gt(dev);
609 b43_wa_txpuoff_rxpuon(dev);
610 b43_wa_txlna_gain(dev);
611 break;
612 case 7:
613 b43_wa_iqadc(dev);
614 b43_wa_papd(dev);
615 b43_wa_rssi_lt(dev);
616 b43_wa_txdc_offset(dev);
617 b43_wa_initgains(dev);
618 b43_wa_dac(dev);
619 b43_wa_nft(dev);
620 b43_wa_nst(dev);
621 b43_wa_msst(dev);
622 b43_wa_analog(dev);
623 b43_wa_gt(dev);
624 b43_wa_txpuoff_rxpuon(dev);
625 b43_wa_txlna_gain(dev);
626 b43_wa_rssi_adc(dev);
627 default:
628 B43_WARN_ON(1);
629 }
630 b43_wa_boards_a(dev);
631 } else if (phy->type == B43_PHYTYPE_G) {
632 switch (phy->rev) {
633 case 1://XXX review rev1
634 b43_wa_crs_ed(dev);
635 b43_wa_crs_thr(dev);
636 b43_wa_crs_blank(dev);
637 b43_wa_cck_shiftbits(dev);
638 b43_wa_fft(dev);
639 b43_wa_nft(dev);
640 b43_wa_rt(dev);
641 b43_wa_nst(dev);
642 b43_wa_art(dev);
643 b43_wa_wrssi_offset(dev);
644 b43_wa_altagc(dev);
645 break;
646 case 2:
647 case 6:
648 case 7:
649 case 8:
Larry Finger013978b2007-11-26 10:29:47 -0600650 case 9:
Stefano Brivio61bca6e2007-11-06 22:49:05 +0100651 b43_wa_tr_ltov(dev);
652 b43_wa_crs_ed(dev);
653 b43_wa_rssi_lt(dev);
654 b43_wa_nft(dev);
655 b43_wa_nst(dev);
656 b43_wa_msst(dev);
657 b43_wa_wrssi_offset(dev);
658 b43_wa_altagc(dev);
659 b43_wa_analog(dev);
660 b43_wa_txpuoff_rxpuon(dev);
661 break;
662 default:
663 B43_WARN_ON(1);
664 }
665 b43_wa_boards_g(dev);
666 } else { /* No N PHY support so far */
667 B43_WARN_ON(1);
668 }
669
670 b43_wa_cpll_nonpilot(dev);
671}