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Felipe Balbi4a457872014-06-23 13:20:59 -05001/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/* AM437x SK EVM */
10
11/dts-v1/;
12
13#include "am4372.dtsi"
14#include <dt-bindings/pinctrl/am43xx.h>
15#include <dt-bindings/pwm/pwm.h>
16#include <dt-bindings/gpio/gpio.h>
17#include <dt-bindings/input/input.h>
18
19/ {
20 model = "TI AM437x SK EVM";
21 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
22
23 aliases {
24 display0 = &lcd0;
25 };
26
27 backlight {
28 compatible = "pwm-backlight";
29 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
30 brightness-levels = <0 51 53 56 62 75 101 152 255>;
31 default-brightness-level = <8>;
32 };
33
34 sound {
35 compatible = "ti,da830-evm-audio";
36 ti,model = "AM437x-SK-EVM";
37 ti,audio-codec = <&tlv320aic3106>;
38 ti,mcasp-controller = <&mcasp1>;
39 ti,codec-clock-rate = <24000000>;
40 ti,audio-routing =
41 "Headphone Jack", "HPLOUT",
42 "Headphone Jack", "HPROUT";
43 };
44
45 matrix_keypad: matrix_keypad@0 {
46 compatible = "gpio-matrix-keypad";
47
48 pinctrl-names = "default";
49 pinctrl-0 = <&matrix_keypad_pins>;
50
51 debounce-delay-ms = <5>;
Felipe Balbif6b957f2015-04-09 10:59:27 -050052 col-scan-delay-us = <5>;
Felipe Balbi4a457872014-06-23 13:20:59 -050053
54 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
55 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
56
57 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
58 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
59
60 linux,keymap = <
61 MATRIX_KEY(0, 0, KEY_DOWN)
62 MATRIX_KEY(0, 1, KEY_RIGHT)
63 MATRIX_KEY(1, 0, KEY_LEFT)
64 MATRIX_KEY(1, 1, KEY_UP)
65 >;
66 };
67
68 leds {
69 compatible = "gpio-leds";
70
71 pinctrl-names = "default";
72 pinctrl-0 = <&leds_pins>;
73
74 led@0 {
75 label = "am437x-sk:red:heartbeat";
76 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
77 linux,default-trigger = "heartbeat";
78 default-state = "off";
79 };
80
81 led@1 {
82 label = "am437x-sk:green:mmc1";
83 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
84 linux,default-trigger = "mmc0";
85 default-state = "off";
86 };
87
88 led@2 {
89 label = "am437x-sk:blue:cpu0";
90 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
91 linux,default-trigger = "cpu0";
92 default-state = "off";
93 };
94
95 led@3 {
96 label = "am437x-sk:blue:usr3";
97 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
98 default-state = "off";
99 };
100 };
101
102 lcd0: display {
Tomi Valkeinend73f8252014-12-05 09:39:31 +0200103 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
Felipe Balbi4a457872014-06-23 13:20:59 -0500104 label = "lcd";
105
106 pinctrl-names = "default";
107 pinctrl-0 = <&lcd_pins>;
108
109 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
110
111 panel-timing {
112 clock-frequency = <9000000>;
113 hactive = <480>;
114 vactive = <272>;
Tomi Valkeinend73f8252014-12-05 09:39:31 +0200115 hfront-porch = <2>;
116 hback-porch = <2>;
117 hsync-len = <41>;
118 vfront-porch = <2>;
119 vback-porch = <2>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500120 vsync-len = <10>;
121 hsync-active = <0>;
122 vsync-active = <0>;
123 de-active = <1>;
124 pixelclk-active = <1>;
125 };
126
127 port {
128 lcd_in: endpoint {
129 remote-endpoint = <&dpi_out>;
130 };
131 };
132 };
133};
134
135&am43xx_pinmux {
136 matrix_keypad_pins: matrix_keypad_pins {
137 pinctrl-single,pins = <
138 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
139 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
140 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
141 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
142 >;
143 };
144
145 leds_pins: leds_pins {
146 pinctrl-single,pins = <
147 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
148 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
149 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
150 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
151 >;
152 };
153
154 i2c0_pins: i2c0_pins {
155 pinctrl-single,pins = <
Felipe Balbi3cca4122014-12-04 11:01:58 -0600156 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
157 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
Felipe Balbi4a457872014-06-23 13:20:59 -0500158 >;
159 };
160
161 i2c1_pins: i2c1_pins {
162 pinctrl-single,pins = <
Felipe Balbi3cca4122014-12-04 11:01:58 -0600163 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
164 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
Felipe Balbi4a457872014-06-23 13:20:59 -0500165 >;
166 };
167
168 mmc1_pins: pinmux_mmc1_pins {
169 pinctrl-single,pins = <
Felipe Balbifb135052014-12-04 11:01:55 -0600170 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
171 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
172 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
173 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
174 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
175 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
Felipe Balbi4a457872014-06-23 13:20:59 -0500176 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
177 >;
178 };
179
180 ecap0_pins: backlight_pins {
181 pinctrl-single,pins = <
182 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
183 >;
184 };
185
186 edt_ft5306_ts_pins: edt_ft5306_ts_pins {
187 pinctrl-single,pins = <
188 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
189 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
190 >;
191 };
192
Darren Etheridge5ccaa6e2014-12-18 21:54:13 +0530193 vpfe0_pins_default: vpfe0_pins_default {
194 pinctrl-single,pins = <
195 0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
196 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
197 0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
198 0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
199 0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
200 0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
201 0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
202 0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
203 0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
204 0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
205 0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
206 0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
207 0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
208 0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
209 0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
210 >;
211 };
212
213 vpfe0_pins_sleep: vpfe0_pins_sleep {
214 pinctrl-single,pins = <
215 0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
216 0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
217 0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
218 0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
219 0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
220 0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
221 0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
222 0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
223 0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
224 0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
225 0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
226 0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
227 0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
228 0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
229 0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
230 >;
231 };
232
Felipe Balbi4a457872014-06-23 13:20:59 -0500233 cpsw_default: cpsw_default {
234 pinctrl-single,pins = <
235 /* Slave 1 */
Felipe Balbia2db9832014-12-04 11:01:56 -0600236 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
237 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
238 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
239 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
240 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
241 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
242 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
243 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
244 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
245 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
246 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
247 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500248
249 /* Slave 2 */
Felipe Balbia2db9832014-12-04 11:01:56 -0600250 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
251 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
252 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
253 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
254 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
255 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
256 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
257 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
258 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
259 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
260 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
261 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500262 >;
263 };
264
265 cpsw_sleep: cpsw_sleep {
266 pinctrl-single,pins = <
267 /* Slave 1 reset value */
268 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
269 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
270 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
271 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
272 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
273 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
274 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
275 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
276 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
277 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
278 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
279 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
280
281 /* Slave 2 reset value */
282 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
283 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
284 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
285 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
286 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
287 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
288 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
289 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
290 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
291 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
292 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
293 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
294 >;
295 };
296
297 davinci_mdio_default: davinci_mdio_default {
298 pinctrl-single,pins = <
299 /* MDIO */
Felipe Balbia2db9832014-12-04 11:01:56 -0600300 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
301 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
Felipe Balbi4a457872014-06-23 13:20:59 -0500302 >;
303 };
304
305 davinci_mdio_sleep: davinci_mdio_sleep {
306 pinctrl-single,pins = <
307 /* MDIO reset value */
308 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
309 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
310 >;
311 };
312
313 dss_pins: dss_pins {
314 pinctrl-single,pins = <
Felipe Balbi2d8a28c2014-12-04 11:01:59 -0600315 0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
316 0x024 (PIN_OUTPUT | MUX_MODE1)
317 0x028 (PIN_OUTPUT | MUX_MODE1)
318 0x02c (PIN_OUTPUT | MUX_MODE1)
319 0x030 (PIN_OUTPUT | MUX_MODE1)
320 0x034 (PIN_OUTPUT | MUX_MODE1)
321 0x038 (PIN_OUTPUT | MUX_MODE1)
322 0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
323 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
324 0x0a4 (PIN_OUTPUT | MUX_MODE0)
325 0x0a8 (PIN_OUTPUT | MUX_MODE0)
326 0x0ac (PIN_OUTPUT | MUX_MODE0)
327 0x0b0 (PIN_OUTPUT | MUX_MODE0)
328 0x0b4 (PIN_OUTPUT | MUX_MODE0)
329 0x0b8 (PIN_OUTPUT | MUX_MODE0)
330 0x0bc (PIN_OUTPUT | MUX_MODE0)
331 0x0c0 (PIN_OUTPUT | MUX_MODE0)
332 0x0c4 (PIN_OUTPUT | MUX_MODE0)
333 0x0c8 (PIN_OUTPUT | MUX_MODE0)
334 0x0cc (PIN_OUTPUT | MUX_MODE0)
335 0x0d0 (PIN_OUTPUT | MUX_MODE0)
336 0x0d4 (PIN_OUTPUT | MUX_MODE0)
337 0x0d8 (PIN_OUTPUT | MUX_MODE0)
338 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
339 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
340 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
341 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
342 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
Felipe Balbi4a457872014-06-23 13:20:59 -0500343
344 >;
345 };
346
347 qspi_pins: qspi_pins {
348 pinctrl-single,pins = <
Felipe Balbifad7ca82014-12-04 11:01:54 -0600349 0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
350 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
351 0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
352 0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
353 0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
354 0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500355 >;
356 };
357
358 mcasp1_pins: mcasp1_pins {
359 pinctrl-single,pins = <
360 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
361 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
362 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
363 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
364 >;
365 };
366
367 lcd_pins: lcd_pins {
368 pinctrl-single,pins = <
Felipe Balbi58230c22014-12-04 09:10:21 -0600369 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500370 >;
371 };
Felipe Balbi221fed32014-12-04 11:01:57 -0600372
373 usb1_pins: usb1_pins {
374 pinctrl-single,pins = <
375 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
376 >;
377 };
378
379 usb2_pins: usb2_pins {
380 pinctrl-single,pins = <
381 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
382 >;
383 };
Felipe Balbi4a457872014-06-23 13:20:59 -0500384};
385
386&i2c0 {
387 status = "okay";
388 pinctrl-names = "default";
389 pinctrl-0 = <&i2c0_pins>;
390 clock-frequency = <400000>;
391
392 tps@24 {
393 compatible = "ti,tps65218";
394 reg = <0x24>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500395 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
396 interrupt-controller;
397 #interrupt-cells = <2>;
398
399 dcdc1: regulator-dcdc1 {
400 compatible = "ti,tps65218-dcdc1";
401 /* VDD_CORE limits min of OPP50 and max of OPP100 */
402 regulator-name = "vdd_core";
403 regulator-min-microvolt = <912000>;
404 regulator-max-microvolt = <1144000>;
405 regulator-boot-on;
406 regulator-always-on;
407 };
408
409 dcdc2: regulator-dcdc2 {
410 compatible = "ti,tps65218-dcdc2";
411 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
412 regulator-name = "vdd_mpu";
413 regulator-min-microvolt = <912000>;
414 regulator-max-microvolt = <1378000>;
415 regulator-boot-on;
416 regulator-always-on;
417 };
418
419 dcdc3: regulator-dcdc3 {
420 compatible = "ti,tps65218-dcdc3";
421 regulator-name = "vdds_ddr";
Keerthy5cd98a72014-11-06 16:20:04 +0530422 regulator-min-microvolt = <1500000>;
423 regulator-max-microvolt = <1500000>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500424 regulator-boot-on;
425 regulator-always-on;
426 };
427
428 dcdc4: regulator-dcdc4 {
429 compatible = "ti,tps65218-dcdc4";
430 regulator-name = "v3_3d";
431 regulator-min-microvolt = <3300000>;
432 regulator-max-microvolt = <3300000>;
433 regulator-boot-on;
434 regulator-always-on;
435 };
436
437 ldo1: regulator-ldo1 {
438 compatible = "ti,tps65218-ldo1";
439 regulator-name = "v1_8d";
440 regulator-min-microvolt = <1800000>;
441 regulator-max-microvolt = <1800000>;
442 regulator-boot-on;
443 regulator-always-on;
444 };
445
Felipe Balbibb1c5fe2014-12-26 13:28:23 -0600446 power-button {
447 compatible = "ti,tps65218-pwrbutton";
448 status = "okay";
449 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
450 };
Felipe Balbi4a457872014-06-23 13:20:59 -0500451 };
452
453 at24@50 {
454 compatible = "at24,24c256";
455 pagesize = <64>;
456 reg = <0x50>;
457 };
458};
459
460&i2c1 {
461 status = "okay";
462 pinctrl-names = "default";
463 pinctrl-0 = <&i2c1_pins>;
464 clock-frequency = <400000>;
465
466 edt-ft5306@38 {
467 status = "okay";
468 compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
469 pinctrl-names = "default";
470 pinctrl-0 = <&edt_ft5306_ts_pins>;
471
472 reg = <0x38>;
473 interrupt-parent = <&gpio0>;
474 interrupts = <31 0>;
475
Felipe Balbifaa4ec12015-04-09 10:59:26 -0500476 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500477
478 touchscreen-size-x = <480>;
479 touchscreen-size-y = <272>;
480 };
481
482 tlv320aic3106: tlv320aic3106@1b {
483 compatible = "ti,tlv320aic3106";
484 reg = <0x1b>;
485 status = "okay";
486
487 /* Regulators */
488 AVDD-supply = <&dcdc4>;
489 IOVDD-supply = <&dcdc4>;
490 DRVDD-supply = <&dcdc4>;
491 DVDD-supply = <&ldo1>;
492 };
493
494 lis331dlh@18 {
495 compatible = "st,lis331dlh";
496 reg = <0x18>;
497 status = "okay";
498
499 Vdd-supply = <&dcdc4>;
500 Vdd_IO-supply = <&dcdc4>;
501 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
502 };
503};
504
505&epwmss0 {
506 status = "okay";
507};
508
509&ecap0 {
510 status = "okay";
511 pinctrl-names = "default";
512 pinctrl-0 = <&ecap0_pins>;
513};
514
515&gpio0 {
516 status = "okay";
517};
518
519&gpio1 {
520 status = "okay";
521};
522
523&gpio5 {
524 status = "okay";
525};
526
527&mmc1 {
528 status = "okay";
529 pinctrl-names = "default";
530 pinctrl-0 = <&mmc1_pins>;
531
532 vmmc-supply = <&dcdc4>;
533 bus-width = <4>;
534 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
535};
536
537&usb2_phy1 {
538 status = "okay";
539};
540
541&usb1 {
542 dr_mode = "peripheral";
543 status = "okay";
Felipe Balbi221fed32014-12-04 11:01:57 -0600544 pinctrl-names = "default";
545 pinctrl-0 = <&usb1_pins>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500546};
547
548&usb2_phy2 {
549 status = "okay";
550};
551
552&usb2 {
553 dr_mode = "host";
554 status = "okay";
Felipe Balbi221fed32014-12-04 11:01:57 -0600555 pinctrl-names = "default";
556 pinctrl-0 = <&usb2_pins>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500557};
558
559&qspi {
560 status = "okay";
561 pinctrl-names = "default";
562 pinctrl-0 = <&qspi_pins>;
563
564 spi-max-frequency = <48000000>;
565 m25p80@0 {
566 compatible = "mx66l51235l";
567 spi-max-frequency = <48000000>;
568 reg = <0>;
569 spi-cpol;
570 spi-cpha;
571 spi-tx-bus-width = <1>;
572 spi-rx-bus-width = <4>;
573 #address-cells = <1>;
574 #size-cells = <1>;
575
576 /* MTD partition table.
577 * The ROM checks the first 512KiB
578 * for a valid file to boot(XIP).
579 */
580 partition@0 {
581 label = "QSPI.U_BOOT";
582 reg = <0x00000000 0x000080000>;
583 };
584 partition@1 {
585 label = "QSPI.U_BOOT.backup";
586 reg = <0x00080000 0x00080000>;
587 };
588 partition@2 {
589 label = "QSPI.U-BOOT-SPL_OS";
590 reg = <0x00100000 0x00010000>;
591 };
592 partition@3 {
593 label = "QSPI.U_BOOT_ENV";
594 reg = <0x00110000 0x00010000>;
595 };
596 partition@4 {
597 label = "QSPI.U-BOOT-ENV.backup";
598 reg = <0x00120000 0x00010000>;
599 };
600 partition@5 {
601 label = "QSPI.KERNEL";
602 reg = <0x00130000 0x0800000>;
603 };
604 partition@6 {
605 label = "QSPI.FILESYSTEM";
606 reg = <0x00930000 0x36D0000>;
607 };
608 };
609};
610
611&mac {
612 pinctrl-names = "default", "sleep";
613 pinctrl-0 = <&cpsw_default>;
614 pinctrl-1 = <&cpsw_sleep>;
615 dual_emac = <1>;
616 status = "okay";
617};
618
619&davinci_mdio {
620 pinctrl-names = "default", "sleep";
621 pinctrl-0 = <&davinci_mdio_default>;
622 pinctrl-1 = <&davinci_mdio_sleep>;
623 status = "okay";
624};
625
626&cpsw_emac0 {
627 phy_id = <&davinci_mdio>, <4>;
628 phy-mode = "rgmii";
629 dual_emac_res_vlan = <1>;
630};
631
632&cpsw_emac1 {
633 phy_id = <&davinci_mdio>, <5>;
634 phy-mode = "rgmii";
635 dual_emac_res_vlan = <2>;
636};
637
638&elm {
639 status = "okay";
640};
641
642&mcasp1 {
643 pinctrl-names = "default";
644 pinctrl-0 = <&mcasp1_pins>;
645
646 status = "okay";
647
648 op-mode = <0>;
649 tdm-slots = <2>;
650 serial-dir = <
651 0 0 1 2
652 >;
653
654 tx-num-evt = <1>;
655 rx-num-evt = <1>;
656};
657
658&dss {
659 status = "okay";
660
661 pinctrl-names = "default";
662 pinctrl-0 = <&dss_pins>;
663
664 port {
665 dpi_out: endpoint@0 {
666 remote-endpoint = <&lcd_in>;
667 data-lines = <24>;
668 };
669 };
670};
671
672&rtc {
673 status = "okay";
674};
675
676&wdt {
677 status = "okay";
678};
Dave Gerlach3e1fe452014-12-04 09:24:39 -0600679
680&cpu {
681 cpu0-supply = <&dcdc2>;
682};
Darren Etheridge5ccaa6e2014-12-18 21:54:13 +0530683
684&vpfe0 {
685 status = "okay";
686 pinctrl-names = "default", "sleep";
687 pinctrl-0 = <&vpfe0_pins_default>;
688 pinctrl-1 = <&vpfe0_pins_sleep>;
689
690 /* Camera port */
691 port {
692 vpfe0_ep: endpoint {
693 /* remote-endpoint = <&sensor>; add once we have it */
694 ti,am437x-vpfe-interface = <0>;
695 bus-width = <8>;
696 hsync-active = <0>;
697 vsync-active = <0>;
698 };
699 };
700};