blob: 871aff5e2b87f1a05b472904d9e36fc613133ee1 [file] [log] [blame]
Hiroshi Doyua71c03e2013-01-24 01:10:24 +00001/dts-v1/;
2
Laxman Dewangane6e646e2013-09-18 18:52:32 +05303#include <dt-bindings/input/input.h>
Stephen Warren1bd0bd42012-10-17 16:38:21 -06004#include "tegra114.dtsi"
Hiroshi Doyua71c03e2013-01-24 01:10:24 +00005
6/ {
7 model = "NVIDIA Tegra114 Dalmore evaluation board";
8 compatible = "nvidia,dalmore", "nvidia,tegra114";
9
10 memory {
11 reg = <0x80000000 0x40000000>;
12 };
13
Pritesh Raithatha2c314d52013-02-11 12:25:13 +000014 pinmux {
15 pinctrl-names = "default";
16 pinctrl-0 = <&state_default>;
17
18 state_default: pinmux {
19 clk1_out_pw4 {
20 nvidia,pins = "clk1_out_pw4";
21 nvidia,function = "extperiph1";
22 nvidia,pull = <0>;
23 nvidia,tristate = <0>;
24 nvidia,enable-input = <0>;
25 };
26 dap1_din_pn1 {
27 nvidia,pins = "dap1_din_pn1";
28 nvidia,function = "i2s0";
29 nvidia,pull = <0>;
30 nvidia,tristate = <1>;
31 nvidia,enable-input = <1>;
32 };
33 dap1_dout_pn2 {
34 nvidia,pins = "dap1_dout_pn2",
35 "dap1_fs_pn0",
36 "dap1_sclk_pn3";
37 nvidia,function = "i2s0";
38 nvidia,pull = <0>;
39 nvidia,tristate = <0>;
40 nvidia,enable-input = <1>;
41 };
42 dap2_din_pa4 {
43 nvidia,pins = "dap2_din_pa4";
44 nvidia,function = "i2s1";
45 nvidia,pull = <0>;
46 nvidia,tristate = <1>;
47 nvidia,enable-input = <1>;
48 };
49 dap2_dout_pa5 {
50 nvidia,pins = "dap2_dout_pa5",
51 "dap2_fs_pa2",
52 "dap2_sclk_pa3";
53 nvidia,function = "i2s1";
54 nvidia,pull = <0>;
55 nvidia,tristate = <0>;
56 nvidia,enable-input = <1>;
57 };
58 dap4_din_pp5 {
59 nvidia,pins = "dap4_din_pp5",
60 "dap4_dout_pp6",
61 "dap4_fs_pp4",
62 "dap4_sclk_pp7";
63 nvidia,function = "i2s3";
64 nvidia,pull = <0>;
65 nvidia,tristate = <0>;
66 nvidia,enable-input = <1>;
67 };
68 dvfs_pwm_px0 {
69 nvidia,pins = "dvfs_pwm_px0",
70 "dvfs_clk_px2";
71 nvidia,function = "cldvfs";
72 nvidia,pull = <0>;
73 nvidia,tristate = <0>;
74 nvidia,enable-input = <0>;
75 };
76 ulpi_clk_py0 {
77 nvidia,pins = "ulpi_clk_py0",
78 "ulpi_data0_po1",
79 "ulpi_data1_po2",
80 "ulpi_data2_po3",
81 "ulpi_data3_po4",
82 "ulpi_data4_po5",
83 "ulpi_data5_po6",
84 "ulpi_data6_po7",
85 "ulpi_data7_po0";
86 nvidia,function = "ulpi";
87 nvidia,pull = <0>;
88 nvidia,tristate = <0>;
89 nvidia,enable-input = <1>;
90 };
91 ulpi_dir_py1 {
92 nvidia,pins = "ulpi_dir_py1",
93 "ulpi_nxt_py2";
94 nvidia,function = "ulpi";
95 nvidia,pull = <0>;
96 nvidia,tristate = <1>;
97 nvidia,enable-input = <1>;
98 };
99 ulpi_stp_py3 {
100 nvidia,pins = "ulpi_stp_py3";
101 nvidia,function = "ulpi";
102 nvidia,pull = <0>;
103 nvidia,tristate = <0>;
104 nvidia,enable-input = <0>;
105 };
106 cam_i2c_scl_pbb1 {
107 nvidia,pins = "cam_i2c_scl_pbb1",
108 "cam_i2c_sda_pbb2";
109 nvidia,function = "i2c3";
110 nvidia,pull = <0>;
111 nvidia,tristate = <0>;
112 nvidia,enable-input = <1>;
113 nvidia,lock = <0>;
114 nvidia,open-drain = <0>;
115 };
116 cam_mclk_pcc0 {
117 nvidia,pins = "cam_mclk_pcc0",
118 "pbb0";
119 nvidia,function = "vi_alt3";
120 nvidia,pull = <0>;
121 nvidia,tristate = <0>;
122 nvidia,enable-input = <0>;
123 nvidia,lock = <0>;
124 };
125 gen2_i2c_scl_pt5 {
126 nvidia,pins = "gen2_i2c_scl_pt5",
127 "gen2_i2c_sda_pt6";
128 nvidia,function = "i2c2";
129 nvidia,pull = <0>;
130 nvidia,tristate = <0>;
131 nvidia,enable-input = <1>;
132 nvidia,lock = <0>;
133 nvidia,open-drain = <0>;
134 };
135 gmi_a16_pj7 {
136 nvidia,pins = "gmi_a16_pj7";
137 nvidia,function = "uartd";
138 nvidia,pull = <0>;
139 nvidia,tristate = <0>;
140 nvidia,enable-input = <0>;
141 };
142 gmi_a17_pb0 {
143 nvidia,pins = "gmi_a17_pb0",
144 "gmi_a18_pb1";
145 nvidia,function = "uartd";
146 nvidia,pull = <0>;
147 nvidia,tristate = <1>;
148 nvidia,enable-input = <1>;
149 };
150 gmi_a19_pk7 {
151 nvidia,pins = "gmi_a19_pk7";
152 nvidia,function = "uartd";
153 nvidia,pull = <0>;
154 nvidia,tristate = <0>;
155 nvidia,enable-input = <0>;
156 };
157 gmi_ad5_pg5 {
158 nvidia,pins = "gmi_ad5_pg5",
159 "gmi_cs6_n_pi3",
160 "gmi_wr_n_pi0";
161 nvidia,function = "spi4";
162 nvidia,pull = <0>;
163 nvidia,tristate = <0>;
164 nvidia,enable-input = <1>;
165 };
166 gmi_ad6_pg6 {
167 nvidia,pins = "gmi_ad6_pg6",
168 "gmi_ad7_pg7";
169 nvidia,function = "spi4";
170 nvidia,pull = <2>;
171 nvidia,tristate = <0>;
172 nvidia,enable-input = <1>;
173 };
174 gmi_ad12_ph4 {
175 nvidia,pins = "gmi_ad12_ph4";
176 nvidia,function = "rsvd4";
177 nvidia,pull = <0>;
178 nvidia,tristate = <0>;
179 nvidia,enable-input = <0>;
180 };
181 gmi_ad9_ph1 {
182 nvidia,pins = "gmi_ad9_ph1";
183 nvidia,function = "pwm1";
184 nvidia,pull = <0>;
185 nvidia,tristate = <0>;
186 nvidia,enable-input = <0>;
187 };
188 gmi_cs1_n_pj2 {
189 nvidia,pins = "gmi_cs1_n_pj2",
190 "gmi_oe_n_pi1";
191 nvidia,function = "soc";
192 nvidia,pull = <0>;
193 nvidia,tristate = <1>;
194 nvidia,enable-input = <1>;
195 };
196 clk2_out_pw5 {
197 nvidia,pins = "clk2_out_pw5";
198 nvidia,function = "extperiph2";
199 nvidia,pull = <0>;
200 nvidia,tristate = <0>;
201 nvidia,enable-input = <0>;
202 };
203 sdmmc1_clk_pz0 {
204 nvidia,pins = "sdmmc1_clk_pz0";
205 nvidia,function = "sdmmc1";
206 nvidia,pull = <0>;
207 nvidia,tristate = <0>;
208 nvidia,enable-input = <1>;
209 };
210 sdmmc1_cmd_pz1 {
211 nvidia,pins = "sdmmc1_cmd_pz1",
212 "sdmmc1_dat0_py7",
213 "sdmmc1_dat1_py6",
214 "sdmmc1_dat2_py5",
215 "sdmmc1_dat3_py4";
216 nvidia,function = "sdmmc1";
217 nvidia,pull = <2>;
218 nvidia,tristate = <0>;
219 nvidia,enable-input = <1>;
220 };
221 sdmmc1_wp_n_pv3 {
222 nvidia,pins = "sdmmc1_wp_n_pv3";
223 nvidia,function = "spi4";
224 nvidia,pull = <2>;
225 nvidia,tristate = <0>;
226 nvidia,enable-input = <0>;
227 };
228 sdmmc3_clk_pa6 {
229 nvidia,pins = "sdmmc3_clk_pa6";
230 nvidia,function = "sdmmc3";
231 nvidia,pull = <0>;
232 nvidia,tristate = <0>;
233 nvidia,enable-input = <1>;
234 };
235 sdmmc3_cmd_pa7 {
236 nvidia,pins = "sdmmc3_cmd_pa7",
237 "sdmmc3_dat0_pb7",
238 "sdmmc3_dat1_pb6",
239 "sdmmc3_dat2_pb5",
240 "sdmmc3_dat3_pb4",
241 "kb_col4_pq4",
242 "sdmmc3_clk_lb_out_pee4",
243 "sdmmc3_clk_lb_in_pee5";
244 nvidia,function = "sdmmc3";
245 nvidia,pull = <2>;
246 nvidia,tristate = <0>;
247 nvidia,enable-input = <1>;
248 };
249 sdmmc4_clk_pcc4 {
250 nvidia,pins = "sdmmc4_clk_pcc4";
251 nvidia,function = "sdmmc4";
252 nvidia,pull = <0>;
253 nvidia,tristate = <0>;
254 nvidia,enable-input = <1>;
255 };
256 sdmmc4_cmd_pt7 {
257 nvidia,pins = "sdmmc4_cmd_pt7",
258 "sdmmc4_dat0_paa0",
259 "sdmmc4_dat1_paa1",
260 "sdmmc4_dat2_paa2",
261 "sdmmc4_dat3_paa3",
262 "sdmmc4_dat4_paa4",
263 "sdmmc4_dat5_paa5",
264 "sdmmc4_dat6_paa6",
265 "sdmmc4_dat7_paa7";
266 nvidia,function = "sdmmc4";
267 nvidia,pull = <2>;
268 nvidia,tristate = <0>;
269 nvidia,enable-input = <1>;
270 };
271 clk_32k_out_pa0 {
272 nvidia,pins = "clk_32k_out_pa0";
273 nvidia,function = "blink";
274 nvidia,pull = <0>;
275 nvidia,tristate = <0>;
276 nvidia,enable-input = <0>;
277 };
278 kb_col0_pq0 {
279 nvidia,pins = "kb_col0_pq0",
280 "kb_col1_pq1",
281 "kb_col2_pq2",
282 "kb_row0_pr0",
283 "kb_row1_pr1",
284 "kb_row2_pr2";
285 nvidia,function = "kbc";
286 nvidia,pull = <2>;
287 nvidia,tristate = <0>;
288 nvidia,enable-input = <1>;
289 };
290 dap3_din_pp1 {
291 nvidia,pins = "dap3_din_pp1",
292 "dap3_sclk_pp3";
293 nvidia,function = "displayb";
294 nvidia,pull = <0>;
295 nvidia,tristate = <1>;
296 nvidia,enable-input = <0>;
297 };
298 pv0 {
299 nvidia,pins = "pv0";
300 nvidia,function = "rsvd4";
301 nvidia,pull = <0>;
302 nvidia,tristate = <1>;
303 nvidia,enable-input = <0>;
304 };
305 kb_row7_pr7 {
306 nvidia,pins = "kb_row7_pr7";
307 nvidia,function = "rsvd2";
308 nvidia,pull = <2>;
309 nvidia,tristate = <0>;
310 nvidia,enable-input = <1>;
311 };
312 kb_row10_ps2 {
313 nvidia,pins = "kb_row10_ps2";
314 nvidia,function = "uarta";
315 nvidia,pull = <0>;
316 nvidia,tristate = <1>;
317 nvidia,enable-input = <1>;
318 };
319 kb_row9_ps1 {
320 nvidia,pins = "kb_row9_ps1";
321 nvidia,function = "uarta";
322 nvidia,pull = <0>;
323 nvidia,tristate = <0>;
324 nvidia,enable-input = <0>;
325 };
326 pwr_i2c_scl_pz6 {
327 nvidia,pins = "pwr_i2c_scl_pz6",
328 "pwr_i2c_sda_pz7";
329 nvidia,function = "i2cpwr";
330 nvidia,pull = <0>;
331 nvidia,tristate = <0>;
332 nvidia,enable-input = <1>;
333 nvidia,lock = <0>;
334 nvidia,open-drain = <0>;
335 };
336 sys_clk_req_pz5 {
337 nvidia,pins = "sys_clk_req_pz5";
338 nvidia,function = "sysclk";
339 nvidia,pull = <0>;
340 nvidia,tristate = <0>;
341 nvidia,enable-input = <0>;
342 };
343 core_pwr_req {
344 nvidia,pins = "core_pwr_req";
345 nvidia,function = "pwron";
346 nvidia,pull = <0>;
347 nvidia,tristate = <0>;
348 nvidia,enable-input = <0>;
349 };
350 cpu_pwr_req {
351 nvidia,pins = "cpu_pwr_req";
352 nvidia,function = "cpu";
353 nvidia,pull = <0>;
354 nvidia,tristate = <0>;
355 nvidia,enable-input = <0>;
356 };
357 pwr_int_n {
358 nvidia,pins = "pwr_int_n";
359 nvidia,function = "pmi";
360 nvidia,pull = <0>;
361 nvidia,tristate = <1>;
362 nvidia,enable-input = <1>;
363 };
364 reset_out_n {
365 nvidia,pins = "reset_out_n";
366 nvidia,function = "reset_out_n";
367 nvidia,pull = <0>;
368 nvidia,tristate = <0>;
369 nvidia,enable-input = <0>;
370 };
371 clk3_out_pee0 {
372 nvidia,pins = "clk3_out_pee0";
373 nvidia,function = "extperiph3";
374 nvidia,pull = <0>;
375 nvidia,tristate = <0>;
376 nvidia,enable-input = <0>;
377 };
378 gen1_i2c_scl_pc4 {
379 nvidia,pins = "gen1_i2c_scl_pc4",
380 "gen1_i2c_sda_pc5";
381 nvidia,function = "i2c1";
382 nvidia,pull = <0>;
383 nvidia,tristate = <0>;
384 nvidia,enable-input = <1>;
385 nvidia,lock = <0>;
386 nvidia,open-drain = <0>;
387 };
388 uart2_cts_n_pj5 {
389 nvidia,pins = "uart2_cts_n_pj5";
390 nvidia,function = "uartb";
391 nvidia,pull = <0>;
392 nvidia,tristate = <1>;
393 nvidia,enable-input = <1>;
394 };
395 uart2_rts_n_pj6 {
396 nvidia,pins = "uart2_rts_n_pj6";
397 nvidia,function = "uartb";
398 nvidia,pull = <0>;
399 nvidia,tristate = <0>;
400 nvidia,enable-input = <0>;
401 };
402 uart2_rxd_pc3 {
403 nvidia,pins = "uart2_rxd_pc3";
404 nvidia,function = "irda";
405 nvidia,pull = <0>;
406 nvidia,tristate = <1>;
407 nvidia,enable-input = <1>;
408 };
409 uart2_txd_pc2 {
410 nvidia,pins = "uart2_txd_pc2";
411 nvidia,function = "irda";
412 nvidia,pull = <0>;
413 nvidia,tristate = <0>;
414 nvidia,enable-input = <0>;
415 };
416 uart3_cts_n_pa1 {
417 nvidia,pins = "uart3_cts_n_pa1",
418 "uart3_rxd_pw7";
419 nvidia,function = "uartc";
420 nvidia,pull = <0>;
421 nvidia,tristate = <1>;
422 nvidia,enable-input = <1>;
423 };
424 uart3_rts_n_pc0 {
425 nvidia,pins = "uart3_rts_n_pc0",
426 "uart3_txd_pw6";
427 nvidia,function = "uartc";
428 nvidia,pull = <0>;
429 nvidia,tristate = <0>;
430 nvidia,enable-input = <0>;
431 };
432 owr {
433 nvidia,pins = "owr";
434 nvidia,function = "owr";
435 nvidia,pull = <0>;
436 nvidia,tristate = <0>;
437 nvidia,enable-input = <1>;
438 };
439 hdmi_cec_pee3 {
440 nvidia,pins = "hdmi_cec_pee3";
441 nvidia,function = "cec";
442 nvidia,pull = <0>;
443 nvidia,tristate = <0>;
444 nvidia,enable-input = <1>;
445 nvidia,lock = <0>;
446 nvidia,open-drain = <0>;
447 };
448 ddc_scl_pv4 {
449 nvidia,pins = "ddc_scl_pv4",
450 "ddc_sda_pv5";
451 nvidia,function = "i2c4";
452 nvidia,pull = <0>;
453 nvidia,tristate = <0>;
454 nvidia,enable-input = <1>;
455 nvidia,lock = <0>;
456 nvidia,rcv-sel = <1>;
457 };
458 spdif_in_pk6 {
459 nvidia,pins = "spdif_in_pk6";
460 nvidia,function = "usb";
461 nvidia,pull = <2>;
462 nvidia,tristate = <0>;
463 nvidia,enable-input = <1>;
464 nvidia,lock = <0>;
465 };
466 usb_vbus_en0_pn4 {
467 nvidia,pins = "usb_vbus_en0_pn4";
468 nvidia,function = "usb";
469 nvidia,pull = <2>;
470 nvidia,tristate = <0>;
471 nvidia,enable-input = <1>;
472 nvidia,lock = <0>;
473 nvidia,open-drain = <1>;
474 };
475 gpio_x6_aud_px6 {
476 nvidia,pins = "gpio_x6_aud_px6";
477 nvidia,function = "spi6";
478 nvidia,pull = <2>;
479 nvidia,tristate = <1>;
480 nvidia,enable-input = <1>;
481 };
482 gpio_x4_aud_px4 {
483 nvidia,pins = "gpio_x4_aud_px4",
484 "gpio_x7_aud_px7";
485 nvidia,function = "rsvd1";
486 nvidia,pull = <1>;
487 nvidia,tristate = <0>;
488 nvidia,enable-input = <0>;
489 };
490 gpio_x5_aud_px5 {
491 nvidia,pins = "gpio_x5_aud_px5";
492 nvidia,function = "rsvd1";
493 nvidia,pull = <2>;
494 nvidia,tristate = <0>;
495 nvidia,enable-input = <1>;
496 };
497 gpio_w2_aud_pw2 {
498 nvidia,pins = "gpio_w2_aud_pw2";
499 nvidia,function = "rsvd2";
500 nvidia,pull = <2>;
501 nvidia,tristate = <0>;
502 nvidia,enable-input = <1>;
503 };
504 gpio_w3_aud_pw3 {
505 nvidia,pins = "gpio_w3_aud_pw3";
506 nvidia,function = "spi6";
507 nvidia,pull = <2>;
508 nvidia,tristate = <0>;
509 nvidia,enable-input = <1>;
510 };
511 gpio_x1_aud_px1 {
512 nvidia,pins = "gpio_x1_aud_px1";
513 nvidia,function = "rsvd4";
514 nvidia,pull = <1>;
515 nvidia,tristate = <0>;
516 nvidia,enable-input = <1>;
517 };
518 gpio_x3_aud_px3 {
519 nvidia,pins = "gpio_x3_aud_px3";
520 nvidia,function = "rsvd4";
521 nvidia,pull = <2>;
522 nvidia,tristate = <0>;
523 nvidia,enable-input = <1>;
524 };
525 dap3_fs_pp0 {
526 nvidia,pins = "dap3_fs_pp0";
527 nvidia,function = "i2s2";
528 nvidia,pull = <1>;
529 nvidia,tristate = <0>;
530 nvidia,enable-input = <0>;
531 };
532 dap3_dout_pp2 {
533 nvidia,pins = "dap3_dout_pp2";
534 nvidia,function = "i2s2";
535 nvidia,pull = <1>;
536 nvidia,tristate = <0>;
537 nvidia,enable-input = <0>;
538 };
539 pv1 {
540 nvidia,pins = "pv1";
541 nvidia,function = "rsvd1";
542 nvidia,pull = <0>;
543 nvidia,tristate = <0>;
544 nvidia,enable-input = <1>;
545 };
546 pbb3 {
547 nvidia,pins = "pbb3",
548 "pbb5",
549 "pbb6",
550 "pbb7";
551 nvidia,function = "rsvd4";
552 nvidia,pull = <1>;
553 nvidia,tristate = <0>;
554 nvidia,enable-input = <0>;
555 };
556 pcc1 {
557 nvidia,pins = "pcc1",
558 "pcc2";
559 nvidia,function = "rsvd4";
560 nvidia,pull = <1>;
561 nvidia,tristate = <0>;
562 nvidia,enable-input = <1>;
563 };
564 gmi_ad0_pg0 {
565 nvidia,pins = "gmi_ad0_pg0",
566 "gmi_ad1_pg1";
567 nvidia,function = "gmi";
568 nvidia,pull = <0>;
569 nvidia,tristate = <0>;
570 nvidia,enable-input = <0>;
571 };
572 gmi_ad10_ph2 {
573 nvidia,pins = "gmi_ad10_ph2",
574 "gmi_ad11_ph3",
575 "gmi_ad13_ph5",
576 "gmi_ad8_ph0",
577 "gmi_clk_pk1";
578 nvidia,function = "gmi";
579 nvidia,pull = <1>;
580 nvidia,tristate = <0>;
581 nvidia,enable-input = <0>;
582 };
583 gmi_ad2_pg2 {
584 nvidia,pins = "gmi_ad2_pg2",
585 "gmi_ad3_pg3";
586 nvidia,function = "gmi";
587 nvidia,pull = <0>;
588 nvidia,tristate = <0>;
589 nvidia,enable-input = <1>;
590 };
591 gmi_adv_n_pk0 {
592 nvidia,pins = "gmi_adv_n_pk0",
593 "gmi_cs0_n_pj0",
594 "gmi_cs2_n_pk3",
595 "gmi_cs4_n_pk2",
596 "gmi_cs7_n_pi6",
597 "gmi_dqs_p_pj3",
598 "gmi_iordy_pi5",
599 "gmi_wp_n_pc7";
600 nvidia,function = "gmi";
601 nvidia,pull = <2>;
602 nvidia,tristate = <0>;
603 nvidia,enable-input = <1>;
604 };
605 gmi_cs3_n_pk4 {
606 nvidia,pins = "gmi_cs3_n_pk4";
607 nvidia,function = "gmi";
608 nvidia,pull = <2>;
609 nvidia,tristate = <0>;
610 nvidia,enable-input = <0>;
611 };
612 clk2_req_pcc5 {
613 nvidia,pins = "clk2_req_pcc5";
614 nvidia,function = "rsvd4";
615 nvidia,pull = <0>;
616 nvidia,tristate = <0>;
617 nvidia,enable-input = <0>;
618 };
619 kb_col3_pq3 {
620 nvidia,pins = "kb_col3_pq3",
621 "kb_col6_pq6",
622 "kb_col7_pq7";
623 nvidia,function = "kbc";
624 nvidia,pull = <2>;
625 nvidia,tristate = <0>;
626 nvidia,enable-input = <0>;
627 };
628 kb_col5_pq5 {
629 nvidia,pins = "kb_col5_pq5";
630 nvidia,function = "kbc";
631 nvidia,pull = <2>;
632 nvidia,tristate = <0>;
633 nvidia,enable-input = <1>;
634 };
635 kb_row3_pr3 {
636 nvidia,pins = "kb_row3_pr3",
637 "kb_row4_pr4",
638 "kb_row6_pr6",
639 "kb_row8_ps0";
640 nvidia,function = "kbc";
641 nvidia,pull = <1>;
642 nvidia,tristate = <0>;
643 nvidia,enable-input = <1>;
644 };
645 clk3_req_pee1 {
646 nvidia,pins = "clk3_req_pee1";
647 nvidia,function = "rsvd4";
648 nvidia,pull = <0>;
649 nvidia,tristate = <0>;
650 nvidia,enable-input = <0>;
651 };
652 pu4 {
653 nvidia,pins = "pu4";
654 nvidia,function = "displayb";
655 nvidia,pull = <0>;
656 nvidia,tristate = <0>;
657 nvidia,enable-input = <0>;
658 };
659 pu5 {
660 nvidia,pins = "pu5",
661 "pu6";
662 nvidia,function = "displayb";
663 nvidia,pull = <0>;
664 nvidia,tristate = <0>;
665 nvidia,enable-input = <1>;
666 };
667 hdmi_int_pn7 {
668 nvidia,pins = "hdmi_int_pn7";
669 nvidia,function = "rsvd1";
670 nvidia,pull = <1>;
671 nvidia,tristate = <0>;
672 nvidia,enable-input = <1>;
673 };
674 clk1_req_pee2 {
675 nvidia,pins = "clk1_req_pee2",
676 "usb_vbus_en1_pn5";
677 nvidia,function = "rsvd4";
678 nvidia,pull = <1>;
679 nvidia,tristate = <1>;
680 nvidia,enable-input = <0>;
681 };
682
683 drive_sdio1 {
684 nvidia,pins = "drive_sdio1";
685 nvidia,high-speed-mode = <1>;
686 nvidia,schmitt = <0>;
687 nvidia,low-power-mode = <3>;
688 nvidia,pull-down-strength = <36>;
689 nvidia,pull-up-strength = <20>;
690 nvidia,slew-rate-rising = <2>;
691 nvidia,slew-rate-falling = <2>;
692 };
693 drive_sdio3 {
694 nvidia,pins = "drive_sdio3";
695 nvidia,high-speed-mode = <1>;
696 nvidia,schmitt = <0>;
697 nvidia,low-power-mode = <3>;
698 nvidia,pull-down-strength = <22>;
699 nvidia,pull-up-strength = <36>;
700 nvidia,slew-rate-rising = <0>;
701 nvidia,slew-rate-falling = <0>;
702 };
703 drive_gma {
704 nvidia,pins = "drive_gma";
705 nvidia,high-speed-mode = <1>;
706 nvidia,schmitt = <0>;
707 nvidia,low-power-mode = <3>;
708 nvidia,pull-down-strength = <2>;
709 nvidia,pull-up-strength = <1>;
710 nvidia,slew-rate-rising = <0>;
711 nvidia,slew-rate-falling = <0>;
712 nvidia,drive-type = <1>;
713 };
714 };
715 };
716
Hiroshi Doyua71c03e2013-01-24 01:10:24 +0000717 serial@70006300 {
718 status = "okay";
Hiroshi Doyua71c03e2013-01-24 01:10:24 +0000719 };
720
Rhyland Klein33eb2712013-03-20 11:31:32 -0400721 i2c@7000c000 {
722 status = "okay";
723 clock-frequency = <100000>;
724
725 battery: smart-battery {
726 compatible = "ti,bq20z45", "sbs,sbs-battery";
727 reg = <0xb>;
728 battery-name = "battery";
729 sbs,i2c-retry-count = <2>;
730 sbs,poll-retry-count = <100>;
Rhyland Kleind5284a62013-06-10 17:26:42 -0400731 power-supplies = <&charger>;
Rhyland Klein33eb2712013-03-20 11:31:32 -0400732 };
Stephen Warrenaa5ae422013-03-12 17:03:42 -0600733
734 rt5640: rt5640 {
735 compatible = "realtek,rt5640";
736 reg = <0x1c>;
737 interrupt-parent = <&gpio>;
738 interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
739 realtek,ldo1-en-gpios =
740 <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
741 };
Rhyland Klein33eb2712013-03-20 11:31:32 -0400742 };
743
Laxman Dewanganda204ee2013-03-21 19:17:40 +0530744 i2c@7000d000 {
745 status = "okay";
746 clock-frequency = <400000>;
747
748 tps51632 {
749 compatible = "ti,tps51632";
750 reg = <0x43>;
751 regulator-name = "vdd-cpu";
752 regulator-min-microvolt = <500000>;
753 regulator-max-microvolt = <1520000>;
754 regulator-boot-on;
755 regulator-always-on;
756 };
Laxman Dewangan81c6c562013-03-21 19:17:41 +0530757
758 tps65090 {
759 compatible = "ti,tps65090";
760 reg = <0x48>;
761 interrupt-parent = <&gpio>;
Stephen Warren6cecf912013-02-13 12:51:51 -0700762 interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>;
Laxman Dewangan81c6c562013-03-21 19:17:41 +0530763
764 vsys1-supply = <&vdd_ac_bat_reg>;
765 vsys2-supply = <&vdd_ac_bat_reg>;
766 vsys3-supply = <&vdd_ac_bat_reg>;
767 infet1-supply = <&vdd_ac_bat_reg>;
768 infet2-supply = <&vdd_ac_bat_reg>;
769 infet3-supply = <&tps65090_dcdc2_reg>;
770 infet4-supply = <&tps65090_dcdc2_reg>;
771 infet5-supply = <&tps65090_dcdc2_reg>;
772 infet6-supply = <&tps65090_dcdc2_reg>;
773 infet7-supply = <&tps65090_dcdc2_reg>;
774 vsys-l1-supply = <&vdd_ac_bat_reg>;
775 vsys-l2-supply = <&vdd_ac_bat_reg>;
776
Rhyland Kleind5284a62013-06-10 17:26:42 -0400777 charger: charger {
Rhyland Klein1a99ece2013-04-10 09:51:45 +0000778 compatible = "ti,tps65090-charger";
779 ti,enable-low-current-chrg;
780 };
781
Laxman Dewangan81c6c562013-03-21 19:17:41 +0530782 regulators {
Laxman Dewanganfcf0b3a2013-03-21 19:17:42 +0530783 tps65090_dcdc1_reg: dcdc1 {
Laxman Dewangan81c6c562013-03-21 19:17:41 +0530784 regulator-name = "vdd-sys-5v0";
785 regulator-always-on;
786 regulator-boot-on;
787 };
788
789 tps65090_dcdc2_reg: dcdc2 {
790 regulator-name = "vdd-sys-3v3";
791 regulator-always-on;
792 regulator-boot-on;
793 };
794
Laxman Dewanganc321d962013-07-19 07:43:11 +0530795 tps65090_dcdc3_reg: dcdc3 {
Laxman Dewangan81c6c562013-03-21 19:17:41 +0530796 regulator-name = "vdd-ao";
797 regulator-always-on;
798 regulator-boot-on;
799 };
800
801 fet1 {
802 regulator-name = "vdd-lcd-bl";
803 };
804
805 fet3 {
806 regulator-name = "vdd-modem-3v3";
807 };
808
809 fet4 {
810 regulator-name = "avdd-lcd";
811 };
812
813 fet5 {
814 regulator-name = "vdd-lvds";
815 };
816
817 fet6 {
818 regulator-name = "vdd-sd-slot";
Stephen Warren15d5ef42013-03-28 13:22:30 -0600819 regulator-always-on;
Laxman Dewangan81c6c562013-03-21 19:17:41 +0530820 regulator-boot-on;
821 };
822
823 fet7 {
824 regulator-name = "vdd-com-3v3";
825 };
826
827 ldo1 {
828 regulator-name = "vdd-sby-5v0";
829 regulator-always-on;
830 regulator-boot-on;
831 };
832
833 ldo2 {
834 regulator-name = "vdd-sby-3v3";
835 regulator-always-on;
836 regulator-boot-on;
837 };
838 };
839 };
Laxman Dewanganc321d962013-07-19 07:43:11 +0530840
841 palmas: tps65913 {
842 compatible = "ti,palmas";
843 reg = <0x58>;
Joseph Loeca8f982013-08-01 17:37:45 +0800844 interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>;
Laxman Dewanganc321d962013-07-19 07:43:11 +0530845
846 #interrupt-cells = <2>;
847 interrupt-controller;
848
Bill Huang27cf5d12013-08-19 10:44:10 -0600849 ti,system-power-controller;
850
Laxman Dewanganc321d962013-07-19 07:43:11 +0530851 palmas_gpio: gpio {
852 compatible = "ti,palmas-gpio";
853 gpio-controller;
854 #gpio-cells = <2>;
855 };
856
857 pmic {
858 compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
859 smps1-in-supply = <&tps65090_dcdc3_reg>;
860 smps3-in-supply = <&tps65090_dcdc3_reg>;
861 smps4-in-supply = <&tps65090_dcdc2_reg>;
862 smps7-in-supply = <&tps65090_dcdc2_reg>;
863 smps8-in-supply = <&tps65090_dcdc2_reg>;
864 smps9-in-supply = <&tps65090_dcdc2_reg>;
865 ldo1-in-supply = <&tps65090_dcdc2_reg>;
866 ldo2-in-supply = <&tps65090_dcdc2_reg>;
867 ldo3-in-supply = <&palmas_smps3_reg>;
868 ldo4-in-supply = <&tps65090_dcdc2_reg>;
869 ldo5-in-supply = <&vdd_ac_bat_reg>;
870 ldo6-in-supply = <&tps65090_dcdc2_reg>;
871 ldo7-in-supply = <&tps65090_dcdc2_reg>;
872 ldo8-in-supply = <&tps65090_dcdc3_reg>;
873 ldo9-in-supply = <&palmas_smps9_reg>;
874 ldoln-in-supply = <&tps65090_dcdc1_reg>;
875 ldousb-in-supply = <&tps65090_dcdc1_reg>;
876
877 regulators {
878 smps12 {
879 regulator-name = "vddio-ddr";
880 regulator-min-microvolt = <1350000>;
881 regulator-max-microvolt = <1350000>;
882 regulator-always-on;
883 regulator-boot-on;
884 };
885
886 palmas_smps3_reg: smps3 {
887 regulator-name = "vddio-1v8";
888 regulator-min-microvolt = <1800000>;
889 regulator-max-microvolt = <1800000>;
890 regulator-always-on;
891 regulator-boot-on;
892 };
893
894 smps45 {
895 regulator-name = "vdd-core";
896 regulator-min-microvolt = <900000>;
897 regulator-max-microvolt = <1400000>;
898 regulator-always-on;
899 regulator-boot-on;
900 };
901
902 smps457 {
903 regulator-name = "vdd-core";
904 regulator-min-microvolt = <900000>;
905 regulator-max-microvolt = <1400000>;
906 regulator-always-on;
907 regulator-boot-on;
908 };
909
910 smps8 {
911 regulator-name = "avdd-pll";
912 regulator-min-microvolt = <1050000>;
913 regulator-max-microvolt = <1050000>;
914 regulator-always-on;
915 regulator-boot-on;
916 };
917
918 palmas_smps9_reg: smps9 {
919 regulator-name = "sdhci-vdd-sd-slot";
920 regulator-min-microvolt = <2800000>;
921 regulator-max-microvolt = <2800000>;
922 regulator-always-on;
923 };
924
925 ldo1 {
926 regulator-name = "avdd-cam1";
927 regulator-min-microvolt = <2800000>;
928 regulator-max-microvolt = <2800000>;
929 };
930
931 ldo2 {
932 regulator-name = "avdd-cam2";
933 regulator-min-microvolt = <2800000>;
934 regulator-max-microvolt = <2800000>;
935 };
936
937 ldo3 {
938 regulator-name = "avdd-dsi-csi";
939 regulator-min-microvolt = <1200000>;
940 regulator-max-microvolt = <1200000>;
941 regulator-always-on;
942 regulator-boot-on;
943 };
944
945 ldo4 {
946 regulator-name = "vpp-fuse";
947 regulator-min-microvolt = <1800000>;
948 regulator-max-microvolt = <1800000>;
949 };
950
951 ldo6 {
952 regulator-name = "vdd-sensor-2v85";
953 regulator-min-microvolt = <2850000>;
954 regulator-max-microvolt = <2850000>;
955 };
956
957 ldo7 {
958 regulator-name = "vdd-af-cam1";
959 regulator-min-microvolt = <2800000>;
960 regulator-max-microvolt = <2800000>;
961 };
962
963 ldo8 {
964 regulator-name = "vdd-rtc";
965 regulator-min-microvolt = <900000>;
966 regulator-max-microvolt = <900000>;
967 regulator-always-on;
968 regulator-boot-on;
969 ti,enable-ldo8-tracking;
970 };
971
972 ldo9 {
973 regulator-name = "vddio-sdmmc-2";
974 regulator-min-microvolt = <1800000>;
975 regulator-max-microvolt = <3300000>;
976 regulator-always-on;
977 regulator-boot-on;
978 };
979
980 ldoln {
981 regulator-name = "hvdd-usb";
982 regulator-min-microvolt = <3300000>;
983 regulator-max-microvolt = <3300000>;
984 };
985
986 ldousb {
987 regulator-name = "avdd-usb";
988 regulator-min-microvolt = <3300000>;
989 regulator-max-microvolt = <3300000>;
990 regulator-always-on;
991 regulator-boot-on;
992 };
993
994 regen1 {
995 regulator-name = "rail-3v3";
996 regulator-max-microvolt = <3300000>;
997 regulator-always-on;
998 regulator-boot-on;
999 };
1000
1001 regen2 {
1002 regulator-name = "rail-5v0";
1003 regulator-max-microvolt = <5000000>;
1004 regulator-always-on;
1005 regulator-boot-on;
1006 };
1007 };
1008 };
1009
1010 rtc {
1011 compatible = "ti,palmas-rtc";
1012 interrupt-parent = <&palmas>;
1013 interrupts = <8 0>;
1014 };
Laxman Dewangan6be3cf72013-09-18 18:37:22 +05301015
1016 pinmux {
1017 compatible = "ti,tps65913-pinctrl";
1018 pinctrl-names = "default";
1019 pinctrl-0 = <&palmas_default>;
1020
1021 palmas_default: pinmux {
1022 pin_gpio6 {
1023 pins = "gpio6";
1024 function = "gpio";
1025 };
1026 };
1027 };
Laxman Dewanganc321d962013-07-19 07:43:11 +05301028 };
Laxman Dewanganda204ee2013-03-21 19:17:40 +05301029 };
1030
Laxman Dewangan5cc75fc2013-05-17 17:03:28 -06001031 spi@7000da00 {
1032 status = "okay";
1033 spi-max-frequency = <25000000>;
1034 spi-flash@0 {
1035 compatible = "winbond,w25q32dw";
1036 reg = <0>;
1037 spi-max-frequency = <20000000>;
1038 };
1039 };
1040
Hiroshi Doyua71c03e2013-01-24 01:10:24 +00001041 pmc {
1042 nvidia,invert-interrupt;
Joseph Lo47d2d632013-08-12 17:40:07 +08001043 nvidia,suspend-mode = <1>;
Joseph Lo4a7658f2013-07-03 17:50:47 +08001044 nvidia,cpu-pwr-good-time = <500>;
1045 nvidia,cpu-pwr-off-time = <300>;
1046 nvidia,core-pwr-good-time = <641 3845>;
1047 nvidia,core-pwr-off-time = <61036>;
1048 nvidia,core-power-req-active-high;
1049 nvidia,sys-clock-req-active-high;
Hiroshi Doyua71c03e2013-01-24 01:10:24 +00001050 };
Joseph Lo7021d122013-04-03 19:31:27 +08001051
Stephen Warrenaa5ae422013-03-12 17:03:42 -06001052 ahub {
1053 i2s@70080400 {
1054 status = "okay";
1055 };
1056 };
1057
Rhyland Klein8d3207c2013-02-20 13:35:15 -05001058 sdhci@78000400 {
Stephen Warren3325f1b2013-02-12 17:25:15 -07001059 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
Rhyland Klein8d3207c2013-02-20 13:35:15 -05001060 bus-width = <4>;
1061 status = "okay";
1062 };
1063
1064 sdhci@78000600 {
1065 bus-width = <8>;
1066 status = "okay";
Joseph Lo7a2617a2013-04-03 14:34:39 -06001067 non-removable;
Rhyland Klein8d3207c2013-02-20 13:35:15 -05001068 };
1069
Mikko Perttunen328dc0e2013-08-01 18:00:18 +03001070 usb@7d008000 {
1071 status = "okay";
1072 };
1073
1074 usb-phy@7d008000 {
1075 status = "okay";
1076 vbus-supply = <&usb3_vbus_reg>;
1077 };
1078
Joseph Lo7021d122013-04-03 19:31:27 +08001079 clocks {
1080 compatible = "simple-bus";
1081 #address-cells = <1>;
1082 #size-cells = <0>;
1083
1084 clk32k_in: clock {
1085 compatible = "fixed-clock";
1086 reg=<0>;
1087 #clock-cells = <0>;
1088 clock-frequency = <32768>;
1089 };
1090 };
Laxman Dewangan81c6c562013-03-21 19:17:41 +05301091
Laxman Dewangan21b341c2013-07-10 12:30:43 +05301092 gpio-keys {
1093 compatible = "gpio-keys";
1094
1095 home {
1096 label = "Home";
1097 gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
Laxman Dewangane6e646e2013-09-18 18:52:32 +05301098 linux,code = <KEY_HOME>;
Laxman Dewangan21b341c2013-07-10 12:30:43 +05301099 };
1100
1101 power {
1102 label = "Power";
1103 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
Laxman Dewangane6e646e2013-09-18 18:52:32 +05301104 linux,code = <KEY_POWER>;
Laxman Dewangan21b341c2013-07-10 12:30:43 +05301105 gpio-key,wakeup;
1106 };
1107
1108 volume_down {
1109 label = "Volume Down";
1110 gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
Laxman Dewangane6e646e2013-09-18 18:52:32 +05301111 linux,code = <KEY_VOLUMEDOWN>;
Laxman Dewangan21b341c2013-07-10 12:30:43 +05301112 };
1113
1114 volume_up {
1115 label = "Volume Up";
1116 gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
Laxman Dewangane6e646e2013-09-18 18:52:32 +05301117 linux,code = <KEY_VOLUMEUP>;
Laxman Dewangan21b341c2013-07-10 12:30:43 +05301118 };
1119 };
1120
Laxman Dewangan81c6c562013-03-21 19:17:41 +05301121 regulators {
1122 compatible = "simple-bus";
1123 #address-cells = <1>;
1124 #size-cells = <0>;
1125
1126 vdd_ac_bat_reg: regulator@0 {
1127 compatible = "regulator-fixed";
1128 reg = <0>;
1129 regulator-name = "vdd_ac_bat";
1130 regulator-min-microvolt = <5000000>;
1131 regulator-max-microvolt = <5000000>;
1132 regulator-always-on;
1133 };
Laxman Dewanganfcf0b3a2013-03-21 19:17:42 +05301134
1135 dvdd_ts_reg: regulator@1 {
1136 compatible = "regulator-fixed";
1137 reg = <1>;
1138 regulator-name = "dvdd_ts";
1139 regulator-min-microvolt = <1800000>;
1140 regulator-max-microvolt = <1800000>;
1141 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -07001142 gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
Laxman Dewanganfcf0b3a2013-03-21 19:17:42 +05301143 };
1144
1145 lcd_bl_en_reg: regulator@2 {
1146 compatible = "regulator-fixed";
1147 reg = <2>;
1148 regulator-name = "lcd_bl_en";
1149 regulator-min-microvolt = <5000000>;
1150 regulator-max-microvolt = <5000000>;
1151 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -07001152 gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
Laxman Dewanganfcf0b3a2013-03-21 19:17:42 +05301153 };
1154
1155 usb1_vbus_reg: regulator@3 {
1156 compatible = "regulator-fixed";
1157 reg = <3>;
1158 regulator-name = "usb1_vbus";
1159 regulator-min-microvolt = <5000000>;
1160 regulator-max-microvolt = <5000000>;
1161 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -07001162 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
Laxman Dewanganfcf0b3a2013-03-21 19:17:42 +05301163 gpio-open-drain;
1164 vin-supply = <&tps65090_dcdc1_reg>;
1165 };
1166
1167 usb3_vbus_reg: regulator@4 {
1168 compatible = "regulator-fixed";
1169 reg = <4>;
1170 regulator-name = "usb2_vbus";
1171 regulator-min-microvolt = <5000000>;
1172 regulator-max-microvolt = <5000000>;
1173 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -07001174 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
Laxman Dewanganfcf0b3a2013-03-21 19:17:42 +05301175 gpio-open-drain;
1176 vin-supply = <&tps65090_dcdc1_reg>;
1177 };
1178
1179 vdd_hdmi_reg: regulator@5 {
1180 compatible = "regulator-fixed";
1181 reg = <5>;
1182 regulator-name = "vdd_hdmi_5v0";
1183 regulator-min-microvolt = <5000000>;
1184 regulator-max-microvolt = <5000000>;
1185 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -07001186 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
Laxman Dewanganfcf0b3a2013-03-21 19:17:42 +05301187 vin-supply = <&tps65090_dcdc1_reg>;
1188 };
Laxman Dewanganc321d962013-07-19 07:43:11 +05301189
1190 vdd_cam_1v8_reg: regulator@6 {
1191 compatible = "regulator-fixed";
1192 reg = <6>;
1193 regulator-name = "vdd_cam_1v8_reg";
1194 regulator-min-microvolt = <1800000>;
1195 regulator-max-microvolt = <1800000>;
1196 enable-active-high;
1197 gpio = <&palmas_gpio 6 0>;
1198 };
Laxman Dewangan81c6c562013-03-21 19:17:41 +05301199 };
Stephen Warrenaa5ae422013-03-12 17:03:42 -06001200
1201 sound {
1202 compatible = "nvidia,tegra-audio-rt5640-dalmore",
1203 "nvidia,tegra-audio-rt5640";
1204 nvidia,model = "NVIDIA Tegra Dalmore";
1205
1206 nvidia,audio-routing =
1207 "Headphones", "HPOR",
1208 "Headphones", "HPOL",
1209 "Speakers", "SPORP",
1210 "Speakers", "SPORN",
1211 "Speakers", "SPOLP",
Stephen Warren8af3bbe2013-08-14 14:22:19 -06001212 "Speakers", "SPOLN",
1213 "Mic Jack", "MICBIAS1",
1214 "IN2P", "Mic Jack";
Stephen Warrenaa5ae422013-03-12 17:03:42 -06001215
1216 nvidia,i2s-controller = <&tegra_i2s1>;
1217 nvidia,audio-codec = <&rt5640>;
1218
1219 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
1220
1221 clocks = <&tegra_car TEGRA114_CLK_PLL_A>,
1222 <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1223 <&tegra_car TEGRA114_CLK_EXTERN1>;
1224 clock-names = "pll_a", "pll_a_out0", "mclk";
1225 };
Hiroshi Doyua71c03e2013-01-24 01:10:24 +00001226};