Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Persistent Memory Driver |
| 3 | * |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 4 | * Copyright (c) 2014-2015, Intel Corporation. |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 5 | * Copyright (c) 2015, Christoph Hellwig <hch@lst.de>. |
| 6 | * Copyright (c) 2015, Boaz Harrosh <boaz@plexistor.com>. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms and conditions of the GNU General Public License, |
| 10 | * version 2, as published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 15 | * more details. |
| 16 | */ |
| 17 | |
| 18 | #include <asm/cacheflush.h> |
| 19 | #include <linux/blkdev.h> |
| 20 | #include <linux/hdreg.h> |
| 21 | #include <linux/init.h> |
| 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/module.h> |
| 24 | #include <linux/moduleparam.h> |
Dan Williams | b95f5f4 | 2016-01-04 23:50:23 -0800 | [diff] [blame] | 25 | #include <linux/badblocks.h> |
Dan Williams | 9476df7 | 2016-01-15 16:56:19 -0800 | [diff] [blame] | 26 | #include <linux/memremap.h> |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 27 | #include <linux/vmalloc.h> |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 28 | #include <linux/blk-mq.h> |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 29 | #include <linux/pfn_t.h> |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 30 | #include <linux/slab.h> |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 31 | #include <linux/uio.h> |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 32 | #include <linux/dax.h> |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 33 | #include <linux/nd.h> |
Minchan Kim | 23c47d2 | 2017-11-15 17:33:00 -0800 | [diff] [blame] | 34 | #include <linux/backing-dev.h> |
Dan Williams | f295e53 | 2016-06-17 11:08:06 -0700 | [diff] [blame] | 35 | #include "pmem.h" |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 36 | #include "pfn.h" |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 37 | #include "nd.h" |
Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 38 | #include "nd-core.h" |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 39 | |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 40 | static struct device *to_dev(struct pmem_device *pmem) |
| 41 | { |
| 42 | /* |
| 43 | * nvdimm bus services need a 'dev' parameter, and we record the device |
| 44 | * at init in bb.dev. |
| 45 | */ |
| 46 | return pmem->bb.dev; |
| 47 | } |
| 48 | |
| 49 | static struct nd_region *to_region(struct pmem_device *pmem) |
| 50 | { |
| 51 | return to_nd_region(to_dev(pmem)->parent); |
| 52 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 53 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 54 | static blk_status_t pmem_clear_poison(struct pmem_device *pmem, |
| 55 | phys_addr_t offset, unsigned int len) |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 56 | { |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 57 | struct device *dev = to_dev(pmem); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 58 | sector_t sector; |
| 59 | long cleared; |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 60 | blk_status_t rc = BLK_STS_OK; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 61 | |
| 62 | sector = (offset - pmem->data_offset) / 512; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 63 | |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 64 | cleared = nvdimm_clear_poison(dev, pmem->phys_addr + offset, len); |
| 65 | if (cleared < len) |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 66 | rc = BLK_STS_IOERR; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 67 | if (cleared > 0 && cleared / 512) { |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 68 | cleared /= 512; |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 69 | dev_dbg(dev, "%#llx clear %ld sector%s\n", |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 70 | (unsigned long long) sector, cleared, |
| 71 | cleared > 1 ? "s" : ""); |
Fabian Frederick | 0a3f27b | 2016-12-04 10:48:58 -0800 | [diff] [blame] | 72 | badblocks_clear(&pmem->bb, sector, cleared); |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 73 | if (pmem->bb_state) |
| 74 | sysfs_notify_dirent(pmem->bb_state); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 75 | } |
Toshi Kani | 3115bb0 | 2016-10-13 09:54:21 -0600 | [diff] [blame] | 76 | |
Dan Williams | f2b6125 | 2017-05-29 23:00:34 -0700 | [diff] [blame] | 77 | arch_invalidate_pmem(pmem->virt_addr + offset, len); |
Dan Williams | 868f036f | 2016-12-16 08:10:31 -0800 | [diff] [blame] | 78 | |
| 79 | return rc; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 80 | } |
| 81 | |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 82 | static void write_pmem(void *pmem_addr, struct page *page, |
| 83 | unsigned int off, unsigned int len) |
| 84 | { |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 85 | unsigned int chunk; |
| 86 | void *mem; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 87 | |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 88 | while (len) { |
| 89 | mem = kmap_atomic(page); |
| 90 | chunk = min_t(unsigned int, len, PAGE_SIZE); |
| 91 | memcpy_flushcache(pmem_addr, mem + off, chunk); |
| 92 | kunmap_atomic(mem); |
| 93 | len -= chunk; |
| 94 | off = 0; |
| 95 | page++; |
| 96 | pmem_addr += PAGE_SIZE; |
| 97 | } |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 98 | } |
| 99 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 100 | static blk_status_t read_pmem(struct page *page, unsigned int off, |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 101 | void *pmem_addr, unsigned int len) |
| 102 | { |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 103 | unsigned int chunk; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 104 | int rc; |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 105 | void *mem; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 106 | |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 107 | while (len) { |
| 108 | mem = kmap_atomic(page); |
| 109 | chunk = min_t(unsigned int, len, PAGE_SIZE); |
| 110 | rc = memcpy_mcsafe(mem + off, pmem_addr, chunk); |
| 111 | kunmap_atomic(mem); |
| 112 | if (rc) |
| 113 | return BLK_STS_IOERR; |
| 114 | len -= chunk; |
| 115 | off = 0; |
| 116 | page++; |
| 117 | pmem_addr += PAGE_SIZE; |
| 118 | } |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 119 | return BLK_STS_OK; |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 120 | } |
| 121 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 122 | static blk_status_t pmem_do_bvec(struct pmem_device *pmem, struct page *page, |
Jens Axboe | c11f0c0 | 2016-08-05 08:11:04 -0600 | [diff] [blame] | 123 | unsigned int len, unsigned int off, bool is_write, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 124 | sector_t sector) |
| 125 | { |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 126 | blk_status_t rc = BLK_STS_OK; |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 127 | bool bad_pmem = false; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 128 | phys_addr_t pmem_off = sector * 512 + pmem->data_offset; |
Dan Williams | 7a9eb20 | 2016-06-03 18:06:47 -0700 | [diff] [blame] | 129 | void *pmem_addr = pmem->virt_addr + pmem_off; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 130 | |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 131 | if (unlikely(is_bad_pmem(&pmem->bb, sector, len))) |
| 132 | bad_pmem = true; |
| 133 | |
Jens Axboe | c11f0c0 | 2016-08-05 08:11:04 -0600 | [diff] [blame] | 134 | if (!is_write) { |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 135 | if (unlikely(bad_pmem)) |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 136 | rc = BLK_STS_IOERR; |
Dan Williams | b5ebc8e | 2016-03-06 15:20:51 -0800 | [diff] [blame] | 137 | else { |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 138 | rc = read_pmem(page, off, pmem_addr, len); |
Dan Williams | b5ebc8e | 2016-03-06 15:20:51 -0800 | [diff] [blame] | 139 | flush_dcache_page(page); |
| 140 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 141 | } else { |
Dan Williams | 0a370d26 | 2016-04-14 19:40:47 -0700 | [diff] [blame] | 142 | /* |
| 143 | * Note that we write the data both before and after |
| 144 | * clearing poison. The write before clear poison |
| 145 | * handles situations where the latest written data is |
| 146 | * preserved and the clear poison operation simply marks |
| 147 | * the address range as valid without changing the data. |
| 148 | * In this case application software can assume that an |
| 149 | * interrupted write will either return the new good |
| 150 | * data or an error. |
| 151 | * |
| 152 | * However, if pmem_clear_poison() leaves the data in an |
| 153 | * indeterminate state we need to perform the write |
| 154 | * after clear poison. |
| 155 | */ |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 156 | flush_dcache_page(page); |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 157 | write_pmem(pmem_addr, page, off, len); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 158 | if (unlikely(bad_pmem)) { |
Toshi Kani | 3115bb0 | 2016-10-13 09:54:21 -0600 | [diff] [blame] | 159 | rc = pmem_clear_poison(pmem, pmem_off, len); |
Vishal Verma | bd697a8 | 2016-09-30 17:19:30 -0600 | [diff] [blame] | 160 | write_pmem(pmem_addr, page, off, len); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 161 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 162 | } |
| 163 | |
Dan Williams | b5ebc8e | 2016-03-06 15:20:51 -0800 | [diff] [blame] | 164 | return rc; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 165 | } |
| 166 | |
Dan Williams | 7e267a8 | 2016-06-01 20:48:15 -0700 | [diff] [blame] | 167 | /* account for REQ_FLUSH rename, replace with REQ_PREFLUSH after v4.8-rc1 */ |
| 168 | #ifndef REQ_FLUSH |
| 169 | #define REQ_FLUSH REQ_PREFLUSH |
| 170 | #endif |
| 171 | |
Jens Axboe | dece163 | 2015-11-05 10:41:16 -0700 | [diff] [blame] | 172 | static blk_qc_t pmem_make_request(struct request_queue *q, struct bio *bio) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 173 | { |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 174 | blk_status_t rc = 0; |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 175 | bool do_acct; |
| 176 | unsigned long start; |
Dan Williams | edc870e | 2015-05-16 12:28:51 -0400 | [diff] [blame] | 177 | struct bio_vec bvec; |
| 178 | struct bvec_iter iter; |
Dan Williams | bd842b8 | 2016-03-18 23:47:43 -0700 | [diff] [blame] | 179 | struct pmem_device *pmem = q->queuedata; |
Dan Williams | 7e267a8 | 2016-06-01 20:48:15 -0700 | [diff] [blame] | 180 | struct nd_region *nd_region = to_region(pmem); |
| 181 | |
Jens Axboe | 1eff9d3 | 2016-08-05 15:35:16 -0600 | [diff] [blame] | 182 | if (bio->bi_opf & REQ_FLUSH) |
Dan Williams | 7e267a8 | 2016-06-01 20:48:15 -0700 | [diff] [blame] | 183 | nvdimm_flush(nd_region); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 184 | |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 185 | do_acct = nd_iostat_start(bio, &start); |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 186 | bio_for_each_segment(bvec, bio, iter) { |
| 187 | rc = pmem_do_bvec(pmem, bvec.bv_page, bvec.bv_len, |
Jens Axboe | c11f0c0 | 2016-08-05 08:11:04 -0600 | [diff] [blame] | 188 | bvec.bv_offset, op_is_write(bio_op(bio)), |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 189 | iter.bi_sector); |
| 190 | if (rc) { |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 191 | bio->bi_status = rc; |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 192 | break; |
| 193 | } |
| 194 | } |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 195 | if (do_acct) |
| 196 | nd_iostat_end(bio, start); |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 197 | |
Jens Axboe | 1eff9d3 | 2016-08-05 15:35:16 -0600 | [diff] [blame] | 198 | if (bio->bi_opf & REQ_FUA) |
Dan Williams | 7e267a8 | 2016-06-01 20:48:15 -0700 | [diff] [blame] | 199 | nvdimm_flush(nd_region); |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 200 | |
Christoph Hellwig | 4246a0b | 2015-07-20 15:29:37 +0200 | [diff] [blame] | 201 | bio_endio(bio); |
Jens Axboe | dece163 | 2015-11-05 10:41:16 -0700 | [diff] [blame] | 202 | return BLK_QC_T_NONE; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 203 | } |
| 204 | |
| 205 | static int pmem_rw_page(struct block_device *bdev, sector_t sector, |
Jens Axboe | c11f0c0 | 2016-08-05 08:11:04 -0600 | [diff] [blame] | 206 | struct page *page, bool is_write) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 207 | { |
Dan Williams | bd842b8 | 2016-03-18 23:47:43 -0700 | [diff] [blame] | 208 | struct pmem_device *pmem = bdev->bd_queue->queuedata; |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 209 | blk_status_t rc; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 210 | |
Huang Ying | 98cc093 | 2017-09-06 16:22:27 -0700 | [diff] [blame] | 211 | rc = pmem_do_bvec(pmem, page, hpage_nr_pages(page) * PAGE_SIZE, |
| 212 | 0, is_write, sector); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 213 | |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 214 | /* |
| 215 | * The ->rw_page interface is subtle and tricky. The core |
| 216 | * retries on any error, so we can only invoke page_endio() in |
| 217 | * the successful completion case. Otherwise, we'll see crashes |
| 218 | * caused by double completion. |
| 219 | */ |
| 220 | if (rc == 0) |
Jens Axboe | c11f0c0 | 2016-08-05 08:11:04 -0600 | [diff] [blame] | 221 | page_endio(page, is_write, 0); |
Dan Williams | e10624f | 2016-01-06 12:03:41 -0800 | [diff] [blame] | 222 | |
Christoph Hellwig | 4e4cbee | 2017-06-03 09:38:06 +0200 | [diff] [blame] | 223 | return blk_status_to_errno(rc); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 224 | } |
| 225 | |
Dan Williams | f295e53 | 2016-06-17 11:08:06 -0700 | [diff] [blame] | 226 | /* see "strong" declaration in tools/testing/nvdimm/pmem-dax.c */ |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 227 | __weak long __pmem_direct_access(struct pmem_device *pmem, pgoff_t pgoff, |
| 228 | long nr_pages, void **kaddr, pfn_t *pfn) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 229 | { |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 230 | resource_size_t offset = PFN_PHYS(pgoff) + pmem->data_offset; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 231 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 232 | if (unlikely(is_bad_pmem(&pmem->bb, PFN_PHYS(pgoff) / 512, |
| 233 | PFN_PHYS(nr_pages)))) |
Dan Williams | 0a70bd4 | 2016-02-24 14:02:11 -0800 | [diff] [blame] | 234 | return -EIO; |
Ross Zwisler | e2e0539 | 2015-08-18 13:55:41 -0600 | [diff] [blame] | 235 | *kaddr = pmem->virt_addr + offset; |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 236 | *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 237 | |
Dan Williams | 0a70bd4 | 2016-02-24 14:02:11 -0800 | [diff] [blame] | 238 | /* |
| 239 | * If badblocks are present, limit known good range to the |
| 240 | * requested range. |
| 241 | */ |
| 242 | if (unlikely(pmem->bb.count)) |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 243 | return nr_pages; |
| 244 | return PHYS_PFN(pmem->size - pmem->pfn_pad - offset); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 245 | } |
| 246 | |
| 247 | static const struct block_device_operations pmem_fops = { |
| 248 | .owner = THIS_MODULE, |
| 249 | .rw_page = pmem_rw_page, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 250 | .revalidate_disk = nvdimm_revalidate_disk, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 251 | }; |
| 252 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 253 | static long pmem_dax_direct_access(struct dax_device *dax_dev, |
| 254 | pgoff_t pgoff, long nr_pages, void **kaddr, pfn_t *pfn) |
| 255 | { |
| 256 | struct pmem_device *pmem = dax_get_private(dax_dev); |
| 257 | |
| 258 | return __pmem_direct_access(pmem, pgoff, nr_pages, kaddr, pfn); |
| 259 | } |
| 260 | |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 261 | static size_t pmem_copy_from_iter(struct dax_device *dax_dev, pgoff_t pgoff, |
| 262 | void *addr, size_t bytes, struct iov_iter *i) |
| 263 | { |
| 264 | return copy_from_iter_flushcache(addr, bytes, i); |
| 265 | } |
| 266 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 267 | static const struct dax_operations pmem_dax_ops = { |
| 268 | .direct_access = pmem_dax_direct_access, |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 269 | .copy_from_iter = pmem_copy_from_iter, |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 270 | }; |
| 271 | |
Dan Williams | 6e0c90d | 2017-06-26 21:28:41 -0700 | [diff] [blame] | 272 | static const struct attribute_group *pmem_attribute_groups[] = { |
| 273 | &dax_attribute_group, |
| 274 | NULL, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 275 | }; |
| 276 | |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 277 | static void pmem_release_queue(void *q) |
| 278 | { |
| 279 | blk_cleanup_queue(q); |
| 280 | } |
| 281 | |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 282 | static void pmem_freeze_queue(void *q) |
| 283 | { |
Linus Torvalds | d3b5d35 | 2017-05-01 23:54:56 -0700 | [diff] [blame] | 284 | blk_freeze_queue_start(q); |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 285 | } |
| 286 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 287 | static void pmem_release_disk(void *__pmem) |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 288 | { |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 289 | struct pmem_device *pmem = __pmem; |
| 290 | |
| 291 | kill_dax(pmem->dax_dev); |
| 292 | put_dax(pmem->dax_dev); |
| 293 | del_gendisk(pmem->disk); |
| 294 | put_disk(pmem->disk); |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 295 | } |
| 296 | |
Dan Williams | e7638488 | 2018-05-16 11:46:08 -0700 | [diff] [blame^] | 297 | static void pmem_release_pgmap_ops(void *__pgmap) |
| 298 | { |
| 299 | dev_pagemap_put_ops(); |
| 300 | } |
| 301 | |
| 302 | static void fsdax_pagefree(struct page *page, void *data) |
| 303 | { |
| 304 | wake_up_var(&page->_refcount); |
| 305 | } |
| 306 | |
| 307 | static int setup_pagemap_fsdax(struct device *dev, struct dev_pagemap *pgmap) |
| 308 | { |
| 309 | dev_pagemap_get_ops(); |
| 310 | if (devm_add_action_or_reset(dev, pmem_release_pgmap_ops, pgmap)) |
| 311 | return -ENOMEM; |
| 312 | pgmap->type = MEMORY_DEVICE_FS_DAX; |
| 313 | pgmap->page_free = fsdax_pagefree; |
| 314 | |
| 315 | return 0; |
| 316 | } |
| 317 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 318 | static int pmem_attach_disk(struct device *dev, |
| 319 | struct nd_namespace_common *ndns) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 320 | { |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 321 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 322 | struct nd_region *nd_region = to_nd_region(dev->parent); |
Dan Williams | 0b27796 | 2017-06-09 09:46:50 -0700 | [diff] [blame] | 323 | int nid = dev_to_node(dev), fua, wbc; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 324 | struct resource *res = &nsio->res; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 325 | struct resource bb_res; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 326 | struct nd_pfn *nd_pfn = NULL; |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 327 | struct dax_device *dax_dev; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 328 | struct nd_pfn_sb *pfn_sb; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 329 | struct pmem_device *pmem; |
Dan Williams | 468ded0 | 2016-01-15 16:56:46 -0800 | [diff] [blame] | 330 | struct request_queue *q; |
Dan Williams | 6e0c90d | 2017-06-26 21:28:41 -0700 | [diff] [blame] | 331 | struct device *gendev; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 332 | struct gendisk *disk; |
| 333 | void *addr; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 334 | int rc; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 335 | |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 336 | pmem = devm_kzalloc(dev, sizeof(*pmem), GFP_KERNEL); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 337 | if (!pmem) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 338 | return -ENOMEM; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 339 | |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 340 | /* while nsio_rw_bytes is active, parse a pfn info block if present */ |
| 341 | if (is_nd_pfn(dev)) { |
| 342 | nd_pfn = to_nd_pfn(dev); |
| 343 | rc = nvdimm_setup_pfn(nd_pfn, &pmem->pgmap); |
| 344 | if (rc) |
| 345 | return rc; |
| 346 | } |
| 347 | |
| 348 | /* we're attaching a block device, disable raw namespace access */ |
| 349 | devm_nsio_disable(dev, nsio); |
| 350 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 351 | dev_set_drvdata(dev, pmem); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 352 | pmem->phys_addr = res->start; |
| 353 | pmem->size = resource_size(res); |
Dan Williams | 0b27796 | 2017-06-09 09:46:50 -0700 | [diff] [blame] | 354 | fua = nvdimm_has_flush(nd_region); |
| 355 | if (!IS_ENABLED(CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE) || fua < 0) { |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 356 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
Dan Williams | 0b27796 | 2017-06-09 09:46:50 -0700 | [diff] [blame] | 357 | fua = 0; |
| 358 | } |
Dave Jiang | 5fdf8e5 | 2018-03-02 19:31:40 -0800 | [diff] [blame] | 359 | wbc = nvdimm_has_cache(nd_region); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 360 | |
Dan Williams | 947df02 | 2016-03-21 22:28:40 -0700 | [diff] [blame] | 361 | if (!devm_request_mem_region(dev, res->start, resource_size(res), |
Dan Williams | 450c663 | 2016-11-28 11:15:18 -0800 | [diff] [blame] | 362 | dev_name(&ndns->dev))) { |
Dan Williams | 947df02 | 2016-03-21 22:28:40 -0700 | [diff] [blame] | 363 | dev_warn(dev, "could not reserve region %pR\n", res); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 364 | return -EBUSY; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 365 | } |
| 366 | |
Bart Van Assche | 5ee0524 | 2018-02-28 10:15:31 -0800 | [diff] [blame] | 367 | q = blk_alloc_queue_node(GFP_KERNEL, dev_to_node(dev), NULL); |
Dan Williams | 468ded0 | 2016-01-15 16:56:46 -0800 | [diff] [blame] | 368 | if (!q) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 369 | return -ENOMEM; |
Dan Williams | 468ded0 | 2016-01-15 16:56:46 -0800 | [diff] [blame] | 370 | |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 371 | if (devm_add_action_or_reset(dev, pmem_release_queue, q)) |
| 372 | return -ENOMEM; |
| 373 | |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 374 | pmem->pfn_flags = PFN_DEV; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 375 | pmem->pgmap.ref = &q->q_usage_counter; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 376 | if (is_nd_pfn(dev)) { |
Dan Williams | e7638488 | 2018-05-16 11:46:08 -0700 | [diff] [blame^] | 377 | if (setup_pagemap_fsdax(dev, &pmem->pgmap)) |
| 378 | return -ENOMEM; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 379 | addr = devm_memremap_pages(dev, &pmem->pgmap); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 380 | pfn_sb = nd_pfn->pfn_sb; |
| 381 | pmem->data_offset = le64_to_cpu(pfn_sb->dataoff); |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 382 | pmem->pfn_pad = resource_size(res) - |
| 383 | resource_size(&pmem->pgmap.res); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 384 | pmem->pfn_flags |= PFN_MAP; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 385 | memcpy(&bb_res, &pmem->pgmap.res, sizeof(bb_res)); |
| 386 | bb_res.start += pmem->data_offset; |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 387 | } else if (pmem_should_map_pages(dev)) { |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 388 | memcpy(&pmem->pgmap.res, &nsio->res, sizeof(pmem->pgmap.res)); |
| 389 | pmem->pgmap.altmap_valid = false; |
Dan Williams | e7638488 | 2018-05-16 11:46:08 -0700 | [diff] [blame^] | 390 | if (setup_pagemap_fsdax(dev, &pmem->pgmap)) |
| 391 | return -ENOMEM; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 392 | addr = devm_memremap_pages(dev, &pmem->pgmap); |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 393 | pmem->pfn_flags |= PFN_MAP; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 394 | memcpy(&bb_res, &pmem->pgmap.res, sizeof(bb_res)); |
Dan Williams | 34c0fd5 | 2016-01-15 16:56:14 -0800 | [diff] [blame] | 395 | } else |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 396 | addr = devm_memremap(dev, pmem->phys_addr, |
| 397 | pmem->size, ARCH_MEMREMAP_PMEM); |
Dan Williams | b36f476 | 2015-09-15 02:42:20 -0400 | [diff] [blame] | 398 | |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 399 | /* |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 400 | * At release time the queue must be frozen before |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 401 | * devm_memremap_pages is unwound |
| 402 | */ |
Dan Williams | 7138970 | 2017-04-28 10:23:37 -0700 | [diff] [blame] | 403 | if (devm_add_action_or_reset(dev, pmem_freeze_queue, q)) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 404 | return -ENOMEM; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 405 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 406 | if (IS_ERR(addr)) |
| 407 | return PTR_ERR(addr); |
Dan Williams | 7a9eb20 | 2016-06-03 18:06:47 -0700 | [diff] [blame] | 408 | pmem->virt_addr = addr; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 409 | |
Dan Williams | 0b27796 | 2017-06-09 09:46:50 -0700 | [diff] [blame] | 410 | blk_queue_write_cache(q, wbc, fua); |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 411 | blk_queue_make_request(q, pmem_make_request); |
| 412 | blk_queue_physical_block_size(q, PAGE_SIZE); |
Dan Williams | f979b13 | 2017-06-04 12:12:07 +0900 | [diff] [blame] | 413 | blk_queue_logical_block_size(q, pmem_sector_size(ndns)); |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 414 | blk_queue_max_hw_sectors(q, UINT_MAX); |
Bart Van Assche | 8b904b5 | 2018-03-07 17:10:10 -0800 | [diff] [blame] | 415 | blk_queue_flag_set(QUEUE_FLAG_NONROT, q); |
| 416 | blk_queue_flag_set(QUEUE_FLAG_DAX, q); |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 417 | q->queuedata = pmem; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 418 | |
Dan Williams | 538ea4a | 2015-10-05 20:35:56 -0400 | [diff] [blame] | 419 | disk = alloc_disk_node(0, nid); |
Dan Williams | 030b99e | 2016-03-17 20:24:31 -0700 | [diff] [blame] | 420 | if (!disk) |
| 421 | return -ENOMEM; |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 422 | pmem->disk = disk; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 423 | |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 424 | disk->fops = &pmem_fops; |
Dan Williams | 5a92289 | 2016-03-21 15:43:53 -0700 | [diff] [blame] | 425 | disk->queue = q; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 426 | disk->flags = GENHD_FL_EXT_DEVT; |
Minchan Kim | 23c47d2 | 2017-11-15 17:33:00 -0800 | [diff] [blame] | 427 | disk->queue->backing_dev_info->capabilities |= BDI_CAP_SYNCHRONOUS_IO; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 428 | nvdimm_namespace_disk_name(ndns, disk->disk_name); |
Dan Williams | cfe30b8 | 2016-03-03 09:38:00 -0800 | [diff] [blame] | 429 | set_capacity(disk, (pmem->size - pmem->pfn_pad - pmem->data_offset) |
| 430 | / 512); |
Dan Williams | b95f5f4 | 2016-01-04 23:50:23 -0800 | [diff] [blame] | 431 | if (devm_init_badblocks(dev, &pmem->bb)) |
| 432 | return -ENOMEM; |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 433 | nvdimm_badblocks_populate(nd_region, &pmem->bb, &bb_res); |
Dan Williams | 57f7f31 | 2016-01-06 12:03:42 -0800 | [diff] [blame] | 434 | disk->bb = &pmem->bb; |
Dan Williams | f02716d | 2016-06-15 14:59:17 -0700 | [diff] [blame] | 435 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 436 | dax_dev = alloc_dax(pmem, disk->disk_name, &pmem_dax_ops); |
| 437 | if (!dax_dev) { |
| 438 | put_disk(disk); |
| 439 | return -ENOMEM; |
| 440 | } |
Dan Williams | 0b27796 | 2017-06-09 09:46:50 -0700 | [diff] [blame] | 441 | dax_write_cache(dax_dev, wbc); |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 442 | pmem->dax_dev = dax_dev; |
| 443 | |
Dan Williams | 6e0c90d | 2017-06-26 21:28:41 -0700 | [diff] [blame] | 444 | gendev = disk_to_dev(disk); |
| 445 | gendev->groups = pmem_attribute_groups; |
| 446 | |
Dan Williams | c1d6e82 | 2017-01-24 23:02:09 -0800 | [diff] [blame] | 447 | device_add_disk(dev, disk); |
| 448 | if (devm_add_action_or_reset(dev, pmem_release_disk, pmem)) |
Dan Williams | f02716d | 2016-06-15 14:59:17 -0700 | [diff] [blame] | 449 | return -ENOMEM; |
| 450 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 451 | revalidate_disk(disk); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 452 | |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 453 | pmem->bb_state = sysfs_get_dirent(disk_to_dev(disk)->kobj.sd, |
| 454 | "badblocks"); |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 455 | if (!pmem->bb_state) |
| 456 | dev_warn(dev, "'badblocks' notification disabled\n"); |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 457 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 458 | return 0; |
| 459 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 460 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 461 | static int nd_pmem_probe(struct device *dev) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 462 | { |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 463 | struct nd_namespace_common *ndns; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 464 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 465 | ndns = nvdimm_namespace_common_probe(dev); |
| 466 | if (IS_ERR(ndns)) |
| 467 | return PTR_ERR(ndns); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 468 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 469 | if (devm_nsio_enable(dev, to_nd_namespace_io(&ndns->dev))) |
| 470 | return -ENXIO; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 471 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 472 | if (is_nd_btt(dev)) |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 473 | return nvdimm_namespace_attach_btt(ndns); |
| 474 | |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 475 | if (is_nd_pfn(dev)) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 476 | return pmem_attach_disk(dev, ndns); |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 477 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 478 | /* if we find a valid info-block we'll come back as that personality */ |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 479 | if (nd_btt_probe(dev, ndns) == 0 || nd_pfn_probe(dev, ndns) == 0 |
| 480 | || nd_dax_probe(dev, ndns) == 0) |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 481 | return -ENXIO; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 482 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 483 | /* ...otherwise we're just a raw pmem device */ |
| 484 | return pmem_attach_disk(dev, ndns); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 485 | } |
| 486 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 487 | static int nd_pmem_remove(struct device *dev) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 488 | { |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 489 | struct pmem_device *pmem = dev_get_drvdata(dev); |
| 490 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 491 | if (is_nd_btt(dev)) |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 492 | nvdimm_namespace_detach_btt(to_nd_btt(dev)); |
Dan Williams | 6aa734a | 2017-06-30 18:56:03 -0700 | [diff] [blame] | 493 | else { |
| 494 | /* |
| 495 | * Note, this assumes device_lock() context to not race |
| 496 | * nd_pmem_notify() |
| 497 | */ |
| 498 | sysfs_put(pmem->bb_state); |
| 499 | pmem->bb_state = NULL; |
| 500 | } |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 501 | nvdimm_flush(to_nd_region(dev->parent)); |
| 502 | |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 503 | return 0; |
| 504 | } |
| 505 | |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 506 | static void nd_pmem_shutdown(struct device *dev) |
| 507 | { |
| 508 | nvdimm_flush(to_nd_region(dev->parent)); |
| 509 | } |
| 510 | |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 511 | static void nd_pmem_notify(struct device *dev, enum nvdimm_event event) |
| 512 | { |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 513 | struct nd_region *nd_region; |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 514 | resource_size_t offset = 0, end_trunc = 0; |
| 515 | struct nd_namespace_common *ndns; |
| 516 | struct nd_namespace_io *nsio; |
| 517 | struct resource res; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 518 | struct badblocks *bb; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 519 | struct kernfs_node *bb_state; |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 520 | |
| 521 | if (event != NVDIMM_REVALIDATE_POISON) |
| 522 | return; |
| 523 | |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 524 | if (is_nd_btt(dev)) { |
| 525 | struct nd_btt *nd_btt = to_nd_btt(dev); |
| 526 | |
| 527 | ndns = nd_btt->ndns; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 528 | nd_region = to_nd_region(ndns->dev.parent); |
| 529 | nsio = to_nd_namespace_io(&ndns->dev); |
| 530 | bb = &nsio->bb; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 531 | bb_state = NULL; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 532 | } else { |
| 533 | struct pmem_device *pmem = dev_get_drvdata(dev); |
Dan Williams | a390180 | 2016-04-07 20:02:06 -0700 | [diff] [blame] | 534 | |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 535 | nd_region = to_region(pmem); |
| 536 | bb = &pmem->bb; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 537 | bb_state = pmem->bb_state; |
Dan Williams | a390180 | 2016-04-07 20:02:06 -0700 | [diff] [blame] | 538 | |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 539 | if (is_nd_pfn(dev)) { |
| 540 | struct nd_pfn *nd_pfn = to_nd_pfn(dev); |
| 541 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; |
| 542 | |
| 543 | ndns = nd_pfn->ndns; |
| 544 | offset = pmem->data_offset + |
| 545 | __le32_to_cpu(pfn_sb->start_pad); |
| 546 | end_trunc = __le32_to_cpu(pfn_sb->end_trunc); |
| 547 | } else { |
| 548 | ndns = to_ndns(dev); |
| 549 | } |
| 550 | |
| 551 | nsio = to_nd_namespace_io(&ndns->dev); |
| 552 | } |
| 553 | |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 554 | res.start = nsio->res.start + offset; |
| 555 | res.end = nsio->res.end - end_trunc; |
Toshi Kani | b2518c7 | 2017-04-25 17:04:13 -0600 | [diff] [blame] | 556 | nvdimm_badblocks_populate(nd_region, bb, &res); |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 557 | if (bb_state) |
| 558 | sysfs_notify_dirent(bb_state); |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 559 | } |
| 560 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 561 | MODULE_ALIAS("pmem"); |
| 562 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_IO); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 563 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_PMEM); |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 564 | static struct nd_device_driver nd_pmem_driver = { |
| 565 | .probe = nd_pmem_probe, |
| 566 | .remove = nd_pmem_remove, |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 567 | .notify = nd_pmem_notify, |
Dan Williams | 476f848 | 2016-07-09 00:12:52 -0700 | [diff] [blame] | 568 | .shutdown = nd_pmem_shutdown, |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 569 | .drv = { |
| 570 | .name = "nd_pmem", |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 571 | }, |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 572 | .type = ND_DRIVER_NAMESPACE_IO | ND_DRIVER_NAMESPACE_PMEM, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 573 | }; |
| 574 | |
Johannes Thumshirn | 03e9084 | 2018-03-14 19:25:07 +0100 | [diff] [blame] | 575 | module_nd_driver(nd_pmem_driver); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 576 | |
| 577 | MODULE_AUTHOR("Ross Zwisler <ross.zwisler@linux.intel.com>"); |
| 578 | MODULE_LICENSE("GPL v2"); |