blob: ca8582a95ad9eeb152267b16c4a5589c5044eb3f [file] [log] [blame]
Sekhar Noria6c0f6e2009-11-03 15:14:13 +05301/*
2 * CPU idle for DaVinci SoCs
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/
5 *
6 * Derived from Marvell Kirkwood CPU idle code
7 * (arch/arm/mach-kirkwood/cpuidle.c)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/cpuidle.h>
18#include <linux/io.h>
19#include <asm/proc-fns.h>
20
21#include <mach/cpuidle.h>
Sekhar Nori7ec4b242009-11-16 17:21:34 +053022#include <mach/memory.h>
Sekhar Noria6c0f6e2009-11-03 15:14:13 +053023
24#define DAVINCI_CPUIDLE_MAX_STATES 2
25
26struct davinci_ops {
27 void (*enter) (u32 flags);
28 void (*exit) (u32 flags);
29 u32 flags;
30};
31
32/* fields in davinci_ops.flags */
33#define DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN BIT(0)
34
35static struct cpuidle_driver davinci_idle_driver = {
36 .name = "cpuidle-davinci",
37 .owner = THIS_MODULE,
38};
39
40static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
41static void __iomem *ddr2_reg_base;
42
Sekhar Noria6c0f6e2009-11-03 15:14:13 +053043static void davinci_save_ddr_power(int enter, bool pdown)
44{
45 u32 val;
46
47 val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET);
48
49 if (enter) {
50 if (pdown)
51 val |= DDR2_SRPD_BIT;
52 else
53 val &= ~DDR2_SRPD_BIT;
54 val |= DDR2_LPMODEN_BIT;
55 } else {
56 val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT);
57 }
58
59 __raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
60}
61
62static void davinci_c2state_enter(u32 flags)
63{
64 davinci_save_ddr_power(1, !!(flags & DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN));
65}
66
67static void davinci_c2state_exit(u32 flags)
68{
69 davinci_save_ddr_power(0, !!(flags & DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN));
70}
71
72static struct davinci_ops davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
73 [1] = {
74 .enter = davinci_c2state_enter,
75 .exit = davinci_c2state_exit,
76 },
77};
78
79/* Actual code that puts the SoC in different idle states */
80static int davinci_enter_idle(struct cpuidle_device *dev,
Deepthi Dharware978aa72011-10-28 16:20:09 +053081 int index)
Sekhar Noria6c0f6e2009-11-03 15:14:13 +053082{
Deepthi Dharware978aa72011-10-28 16:20:09 +053083 struct davinci_ops *ops = cpuidle_get_statedata(&dev->states[index]);
Sekhar Noria6c0f6e2009-11-03 15:14:13 +053084 struct timeval before, after;
85 int idle_time;
86
87 local_irq_disable();
88 do_gettimeofday(&before);
89
90 if (ops && ops->enter)
91 ops->enter(ops->flags);
92 /* Wait for interrupt state */
93 cpu_do_idle();
94 if (ops && ops->exit)
95 ops->exit(ops->flags);
96
97 do_gettimeofday(&after);
98 local_irq_enable();
99 idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
100 (after.tv_usec - before.tv_usec);
Deepthi Dharware978aa72011-10-28 16:20:09 +0530101
102 dev->last_residency = idle_time;
103
104 return index;
Sekhar Noria6c0f6e2009-11-03 15:14:13 +0530105}
106
107static int __init davinci_cpuidle_probe(struct platform_device *pdev)
108{
109 int ret;
110 struct cpuidle_device *device;
111 struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
Sekhar Noria6c0f6e2009-11-03 15:14:13 +0530112
113 device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
114
115 if (!pdata) {
116 dev_err(&pdev->dev, "cannot get platform data\n");
117 return -ENOENT;
118 }
119
Sekhar Nori948c66d2009-11-16 17:21:37 +0530120 ddr2_reg_base = pdata->ddr2_ctlr_base;
Sekhar Noria6c0f6e2009-11-03 15:14:13 +0530121
122 ret = cpuidle_register_driver(&davinci_idle_driver);
123 if (ret) {
124 dev_err(&pdev->dev, "failed to register driver\n");
Sekhar Nori948c66d2009-11-16 17:21:37 +0530125 return ret;
Sekhar Noria6c0f6e2009-11-03 15:14:13 +0530126 }
127
128 /* Wait for interrupt state */
129 device->states[0].enter = davinci_enter_idle;
130 device->states[0].exit_latency = 1;
131 device->states[0].target_residency = 10000;
132 device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
133 strcpy(device->states[0].name, "WFI");
134 strcpy(device->states[0].desc, "Wait for interrupt");
135
136 /* Wait for interrupt and DDR self refresh state */
137 device->states[1].enter = davinci_enter_idle;
138 device->states[1].exit_latency = 10;
139 device->states[1].target_residency = 10000;
140 device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
141 strcpy(device->states[1].name, "DDR SR");
142 strcpy(device->states[1].desc, "WFI and DDR Self Refresh");
143 if (pdata->ddr2_pdown)
144 davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN;
145 cpuidle_set_statedata(&device->states[1], &davinci_states[1]);
146
147 device->state_count = DAVINCI_CPUIDLE_MAX_STATES;
148
149 ret = cpuidle_register_device(device);
150 if (ret) {
151 dev_err(&pdev->dev, "failed to register device\n");
Sekhar Nori948c66d2009-11-16 17:21:37 +0530152 cpuidle_unregister_driver(&davinci_idle_driver);
153 return ret;
Sekhar Noria6c0f6e2009-11-03 15:14:13 +0530154 }
155
156 return 0;
Sekhar Noria6c0f6e2009-11-03 15:14:13 +0530157}
158
159static struct platform_driver davinci_cpuidle_driver = {
160 .driver = {
161 .name = "cpuidle-davinci",
162 .owner = THIS_MODULE,
163 },
164};
165
166static int __init davinci_cpuidle_init(void)
167{
168 return platform_driver_probe(&davinci_cpuidle_driver,
169 davinci_cpuidle_probe);
170}
171device_initcall(davinci_cpuidle_init);
172