Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl) |
| 3 | * |
| 4 | * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net) |
| 5 | * |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 6 | * VME support added by Sam Creasey |
| 7 | * |
| 8 | * TODO: modify this driver to support multiple Sun3 SCSI VME boards |
| 9 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | * Adapted from mac_scsinew.c: |
| 11 | */ |
| 12 | /* |
| 13 | * Generic Macintosh NCR5380 driver |
| 14 | * |
| 15 | * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov> |
| 16 | * |
| 17 | * derived in part from: |
| 18 | */ |
| 19 | /* |
| 20 | * Generic Generic NCR5380 driver |
| 21 | * |
| 22 | * Copyright 1995, Russell King |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | */ |
| 24 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <linux/types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | #include <linux/ioport.h> |
| 29 | #include <linux/init.h> |
| 30 | #include <linux/blkdev.h> |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 31 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | |
| 33 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/dvma.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <scsi/scsi_host.h> |
| 37 | #include "sun3_scsi.h" |
Finn Thain | 2231ef8 | 2014-11-12 16:12:12 +1100 | [diff] [blame] | 38 | |
Finn Thain | 8dad0c5 | 2014-11-12 16:12:17 +1100 | [diff] [blame] | 39 | /* minimum number of bytes to do dma on */ |
| 40 | #define DMA_MIN_SIZE 129 |
Finn Thain | 2231ef8 | 2014-11-12 16:12:12 +1100 | [diff] [blame] | 41 | |
Finn Thain | e63449c | 2016-03-23 21:10:13 +1100 | [diff] [blame] | 42 | /* Definitions for the core NCR5380 driver. */ |
| 43 | |
| 44 | /* #define SUPPORT_TAGS */ |
Finn Thain | 2231ef8 | 2014-11-12 16:12:12 +1100 | [diff] [blame] | 45 | /* #define MAX_TAGS 32 */ |
| 46 | |
| 47 | #define NCR5380_implementation_fields /* none */ |
| 48 | |
| 49 | #define NCR5380_read(reg) sun3scsi_read(reg) |
| 50 | #define NCR5380_write(reg, value) sun3scsi_write(reg, value) |
| 51 | |
| 52 | #define NCR5380_queue_command sun3scsi_queue_command |
| 53 | #define NCR5380_bus_reset sun3scsi_bus_reset |
| 54 | #define NCR5380_abort sun3scsi_abort |
Finn Thain | 2231ef8 | 2014-11-12 16:12:12 +1100 | [diff] [blame] | 55 | #define NCR5380_info sun3scsi_info |
| 56 | |
Finn Thain | e9db319 | 2016-03-23 21:10:21 +1100 | [diff] [blame^] | 57 | #define NCR5380_dma_recv_setup(instance, data, count) (count) |
| 58 | #define NCR5380_dma_send_setup(instance, data, count) (count) |
Finn Thain | 2231ef8 | 2014-11-12 16:12:12 +1100 | [diff] [blame] | 59 | #define NCR5380_dma_residual(instance) \ |
| 60 | sun3scsi_dma_residual(instance) |
| 61 | #define NCR5380_dma_xfer_len(instance, cmd, phase) \ |
Finn Thain | e63449c | 2016-03-23 21:10:13 +1100 | [diff] [blame] | 62 | sun3scsi_dma_xfer_len(cmd->SCp.this_residual, cmd) |
Finn Thain | 2231ef8 | 2014-11-12 16:12:12 +1100 | [diff] [blame] | 63 | |
Finn Thain | 8dad0c5 | 2014-11-12 16:12:17 +1100 | [diff] [blame] | 64 | #define NCR5380_acquire_dma_irq(instance) (1) |
| 65 | #define NCR5380_release_dma_irq(instance) |
| 66 | |
Finn Thain | 9f6620a | 2014-03-18 11:42:23 +1100 | [diff] [blame] | 67 | #include "NCR5380.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | |
Finn Thain | 2231ef8 | 2014-11-12 16:12:12 +1100 | [diff] [blame] | 70 | extern int sun3_map_test(unsigned long, char *); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | static int setup_can_queue = -1; |
| 73 | module_param(setup_can_queue, int, 0); |
| 74 | static int setup_cmd_per_lun = -1; |
| 75 | module_param(setup_cmd_per_lun, int, 0); |
| 76 | static int setup_sg_tablesize = -1; |
| 77 | module_param(setup_sg_tablesize, int, 0); |
| 78 | #ifdef SUPPORT_TAGS |
| 79 | static int setup_use_tagged_queuing = -1; |
| 80 | module_param(setup_use_tagged_queuing, int, 0); |
| 81 | #endif |
| 82 | static int setup_hostid = -1; |
| 83 | module_param(setup_hostid, int, 0); |
| 84 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | /* ms to wait after hitting dma regs */ |
| 86 | #define SUN3_DMA_DELAY 10 |
| 87 | |
| 88 | /* dvma buffer to allocate -- 32k should hopefully be more than sufficient */ |
| 89 | #define SUN3_DVMA_BUFSIZE 0xe000 |
| 90 | |
Finn Thain | 2231ef8 | 2014-11-12 16:12:12 +1100 | [diff] [blame] | 91 | static struct scsi_cmnd *sun3_dma_setup_done; |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 92 | static unsigned char *sun3_scsi_regp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 93 | static volatile struct sun3_dma_regs *dregs; |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 94 | static struct sun3_udc_regs *udc_regs; |
Finn Thain | d5f7e65 | 2016-01-03 16:05:03 +1100 | [diff] [blame] | 95 | static unsigned char *sun3_dma_orig_addr; |
| 96 | static unsigned long sun3_dma_orig_count; |
| 97 | static int sun3_dma_active; |
| 98 | static unsigned long last_residual; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | |
| 100 | /* |
| 101 | * NCR 5380 register access functions |
| 102 | */ |
| 103 | |
| 104 | static inline unsigned char sun3scsi_read(int reg) |
| 105 | { |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 106 | return in_8(sun3_scsi_regp + reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | static inline void sun3scsi_write(int reg, int value) |
| 110 | { |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 111 | out_8(sun3_scsi_regp + reg, value); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | } |
| 113 | |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 114 | #ifndef SUN3_SCSI_VME |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | /* dma controller register access functions */ |
| 116 | |
| 117 | static inline unsigned short sun3_udc_read(unsigned char reg) |
| 118 | { |
| 119 | unsigned short ret; |
| 120 | |
| 121 | dregs->udc_addr = UDC_CSR; |
| 122 | udelay(SUN3_DMA_DELAY); |
| 123 | ret = dregs->udc_data; |
| 124 | udelay(SUN3_DMA_DELAY); |
| 125 | |
| 126 | return ret; |
| 127 | } |
| 128 | |
| 129 | static inline void sun3_udc_write(unsigned short val, unsigned char reg) |
| 130 | { |
| 131 | dregs->udc_addr = reg; |
| 132 | udelay(SUN3_DMA_DELAY); |
| 133 | dregs->udc_data = val; |
| 134 | udelay(SUN3_DMA_DELAY); |
| 135 | } |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 136 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | // safe bits for the CSR |
| 139 | #define CSR_GOOD 0x060f |
| 140 | |
Finn Thain | cd46140 | 2016-01-03 16:06:06 +1100 | [diff] [blame] | 141 | static irqreturn_t scsi_sun3_intr(int irq, void *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | { |
Finn Thain | cd46140 | 2016-01-03 16:06:06 +1100 | [diff] [blame] | 143 | struct Scsi_Host *instance = dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | unsigned short csr = dregs->csr; |
| 145 | int handled = 0; |
| 146 | |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 147 | #ifdef SUN3_SCSI_VME |
| 148 | dregs->csr &= ~CSR_DMA_ENABLE; |
| 149 | #endif |
| 150 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | if(csr & ~CSR_GOOD) { |
Finn Thain | cd46140 | 2016-01-03 16:06:06 +1100 | [diff] [blame] | 152 | if (csr & CSR_DMA_BUSERR) |
| 153 | shost_printk(KERN_ERR, instance, "bus error in DMA\n"); |
| 154 | if (csr & CSR_DMA_CONFLICT) |
| 155 | shost_printk(KERN_ERR, instance, "DMA conflict\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | handled = 1; |
| 157 | } |
| 158 | |
| 159 | if(csr & (CSR_SDB_INT | CSR_DMA_INT)) { |
Finn Thain | cd46140 | 2016-01-03 16:06:06 +1100 | [diff] [blame] | 160 | NCR5380_intr(irq, dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | handled = 1; |
| 162 | } |
| 163 | |
| 164 | return IRQ_RETVAL(handled); |
| 165 | } |
| 166 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | /* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */ |
Finn Thain | cd46140 | 2016-01-03 16:06:06 +1100 | [diff] [blame] | 168 | static unsigned long sun3scsi_dma_setup(struct Scsi_Host *instance, |
| 169 | void *data, unsigned long count, int write_flag) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 171 | void *addr; |
| 172 | |
| 173 | if(sun3_dma_orig_addr != NULL) |
| 174 | dvma_unmap(sun3_dma_orig_addr); |
| 175 | |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 176 | #ifdef SUN3_SCSI_VME |
| 177 | addr = (void *)dvma_map_vme((unsigned long) data, count); |
| 178 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | addr = (void *)dvma_map((unsigned long) data, count); |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 180 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | |
| 182 | sun3_dma_orig_addr = addr; |
| 183 | sun3_dma_orig_count = count; |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 184 | |
| 185 | #ifndef SUN3_SCSI_VME |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | dregs->fifo_count = 0; |
| 187 | sun3_udc_write(UDC_RESET, UDC_CSR); |
| 188 | |
| 189 | /* reset fifo */ |
| 190 | dregs->csr &= ~CSR_FIFO; |
| 191 | dregs->csr |= CSR_FIFO; |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 192 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | |
| 194 | /* set direction */ |
| 195 | if(write_flag) |
| 196 | dregs->csr |= CSR_SEND; |
| 197 | else |
| 198 | dregs->csr &= ~CSR_SEND; |
| 199 | |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 200 | #ifdef SUN3_SCSI_VME |
| 201 | dregs->csr |= CSR_PACK_ENABLE; |
| 202 | |
| 203 | dregs->dma_addr_hi = ((unsigned long)addr >> 16); |
| 204 | dregs->dma_addr_lo = ((unsigned long)addr & 0xffff); |
| 205 | |
| 206 | dregs->dma_count_hi = 0; |
| 207 | dregs->dma_count_lo = 0; |
| 208 | dregs->fifo_count_hi = 0; |
| 209 | dregs->fifo_count = 0; |
| 210 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | /* byte count for fifo */ |
| 212 | dregs->fifo_count = count; |
| 213 | |
| 214 | sun3_udc_write(UDC_RESET, UDC_CSR); |
| 215 | |
| 216 | /* reset fifo */ |
| 217 | dregs->csr &= ~CSR_FIFO; |
| 218 | dregs->csr |= CSR_FIFO; |
| 219 | |
| 220 | if(dregs->fifo_count != count) { |
Finn Thain | cd46140 | 2016-01-03 16:06:06 +1100 | [diff] [blame] | 221 | shost_printk(KERN_ERR, instance, "FIFO mismatch %04x not %04x\n", |
| 222 | dregs->fifo_count, (unsigned int) count); |
| 223 | NCR5380_dprint(NDEBUG_DMA, instance); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | } |
| 225 | |
| 226 | /* setup udc */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8); |
| 228 | udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | udc_regs->count = count/2; /* count in words */ |
| 230 | udc_regs->mode_hi = UDC_MODE_HIWORD; |
| 231 | if(write_flag) { |
| 232 | if(count & 1) |
| 233 | udc_regs->count++; |
| 234 | udc_regs->mode_lo = UDC_MODE_LSEND; |
| 235 | udc_regs->rsel = UDC_RSEL_SEND; |
| 236 | } else { |
| 237 | udc_regs->mode_lo = UDC_MODE_LRECV; |
| 238 | udc_regs->rsel = UDC_RSEL_RECV; |
| 239 | } |
| 240 | |
| 241 | /* announce location of regs block */ |
| 242 | sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8), |
| 243 | UDC_CHN_HI); |
| 244 | |
| 245 | sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO); |
| 246 | |
| 247 | /* set dma master on */ |
| 248 | sun3_udc_write(0xd, UDC_MODE); |
| 249 | |
| 250 | /* interrupt enable */ |
| 251 | sun3_udc_write(UDC_INT_ENABLE, UDC_CSR); |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 252 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | |
| 254 | return count; |
| 255 | |
| 256 | } |
| 257 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance) |
| 259 | { |
| 260 | return last_residual; |
| 261 | } |
| 262 | |
Finn Thain | e63449c | 2016-03-23 21:10:13 +1100 | [diff] [blame] | 263 | static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted_len, |
| 264 | struct scsi_cmnd *cmd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | { |
Finn Thain | e63449c | 2016-03-23 21:10:13 +1100 | [diff] [blame] | 266 | if (wanted_len < DMA_MIN_SIZE || cmd->request->cmd_type != REQ_TYPE_FS) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | return 0; |
Finn Thain | e63449c | 2016-03-23 21:10:13 +1100 | [diff] [blame] | 268 | |
| 269 | return wanted_len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | } |
| 271 | |
| 272 | static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data) |
| 273 | { |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 274 | #ifdef SUN3_SCSI_VME |
| 275 | unsigned short csr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 277 | csr = dregs->csr; |
| 278 | |
| 279 | dregs->dma_count_hi = (sun3_dma_orig_count >> 16); |
| 280 | dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff); |
| 281 | |
| 282 | dregs->fifo_count_hi = (sun3_dma_orig_count >> 16); |
| 283 | dregs->fifo_count = (sun3_dma_orig_count & 0xffff); |
| 284 | |
| 285 | /* if(!(csr & CSR_DMA_ENABLE)) |
| 286 | * dregs->csr |= CSR_DMA_ENABLE; |
| 287 | */ |
| 288 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | sun3_udc_write(UDC_CHN_START, UDC_CSR); |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 290 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | |
| 292 | return 0; |
| 293 | } |
| 294 | |
| 295 | /* clean up after our dma is done */ |
| 296 | static int sun3scsi_dma_finish(int write_flag) |
| 297 | { |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 298 | unsigned short __maybe_unused count; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | unsigned short fifo; |
| 300 | int ret = 0; |
| 301 | |
| 302 | sun3_dma_active = 0; |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 303 | |
| 304 | #ifdef SUN3_SCSI_VME |
| 305 | dregs->csr &= ~CSR_DMA_ENABLE; |
| 306 | |
| 307 | fifo = dregs->fifo_count; |
| 308 | if (write_flag) { |
| 309 | if ((fifo > 0) && (fifo < sun3_dma_orig_count)) |
| 310 | fifo++; |
| 311 | } |
| 312 | |
| 313 | last_residual = fifo; |
| 314 | /* empty bytes from the fifo which didn't make it */ |
| 315 | if ((!write_flag) && (dregs->csr & CSR_LEFT)) { |
| 316 | unsigned char *vaddr; |
| 317 | |
| 318 | vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr); |
| 319 | |
| 320 | vaddr += (sun3_dma_orig_count - fifo); |
| 321 | vaddr--; |
| 322 | |
| 323 | switch (dregs->csr & CSR_LEFT) { |
| 324 | case CSR_LEFT_3: |
| 325 | *vaddr = (dregs->bpack_lo & 0xff00) >> 8; |
| 326 | vaddr--; |
| 327 | |
| 328 | case CSR_LEFT_2: |
| 329 | *vaddr = (dregs->bpack_hi & 0x00ff); |
| 330 | vaddr--; |
| 331 | |
| 332 | case CSR_LEFT_1: |
| 333 | *vaddr = (dregs->bpack_hi & 0xff00) >> 8; |
| 334 | break; |
| 335 | } |
| 336 | } |
| 337 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | // check to empty the fifo on a read |
| 339 | if(!write_flag) { |
| 340 | int tmo = 20000; /* .2 sec */ |
| 341 | |
| 342 | while(1) { |
| 343 | if(dregs->csr & CSR_FIFO_EMPTY) |
| 344 | break; |
| 345 | |
| 346 | if(--tmo <= 0) { |
| 347 | printk("sun3scsi: fifo failed to empty!\n"); |
| 348 | return 1; |
| 349 | } |
| 350 | udelay(10); |
| 351 | } |
| 352 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | |
Finn Thain | cd46140 | 2016-01-03 16:06:06 +1100 | [diff] [blame] | 354 | dregs->udc_addr = 0x32; |
| 355 | udelay(SUN3_DMA_DELAY); |
| 356 | count = 2 * dregs->udc_data; |
| 357 | udelay(SUN3_DMA_DELAY); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | |
| 359 | fifo = dregs->fifo_count; |
| 360 | last_residual = fifo; |
| 361 | |
| 362 | /* empty bytes from the fifo which didn't make it */ |
| 363 | if((!write_flag) && (count - fifo) == 2) { |
| 364 | unsigned short data; |
| 365 | unsigned char *vaddr; |
| 366 | |
| 367 | data = dregs->fifo_data; |
| 368 | vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr); |
| 369 | |
| 370 | vaddr += (sun3_dma_orig_count - fifo); |
| 371 | |
| 372 | vaddr[-2] = (data & 0xff00) >> 8; |
| 373 | vaddr[-1] = (data & 0xff); |
| 374 | } |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 375 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | |
| 377 | dvma_unmap(sun3_dma_orig_addr); |
| 378 | sun3_dma_orig_addr = NULL; |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 379 | |
| 380 | #ifdef SUN3_SCSI_VME |
| 381 | dregs->dma_addr_hi = 0; |
| 382 | dregs->dma_addr_lo = 0; |
| 383 | dregs->dma_count_hi = 0; |
| 384 | dregs->dma_count_lo = 0; |
| 385 | |
| 386 | dregs->fifo_count = 0; |
| 387 | dregs->fifo_count_hi = 0; |
| 388 | |
| 389 | dregs->csr &= ~CSR_SEND; |
| 390 | /* dregs->csr |= CSR_DMA_ENABLE; */ |
| 391 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 392 | sun3_udc_write(UDC_RESET, UDC_CSR); |
| 393 | dregs->fifo_count = 0; |
| 394 | dregs->csr &= ~CSR_SEND; |
| 395 | |
| 396 | /* reset fifo */ |
| 397 | dregs->csr &= ~CSR_FIFO; |
| 398 | dregs->csr |= CSR_FIFO; |
Finn Thain | 757f5ba | 2014-03-18 11:42:24 +1100 | [diff] [blame] | 399 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | |
| 401 | sun3_dma_setup_done = NULL; |
| 402 | |
| 403 | return ret; |
| 404 | |
| 405 | } |
| 406 | |
Finn Thain | e9db319 | 2016-03-23 21:10:21 +1100 | [diff] [blame^] | 407 | #include "NCR5380.c" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 409 | #ifdef SUN3_SCSI_VME |
| 410 | #define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI" |
| 411 | #define DRV_MODULE_NAME "sun3_scsi_vme" |
| 412 | #else |
| 413 | #define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI" |
| 414 | #define DRV_MODULE_NAME "sun3_scsi" |
| 415 | #endif |
| 416 | |
| 417 | #define PFX DRV_MODULE_NAME ": " |
| 418 | |
| 419 | static struct scsi_host_template sun3_scsi_template = { |
| 420 | .module = THIS_MODULE, |
| 421 | .proc_name = DRV_MODULE_NAME, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 422 | .name = SUN3_SCSI_NAME, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | .info = sun3scsi_info, |
| 424 | .queuecommand = sun3scsi_queue_command, |
Finn Thain | aa2e2cb | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 425 | .eh_abort_handler = sun3scsi_abort, |
| 426 | .eh_bus_reset_handler = sun3scsi_bus_reset, |
Finn Thain | d572f65f | 2014-11-12 16:12:00 +1100 | [diff] [blame] | 427 | .can_queue = 16, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | .this_id = 7, |
Finn Thain | d572f65f | 2014-11-12 16:12:00 +1100 | [diff] [blame] | 429 | .sg_tablesize = SG_NONE, |
| 430 | .cmd_per_lun = 2, |
Finn Thain | aa2e2cb | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 431 | .use_clustering = DISABLE_CLUSTERING, |
Finn Thain | 32b26a1 | 2016-01-03 16:05:58 +1100 | [diff] [blame] | 432 | .cmd_size = NCR5380_CMD_SIZE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | }; |
| 434 | |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 435 | static int __init sun3_scsi_probe(struct platform_device *pdev) |
| 436 | { |
| 437 | struct Scsi_Host *instance; |
| 438 | int error; |
| 439 | struct resource *irq, *mem; |
| 440 | unsigned char *ioaddr; |
Finn Thain | ca513fc | 2014-11-12 16:12:19 +1100 | [diff] [blame] | 441 | int host_flags = 0; |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 442 | #ifdef SUN3_SCSI_VME |
| 443 | int i; |
| 444 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 446 | if (setup_can_queue > 0) |
| 447 | sun3_scsi_template.can_queue = setup_can_queue; |
| 448 | if (setup_cmd_per_lun > 0) |
| 449 | sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun; |
| 450 | if (setup_sg_tablesize >= 0) |
| 451 | sun3_scsi_template.sg_tablesize = setup_sg_tablesize; |
| 452 | if (setup_hostid >= 0) |
| 453 | sun3_scsi_template.this_id = setup_hostid & 7; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 455 | #ifdef SUN3_SCSI_VME |
| 456 | ioaddr = NULL; |
| 457 | for (i = 0; i < 2; i++) { |
| 458 | unsigned char x; |
| 459 | |
| 460 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, i); |
| 461 | mem = platform_get_resource(pdev, IORESOURCE_MEM, i); |
| 462 | if (!irq || !mem) |
| 463 | break; |
| 464 | |
| 465 | ioaddr = sun3_ioremap(mem->start, resource_size(mem), |
| 466 | SUN3_PAGE_TYPE_VME16); |
| 467 | dregs = (struct sun3_dma_regs *)(ioaddr + 8); |
| 468 | |
| 469 | if (sun3_map_test((unsigned long)dregs, &x)) { |
| 470 | unsigned short oldcsr; |
| 471 | |
| 472 | oldcsr = dregs->csr; |
| 473 | dregs->csr = 0; |
| 474 | udelay(SUN3_DMA_DELAY); |
| 475 | if (dregs->csr == 0x1400) |
| 476 | break; |
| 477 | |
| 478 | dregs->csr = oldcsr; |
| 479 | } |
| 480 | |
| 481 | iounmap(ioaddr); |
| 482 | ioaddr = NULL; |
| 483 | } |
| 484 | if (!ioaddr) |
| 485 | return -ENODEV; |
| 486 | #else |
| 487 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 488 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 489 | if (!irq || !mem) |
| 490 | return -ENODEV; |
| 491 | |
| 492 | ioaddr = ioremap(mem->start, resource_size(mem)); |
| 493 | dregs = (struct sun3_dma_regs *)(ioaddr + 8); |
| 494 | |
| 495 | udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs)); |
| 496 | if (!udc_regs) { |
| 497 | pr_err(PFX "couldn't allocate DVMA memory!\n"); |
| 498 | iounmap(ioaddr); |
| 499 | return -ENOMEM; |
| 500 | } |
| 501 | #endif |
| 502 | |
| 503 | sun3_scsi_regp = ioaddr; |
| 504 | |
| 505 | instance = scsi_host_alloc(&sun3_scsi_template, |
| 506 | sizeof(struct NCR5380_hostdata)); |
| 507 | if (!instance) { |
| 508 | error = -ENOMEM; |
| 509 | goto fail_alloc; |
| 510 | } |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 511 | |
| 512 | instance->io_port = (unsigned long)ioaddr; |
| 513 | instance->irq = irq->start; |
| 514 | |
Finn Thain | ca513fc | 2014-11-12 16:12:19 +1100 | [diff] [blame] | 515 | #ifdef SUPPORT_TAGS |
| 516 | host_flags |= setup_use_tagged_queuing > 0 ? FLAG_TAGGED_QUEUING : 0; |
| 517 | #endif |
| 518 | |
Finn Thain | 0ad0eff | 2016-01-03 16:05:21 +1100 | [diff] [blame] | 519 | error = NCR5380_init(instance, host_flags); |
| 520 | if (error) |
| 521 | goto fail_init; |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 522 | |
| 523 | error = request_irq(instance->irq, scsi_sun3_intr, 0, |
| 524 | "NCR5380", instance); |
| 525 | if (error) { |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 526 | pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n", |
| 527 | instance->host_no, instance->irq); |
| 528 | goto fail_irq; |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 529 | } |
| 530 | |
| 531 | dregs->csr = 0; |
| 532 | udelay(SUN3_DMA_DELAY); |
| 533 | dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; |
| 534 | udelay(SUN3_DMA_DELAY); |
| 535 | dregs->fifo_count = 0; |
| 536 | #ifdef SUN3_SCSI_VME |
| 537 | dregs->fifo_count_hi = 0; |
| 538 | dregs->dma_addr_hi = 0; |
| 539 | dregs->dma_addr_lo = 0; |
| 540 | dregs->dma_count_hi = 0; |
| 541 | dregs->dma_count_lo = 0; |
| 542 | |
| 543 | dregs->ivect = VME_DATA24 | (instance->irq & 0xff); |
| 544 | #endif |
| 545 | |
Finn Thain | 9c3f0e2 | 2016-01-03 16:05:11 +1100 | [diff] [blame] | 546 | NCR5380_maybe_reset_bus(instance); |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 547 | |
| 548 | error = scsi_add_host(instance, NULL); |
| 549 | if (error) |
| 550 | goto fail_host; |
| 551 | |
| 552 | platform_set_drvdata(pdev, instance); |
| 553 | |
| 554 | scsi_scan_host(instance); |
| 555 | return 0; |
| 556 | |
| 557 | fail_host: |
Finn Thain | e4dec68 | 2016-03-23 21:10:12 +1100 | [diff] [blame] | 558 | free_irq(instance->irq, instance); |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 559 | fail_irq: |
| 560 | NCR5380_exit(instance); |
Finn Thain | 0ad0eff | 2016-01-03 16:05:21 +1100 | [diff] [blame] | 561 | fail_init: |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 562 | scsi_host_put(instance); |
| 563 | fail_alloc: |
| 564 | if (udc_regs) |
| 565 | dvma_free(udc_regs); |
| 566 | iounmap(sun3_scsi_regp); |
| 567 | return error; |
| 568 | } |
| 569 | |
| 570 | static int __exit sun3_scsi_remove(struct platform_device *pdev) |
| 571 | { |
| 572 | struct Scsi_Host *instance = platform_get_drvdata(pdev); |
| 573 | |
| 574 | scsi_remove_host(instance); |
Finn Thain | e4dec68 | 2016-03-23 21:10:12 +1100 | [diff] [blame] | 575 | free_irq(instance->irq, instance); |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 576 | NCR5380_exit(instance); |
| 577 | scsi_host_put(instance); |
| 578 | if (udc_regs) |
| 579 | dvma_free(udc_regs); |
| 580 | iounmap(sun3_scsi_regp); |
| 581 | return 0; |
| 582 | } |
| 583 | |
| 584 | static struct platform_driver sun3_scsi_driver = { |
| 585 | .remove = __exit_p(sun3_scsi_remove), |
| 586 | .driver = { |
| 587 | .name = DRV_MODULE_NAME, |
Finn Thain | 0d31f87 | 2014-11-13 12:21:28 +1100 | [diff] [blame] | 588 | }, |
| 589 | }; |
| 590 | |
| 591 | module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe); |
| 592 | |
| 593 | MODULE_ALIAS("platform:" DRV_MODULE_NAME); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | MODULE_LICENSE("GPL"); |