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Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -08001# Put here option for CPU selection and depending optimization
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -08002choice
3 prompt "Processor family"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +01004 default M686 if X86_32
5 default GENERIC_CPU if X86_64
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -08006
H. Peter Anvineb068e72012-11-28 11:50:23 -08007config M486
8 bool "486"
9 depends on X86_32
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080010 ---help---
H. Peter Anvineb068e72012-11-28 11:50:23 -080011 This is the processor type of your CPU. This information is
12 used for optimizing purposes. In order to compile a kernel
13 that can run on all supported x86 CPU types (albeit not
14 optimally fast), you can specify "486" here.
15
16 Note that the 386 is no longer supported, this includes
17 AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
18 and UMC 486SX-S.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080019
20 The kernel will not necessarily run on earlier architectures than
21 the one you have chosen, e.g. a Pentium optimized kernel will run on
22 a PPro, but not necessarily on a i486.
23
24 Here are the settings recommended for greatest speed:
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080025 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
26 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
27 - "586" for generic Pentium CPUs lacking the TSC
28 (time stamp counter) register.
29 - "Pentium-Classic" for the Intel Pentium.
30 - "Pentium-MMX" for the Intel Pentium MMX.
31 - "Pentium-Pro" for the Intel Pentium Pro.
32 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
33 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
34 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
35 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
36 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
37 - "Crusoe" for the Transmeta Crusoe series.
38 - "Efficeon" for the Transmeta Efficeon series.
39 - "Winchip-C6" for original IDT Winchip.
Krzysztof Helt69d45dd2008-09-28 21:28:15 +020040 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080041 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
Jordan Crousef90b8112006-01-06 00:12:14 -080042 - "Geode GX/LX" For AMD Geode GX and LX processors.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080043 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
Egry Gabor48a12042006-06-26 18:47:15 +020044 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
Simon Arlott0949be32007-05-02 19:27:05 +020045 - "VIA C7" for VIA C7.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080046
H. Peter Anvineb068e72012-11-28 11:50:23 -080047 If you don't know what to do, choose "486".
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080048
49config M586
50 bool "586/K5/5x86/6x86/6x86MX"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010051 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010052 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080053 Select this for an 586 or 686 series processor such as the AMD K5,
54 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
55 assume the RDTSC (Read Time Stamp Counter) instruction.
56
57config M586TSC
58 bool "Pentium-Classic"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010059 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010060 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080061 Select this for a Pentium Classic processor with the RDTSC (Read
62 Time Stamp Counter) instruction for benchmarking.
63
64config M586MMX
65 bool "Pentium-MMX"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010066 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010067 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080068 Select this for a Pentium with the MMX graphics/multimedia
69 extended instructions.
70
71config M686
72 bool "Pentium-Pro"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010073 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010074 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080075 Select this for Intel Pentium Pro chips. This enables the use of
76 Pentium Pro extended instructions, and disables the init-time guard
77 against the f00f bug found in earlier Pentiums.
78
79config MPENTIUMII
80 bool "Pentium-II/Celeron(pre-Coppermine)"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010081 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010082 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080083 Select this for Intel chips based on the Pentium-II and
84 pre-Coppermine Celeron core. This option enables an unaligned
85 copy optimization, compiles the kernel with optimization flags
86 tailored for the chip, and applies any applicable Pentium Pro
87 optimizations.
88
89config MPENTIUMIII
90 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010091 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010092 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080093 Select this for Intel chips based on the Pentium-III and
94 Celeron-Coppermine core. This option enables use of some
95 extended prefetch instructions in addition to the Pentium II
96 extensions.
97
98config MPENTIUMM
99 bool "Pentium M"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100100 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100101 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800102 Select this for Intel Pentium M (not Pentium-4 M)
103 notebook chips.
104
105config MPENTIUM4
Andi Kleenc55d92d2006-12-07 02:14:09 +0100106 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100107 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100108 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800109 Select this for Intel Pentium 4 chips. This includes the
Oliver Pinter75e38082007-10-17 18:04:36 +0200110 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
111 Pentium-4 M (not Pentium M) chips. This option enables compile
112 flags optimized for the chip, uses the correct cache line size, and
113 applies any applicable optimizations.
114
115 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
116
117 Select this for:
118 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
119 -Willamette
120 -Northwood
121 -Mobile Pentium 4
122 -Mobile Pentium 4 M
123 -Extreme Edition (Gallatin)
124 -Prescott
125 -Prescott 2M
126 -Cedar Mill
127 -Presler
128 -Smithfiled
129 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
130 -Foster
131 -Prestonia
132 -Gallatin
133 -Nocona
134 -Irwindale
135 -Cranford
136 -Potomac
137 -Paxville
138 -Dempsey
139
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800140
141config MK6
142 bool "K6/K6-II/K6-III"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100143 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100144 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800145 Select this for an AMD K6-family processor. Enables use of
146 some extended instructions, and passes appropriate optimization
147 flags to GCC.
148
149config MK7
150 bool "Athlon/Duron/K7"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100151 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100152 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800153 Select this for an AMD Athlon K7-family processor. Enables use of
154 some extended instructions, and passes appropriate optimization
155 flags to GCC.
156
157config MK8
158 bool "Opteron/Athlon64/Hammer/K8"
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100159 ---help---
Borislav Petkov36723bf2009-02-04 21:44:04 +0100160 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
161 Enables use of some extended instructions, and passes appropriate
162 optimization flags to GCC.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800163
164config MCRUSOE
165 bool "Crusoe"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100166 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100167 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800168 Select this for a Transmeta Crusoe processor. Treats the processor
169 like a 586 with TSC, and sets some GCC optimization flags (like a
170 Pentium Pro with no alignment requirements).
171
172config MEFFICEON
173 bool "Efficeon"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100174 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100175 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800176 Select this for a Transmeta Efficeon processor.
177
178config MWINCHIPC6
179 bool "Winchip-C6"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100180 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100181 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800182 Select this for an IDT Winchip C6 chip. Linux and GCC
183 treat this chip as a 586TSC with some extended instructions
184 and alignment requirements.
185
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800186config MWINCHIP3D
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200187 bool "Winchip-2/Winchip-2A/Winchip-3"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100188 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100189 ---help---
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200190 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800191 treat this chip as a 586TSC with some extended instructions
David Sterba3dde6ad2007-05-09 07:12:20 +0200192 and alignment requirements. Also enable out of order memory
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800193 stores for this CPU, which can increase performance of some
194 operations.
195
Ian Campbellce9c99a2011-04-08 07:42:29 +0100196config MELAN
197 bool "AMD Elan"
198 depends on X86_32
199 ---help---
200 Select this for an AMD Elan processor.
201
202 Do not use this option for K6/Athlon/Opteron processors!
203
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800204config MGEODEGX1
205 bool "GeodeGX1"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100206 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100207 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800208 Select this for a Geode GX1 (Cyrix MediaGX) chip.
209
Jordan Crousef90b8112006-01-06 00:12:14 -0800210config MGEODE_LX
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100211 bool "Geode GX/LX"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100212 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100213 ---help---
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100214 Select this for AMD Geode GX and LX processors.
Jordan Crousef90b8112006-01-06 00:12:14 -0800215
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800216config MCYRIXIII
217 bool "CyrixIII/VIA-C3"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100218 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100219 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800220 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
221 treat this chip as a generic 586. Whilst the CPU is 686 class,
222 it lacks the cmov extension which gcc assumes is present when
223 generating 686 code.
224 Note that Nehemiah (Model 9) and above will not boot with this
225 kernel due to them lacking the 3DNow! instructions used in earlier
226 incarnations of the CPU.
227
228config MVIAC3_2
229 bool "VIA C3-2 (Nehemiah)"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100230 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100231 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800232 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
233 of SSE and tells gcc to treat the CPU as a 686.
234 Note, this kernel will not boot on older (pre model 9) C3s.
235
Simon Arlott0949be32007-05-02 19:27:05 +0200236config MVIAC7
237 bool "VIA C7"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100238 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100239 ---help---
Simon Arlott0949be32007-05-02 19:27:05 +0200240 Select this for a VIA C7. Selecting this uses the correct cache
241 shift and tells gcc to treat the CPU as a 686.
242
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100243config MPSC
244 bool "Intel P4 / older Netburst based Xeon"
245 depends on X86_64
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100246 ---help---
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100247 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
248 Xeon CPUs with Intel 64bit which is compatible with x86-64.
249 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100250 Netburst core and shouldn't use this option. You can distinguish them
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100251 using the cpu family field
252 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
253
254config MCORE2
255 bool "Core 2/newer Xeon"
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100256 ---help---
Borislav Petkov36723bf2009-02-04 21:44:04 +0100257
258 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
259 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
260 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
261 (not a typo)
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100262
Tobias Doerffel366d19e2009-08-21 23:06:23 +0200263config MATOM
264 bool "Intel Atom"
265 ---help---
266
267 Select this for the Intel Atom platform. Intel Atom CPUs have an
268 in-order pipelining architecture and thus can benefit from
269 accordingly optimized code. Use a recent GCC with specific Atom
270 support in order to fully benefit from selecting this option.
271
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100272config GENERIC_CPU
273 bool "Generic-x86-64"
274 depends on X86_64
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100275 ---help---
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100276 Generic x86-64 CPU.
277 Run equally well on all x86-64 CPUs.
278
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800279endchoice
280
281config X86_GENERIC
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100282 bool "Generic x86 support"
283 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100284 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800285 Instead of just including optimizations for the selected
286 x86 variant (e.g. PII, Crusoe or Athlon), include some more
287 generic optimizations as well. This will make the kernel
288 perform better on x86 CPUs other than that selected.
289
290 This is really intended for distributors who need more
291 generic optimizations.
292
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800293#
294# Define implied options from the CPU selection here
Jan Beulich350f8f52009-11-13 11:54:40 +0000295config X86_INTERNODE_CACHE_SHIFT
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100296 int
Jan Beulich350f8f52009-11-13 11:54:40 +0000297 default "12" if X86_VSMP
Jan Beulich350f8f52009-11-13 11:54:40 +0000298 default X86_L1_CACHE_SHIFT
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100299
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800300config X86_CMPXCHG
Jan Beulich3120e252012-09-10 12:41:45 +0100301 def_bool y
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800302
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800303config X86_L1_CACHE_SHIFT
304 int
Ingo Molnar0a2a18b72009-01-12 23:37:16 +0100305 default "7" if MPENTIUM4 || MPSC
Jan Beulich350f8f52009-11-13 11:54:40 +0000306 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
H. Peter Anvineb068e72012-11-28 11:50:23 -0800307 default "4" if MELAN || M486 || MGEODEGX1
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200308 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800309
Andi Kleenc7f81c92007-05-02 19:27:20 +0200310config X86_XADD
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100311 def_bool y
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800312
313config X86_PPRO_FENCE
Nick Pigginfb0328e2008-01-30 13:32:31 +0100314 bool "PentiumPro memory ordering errata workaround"
H. Peter Anvineb068e72012-11-28 11:50:23 -0800315 depends on M686 || M586MMX || M586TSC || M586 || M486 || MGEODEGX1
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100316 ---help---
Borislav Petkov36723bf2009-02-04 21:44:04 +0100317 Old PentiumPro multiprocessor systems had errata that could cause
318 memory operations to violate the x86 ordering standard in rare cases.
319 Enabling this option will attempt to work around some (but not all)
Lucas De Marchi0d2eb442011-03-17 16:24:16 -0300320 occurrences of this problem, at the cost of much heavier spinlock and
Borislav Petkov36723bf2009-02-04 21:44:04 +0100321 memory barrier operations.
Nick Pigginfb0328e2008-01-30 13:32:31 +0100322
Borislav Petkov36723bf2009-02-04 21:44:04 +0100323 If unsure, say n here. Even distro kernels should think twice before
324 enabling this: there are few systems, and an unlikely bug.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800325
326config X86_F00F_BUG
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100327 def_bool y
H. Peter Anvineb068e72012-11-28 11:50:23 -0800328 depends on M586MMX || M586TSC || M586 || M486
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800329
Brian Gerst40d2e762010-03-21 09:00:43 -0400330config X86_INVD_BUG
331 def_bool y
H. Peter Anvineb068e72012-11-28 11:50:23 -0800332 depends on M486
Brian Gerst40d2e762010-03-21 09:00:43 -0400333
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800334config X86_WP_WORKS_OK
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100335 def_bool y
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800336
337config X86_INVLPG
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100338 def_bool y
H. Peter Anvineb068e72012-11-28 11:50:23 -0800339 depends on X86_32
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800340
341config X86_BSWAP
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100342 def_bool y
H. Peter Anvineb068e72012-11-28 11:50:23 -0800343 depends on X86_32
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800344
345config X86_POPAD_OK
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100346 def_bool y
H. Peter Anvineb068e72012-11-28 11:50:23 -0800347 depends on X86_32
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800348
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800349config X86_ALIGNMENT_16
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100350 def_bool y
Ian Campbellce9c99a2011-04-08 07:42:29 +0100351 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800352
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800353config X86_INTEL_USERCOPY
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100354 def_bool y
Andi Kleenc55d92d2006-12-07 02:14:09 +0100355 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800356
357config X86_USE_PPRO_CHECKSUM
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100358 def_bool y
Jon Nettleton1eda75c2011-03-16 15:32:47 +0000359 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800360
361config X86_USE_3DNOW
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100362 def_bool y
Paolo 'Blaisorblade' Giarrusso1b4ad242006-10-11 01:21:35 -0700363 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800364
365config X86_OOSTORE
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100366 def_bool y
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200367 depends on (MWINCHIP3D || MWINCHIPC6) && MTRR
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800368
H. Peter Anvin959b3be2008-02-14 14:56:45 -0800369#
370# P6_NOPs are a relatively minor optimization that require a family >=
371# 6 processor, except that it is broken on certain VIA chips.
372# Furthermore, AMD chips prefer a totally different sequence of NOPs
Linus Torvalds14469a82008-09-05 09:30:14 -0700373# (which work on all CPUs). In addition, it looks like Virtual PC
374# does not understand them.
375#
376# As a result, disallow these if we're not compiling for X86_64 (these
377# NOPs do work on all x86-64 capable chips); the list of processors in
378# the right-hand clause are the cores that benefit from this optimization.
H. Peter Anvin959b3be2008-02-14 14:56:45 -0800379#
H. Peter Anvin7343b3b2008-02-14 14:52:05 -0800380config X86_P6_NOP
381 def_bool y
Linus Torvalds14469a82008-09-05 09:30:14 -0700382 depends on X86_64
383 depends on (MCORE2 || MPENTIUM4 || MPSC)
H. Peter Anvin7343b3b2008-02-14 14:52:05 -0800384
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800385config X86_TSC
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100386 def_bool y
Tobias Doerffel366d19e2009-08-21 23:06:23 +0200387 depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64
Andi Kleenc7f81c92007-05-02 19:27:20 +0200388
Jan Beulichf8096f92008-04-22 16:27:29 +0100389config X86_CMPXCHG64
390 def_bool y
Rusty Russelldb677ff2010-01-05 12:48:49 +1030391 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
Jan Beulichf8096f92008-04-22 16:27:29 +0100392
Andi Kleenc7f81c92007-05-02 19:27:20 +0200393# this should be set for all -march=.. options where the compiler
394# generates cmov.
395config X86_CMOV
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100396 def_bool y
Matteo Croce98059e32009-10-01 17:11:10 +0200397 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
Andi Kleenc7f81c92007-05-02 19:27:20 +0200398
H. Peter Anvinde32e042007-07-11 12:18:30 -0700399config X86_MINIMUM_CPU_FAMILY
Andi Kleenc7f81c92007-05-02 19:27:20 +0200400 int
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100401 default "64" if X86_64
H. Peter Anvin7343b3b2008-02-14 14:52:05 -0800402 default "6" if X86_32 && X86_P6_NOP
Linus Torvalds982d0072009-09-30 17:57:27 -0700403 default "5" if X86_32 && X86_CMPXCHG64
H. Peter Anvineb068e72012-11-28 11:50:23 -0800404 default "4"
Andi Kleenc7f81c92007-05-02 19:27:20 +0200405
Roland McGrath0a049bb2008-01-30 13:30:54 +0100406config X86_DEBUGCTLMSR
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100407 def_bool y
H. Peter Anvineb068e72012-11-28 11:50:23 -0800408 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486) && !UML
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200409
410menuconfig PROCESSOR_SELECT
David Rientjes6a108a12011-01-20 14:44:16 -0800411 bool "Supported processor vendors" if EXPERT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100412 ---help---
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200413 This lets you choose what x86 vendor support code your kernel
414 will include.
415
Yinghai Lu879d7922008-09-09 16:40:37 -0700416config CPU_SUP_INTEL
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200417 default y
418 bool "Support Intel processors" if PROCESSOR_SELECT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100419 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200420 This enables detection, tunings and quirks for Intel processors
421
422 You need this enabled if you want your kernel to run on an
423 Intel CPU. Disabling this option on other types of CPUs
424 makes the kernel a tiny bit smaller. Disabling it on an Intel
425 CPU might render the kernel unbootable.
426
427 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200428
429config CPU_SUP_CYRIX_32
430 default y
431 bool "Support Cyrix processors" if PROCESSOR_SELECT
H. Peter Anvineb068e72012-11-28 11:50:23 -0800432 depends on M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100433 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200434 This enables detection, tunings and quirks for Cyrix processors
435
436 You need this enabled if you want your kernel to run on a
437 Cyrix CPU. Disabling this option on other types of CPUs
438 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
439 CPU might render the kernel unbootable.
440
441 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200442
Yinghai Luff731522008-09-07 17:58:56 -0700443config CPU_SUP_AMD
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200444 default y
445 bool "Support AMD processors" if PROCESSOR_SELECT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100446 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200447 This enables detection, tunings and quirks for AMD processors
448
449 You need this enabled if you want your kernel to run on an
450 AMD CPU. Disabling this option on other types of CPUs
451 makes the kernel a tiny bit smaller. Disabling it on an AMD
452 CPU might render the kernel unbootable.
453
454 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200455
Sebastian Andrzej Siewior48f4c482009-03-14 12:24:02 +0100456config CPU_SUP_CENTAUR
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200457 default y
458 bool "Support Centaur processors" if PROCESSOR_SELECT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100459 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200460 This enables detection, tunings and quirks for Centaur processors
461
462 You need this enabled if you want your kernel to run on a
463 Centaur CPU. Disabling this option on other types of CPUs
464 makes the kernel a tiny bit smaller. Disabling it on a Centaur
465 CPU might render the kernel unbootable.
466
467 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200468
469config CPU_SUP_TRANSMETA_32
470 default y
471 bool "Support Transmeta processors" if PROCESSOR_SELECT
472 depends on !64BIT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100473 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200474 This enables detection, tunings and quirks for Transmeta processors
475
476 You need this enabled if you want your kernel to run on a
477 Transmeta CPU. Disabling this option on other types of CPUs
478 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
479 CPU might render the kernel unbootable.
480
481 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200482
483config CPU_SUP_UMC_32
484 default y
485 bool "Support UMC processors" if PROCESSOR_SELECT
H. Peter Anvineb068e72012-11-28 11:50:23 -0800486 depends on M486 || (EXPERT && !64BIT)
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100487 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200488 This enables detection, tunings and quirks for UMC processors
489
490 You need this enabled if you want your kernel to run on a
491 UMC CPU. Disabling this option on other types of CPUs
492 makes the kernel a tiny bit smaller. Disabling it on a UMC
493 CPU might render the kernel unbootable.
494
495 If unsure, say N.