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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
203 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
204 MLX5_CMD_OP_QUERY_RQ = 0x90b,
205 MLX5_CMD_OP_CREATE_RMP = 0x90c,
206 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
207 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
208 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300209 MLX5_CMD_OP_CREATE_TIS = 0x912,
210 MLX5_CMD_OP_MODIFY_TIS = 0x913,
211 MLX5_CMD_OP_DESTROY_TIS = 0x914,
212 MLX5_CMD_OP_QUERY_TIS = 0x915,
213 MLX5_CMD_OP_CREATE_RQT = 0x916,
214 MLX5_CMD_OP_MODIFY_RQT = 0x917,
215 MLX5_CMD_OP_DESTROY_RQT = 0x918,
216 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200217 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300218 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
219 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
220 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
221 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
222 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
223 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
224 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
225 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200226 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000227 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
228 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
229 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300230 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300231 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
232 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200233 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
234 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300235 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
236 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
237 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
238 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
239 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300240 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300241};
242
243struct mlx5_ifc_flow_table_fields_supported_bits {
244 u8 outer_dmac[0x1];
245 u8 outer_smac[0x1];
246 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300247 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300248 u8 outer_first_prio[0x1];
249 u8 outer_first_cfi[0x1];
250 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300251 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300252 u8 outer_second_prio[0x1];
253 u8 outer_second_cfi[0x1];
254 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200255 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300256 u8 outer_sip[0x1];
257 u8 outer_dip[0x1];
258 u8 outer_frag[0x1];
259 u8 outer_ip_protocol[0x1];
260 u8 outer_ip_ecn[0x1];
261 u8 outer_ip_dscp[0x1];
262 u8 outer_udp_sport[0x1];
263 u8 outer_udp_dport[0x1];
264 u8 outer_tcp_sport[0x1];
265 u8 outer_tcp_dport[0x1];
266 u8 outer_tcp_flags[0x1];
267 u8 outer_gre_protocol[0x1];
268 u8 outer_gre_key[0x1];
269 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200270 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300271 u8 source_eswitch_port[0x1];
272
273 u8 inner_dmac[0x1];
274 u8 inner_smac[0x1];
275 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300276 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300277 u8 inner_first_prio[0x1];
278 u8 inner_first_cfi[0x1];
279 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200280 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300281 u8 inner_second_prio[0x1];
282 u8 inner_second_cfi[0x1];
283 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200284 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300285 u8 inner_sip[0x1];
286 u8 inner_dip[0x1];
287 u8 inner_frag[0x1];
288 u8 inner_ip_protocol[0x1];
289 u8 inner_ip_ecn[0x1];
290 u8 inner_ip_dscp[0x1];
291 u8 inner_udp_sport[0x1];
292 u8 inner_udp_dport[0x1];
293 u8 inner_tcp_sport[0x1];
294 u8 inner_tcp_dport[0x1];
295 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200296 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300297
Matan Barakb4ff3a32016-02-09 14:57:42 +0200298 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300299};
300
301struct mlx5_ifc_flow_table_prop_layout_bits {
302 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000303 u8 reserved_at_1[0x1];
304 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200305 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200306 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200307 u8 identified_miss_table_mode[0x1];
308 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300309 u8 encap[0x1];
310 u8 decap[0x1];
311 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312
Matan Barakb4ff3a32016-02-09 14:57:42 +0200313 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300314 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200315 u8 log_max_modify_header_context[0x8];
316 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 max_ft_level[0x8];
318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320
Matan Barakb4ff3a32016-02-09 14:57:42 +0200321 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200322 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_destination[0x8];
326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328 u8 log_max_flow[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331
332 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
333
334 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
335};
336
337struct mlx5_ifc_odp_per_transport_service_cap_bits {
338 u8 send[0x1];
339 u8 receive[0x1];
340 u8 write[0x1];
341 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200342 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300343 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200344 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300345};
346
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200347struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200349
350 u8 ipv4[0x20];
351};
352
353struct mlx5_ifc_ipv6_layout_bits {
354 u8 ipv6[16][0x8];
355};
356
357union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
358 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
359 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200360 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200361};
362
Saeed Mahameede2816822015-05-28 22:28:40 +0300363struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
364 u8 smac_47_16[0x20];
365
366 u8 smac_15_0[0x10];
367 u8 ethertype[0x10];
368
369 u8 dmac_47_16[0x20];
370
371 u8 dmac_15_0[0x10];
372 u8 first_prio[0x3];
373 u8 first_cfi[0x1];
374 u8 first_vid[0xc];
375
376 u8 ip_protocol[0x8];
377 u8 ip_dscp[0x6];
378 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300379 u8 cvlan_tag[0x1];
380 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300381 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300382 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300383 u8 tcp_flags[0x9];
384
385 u8 tcp_sport[0x10];
386 u8 tcp_dport[0x10];
387
Or Gerlitza8ade552017-06-07 17:49:56 +0300388 u8 reserved_at_c0[0x18];
389 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300390
391 u8 udp_sport[0x10];
392 u8 udp_dport[0x10];
393
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200394 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300395
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200396 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300397};
398
399struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300400 u8 reserved_at_0[0x8];
401 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300402
Matan Barakb4ff3a32016-02-09 14:57:42 +0200403 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300404 u8 source_port[0x10];
405
406 u8 outer_second_prio[0x3];
407 u8 outer_second_cfi[0x1];
408 u8 outer_second_vid[0xc];
409 u8 inner_second_prio[0x3];
410 u8 inner_second_cfi[0x1];
411 u8 inner_second_vid[0xc];
412
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300413 u8 outer_second_cvlan_tag[0x1];
414 u8 inner_second_cvlan_tag[0x1];
415 u8 outer_second_svlan_tag[0x1];
416 u8 inner_second_svlan_tag[0x1];
417 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300418 u8 gre_protocol[0x10];
419
420 u8 gre_key_h[0x18];
421 u8 gre_key_l[0x8];
422
423 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200424 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300425
Matan Barakb4ff3a32016-02-09 14:57:42 +0200426 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300427
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429 u8 outer_ipv6_flow_label[0x14];
430
Matan Barakb4ff3a32016-02-09 14:57:42 +0200431 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300432 u8 inner_ipv6_flow_label[0x14];
433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435};
436
437struct mlx5_ifc_cmd_pas_bits {
438 u8 pa_h[0x20];
439
440 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200441 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442};
443
444struct mlx5_ifc_uint64_bits {
445 u8 hi[0x20];
446
447 u8 lo[0x20];
448};
449
450enum {
451 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
452 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
453 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
454 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
455 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
456 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
457 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
458 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
459 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
460 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
461};
462
463struct mlx5_ifc_ads_bits {
464 u8 fl[0x1];
465 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200466 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300467 u8 pkey_index[0x10];
468
Matan Barakb4ff3a32016-02-09 14:57:42 +0200469 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300470 u8 grh[0x1];
471 u8 mlid[0x7];
472 u8 rlid[0x10];
473
474 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200477 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300478 u8 stat_rate[0x4];
479 u8 hop_limit[0x8];
480
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 tclass[0x8];
483 u8 flow_label[0x14];
484
485 u8 rgid_rip[16][0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 f_dscp[0x1];
489 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200490 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300491 u8 f_eth_prio[0x1];
492 u8 ecn[0x2];
493 u8 dscp[0x6];
494 u8 udp_sport[0x10];
495
496 u8 dei_cfi[0x1];
497 u8 eth_prio[0x3];
498 u8 sl[0x4];
499 u8 port[0x8];
500 u8 rmac_47_32[0x10];
501
502 u8 rmac_31_0[0x20];
503};
504
505struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200506 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300507 u8 nic_rx_multi_path_tirs_fts[0x1];
508 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
509 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510
511 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
512
Matan Barakb4ff3a32016-02-09 14:57:42 +0200513 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514
515 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524};
525
Saeed Mahameed495716b2015-12-01 18:03:19 +0200526struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200527 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200528
529 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
532
533 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
534
Matan Barakb4ff3a32016-02-09 14:57:42 +0200535 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536};
537
Saeed Mahameedd6666752015-12-01 18:03:22 +0200538struct mlx5_ifc_e_switch_cap_bits {
539 u8 vport_svlan_strip[0x1];
540 u8 vport_cvlan_strip[0x1];
541 u8 vport_svlan_insert[0x1];
542 u8 vport_cvlan_insert_if_not_exist[0x1];
543 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300544 u8 reserved_at_5[0x19];
545 u8 nic_vport_node_guid_modify[0x1];
546 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200547
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300548 u8 vxlan_encap_decap[0x1];
549 u8 nvgre_encap_decap[0x1];
550 u8 reserved_at_22[0x9];
551 u8 log_max_encap_headers[0x5];
552 u8 reserved_2b[0x6];
553 u8 max_encap_header_size[0xa];
554
555 u8 reserved_40[0x7c0];
556
Saeed Mahameedd6666752015-12-01 18:03:22 +0200557};
558
Saeed Mahameed74862162016-06-09 15:11:34 +0300559struct mlx5_ifc_qos_cap_bits {
560 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300561 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200562 u8 esw_bw_share[0x1];
563 u8 esw_rate_limit[0x1];
564 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300565
566 u8 reserved_at_20[0x20];
567
Saeed Mahameed74862162016-06-09 15:11:34 +0300568 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300569
Saeed Mahameed74862162016-06-09 15:11:34 +0300570 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300573 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300574
575 u8 esw_element_type[0x10];
576 u8 esw_tsar_type[0x10];
577
578 u8 reserved_at_c0[0x10];
579 u8 max_qos_para_vport[0x10];
580
581 u8 max_tsar_bw_share[0x20];
582
583 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300584};
585
Saeed Mahameede2816822015-05-28 22:28:40 +0300586struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
587 u8 csum_cap[0x1];
588 u8 vlan_cap[0x1];
589 u8 lro_cap[0x1];
590 u8 lro_psh_flag[0x1];
591 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200592 u8 reserved_at_5[0x2];
593 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200594 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200595 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300596 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200597 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300598 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300599 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300600 u8 reg_umr_sq[0x1];
601 u8 scatter_fcs[0x1];
602 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300603 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200604 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 tunnel_statless_gre[0x1];
606 u8 tunnel_stateless_vxlan[0x1];
607
Ilan Tayari547eede2017-04-18 16:04:28 +0300608 u8 swp[0x1];
609 u8 swp_csum[0x1];
610 u8 swp_lso[0x1];
611 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612
Matan Barakb4ff3a32016-02-09 14:57:42 +0200613 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300614 u8 lro_min_mss_size[0x10];
615
Matan Barakb4ff3a32016-02-09 14:57:42 +0200616 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300617
618 u8 lro_timer_supported_periods[4][0x20];
619
Matan Barakb4ff3a32016-02-09 14:57:42 +0200620 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300621};
622
623struct mlx5_ifc_roce_cap_bits {
624 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626
Matan Barakb4ff3a32016-02-09 14:57:42 +0200627 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300628
Matan Barakb4ff3a32016-02-09 14:57:42 +0200629 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300630 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632 u8 roce_version[0x8];
633
Matan Barakb4ff3a32016-02-09 14:57:42 +0200634 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300635 u8 r_roce_dest_udp_port[0x10];
636
637 u8 r_roce_max_src_udp_port[0x10];
638 u8 r_roce_min_src_udp_port[0x10];
639
Matan Barakb4ff3a32016-02-09 14:57:42 +0200640 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300641 u8 roce_address_table_size[0x10];
642
Matan Barakb4ff3a32016-02-09 14:57:42 +0200643 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300644};
645
646enum {
647 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
656};
657
658enum {
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
668};
669
670struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200671 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300672
Or Gerlitzbd108382017-05-28 15:24:17 +0300673 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200674 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300675 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300676
Matan Barakb4ff3a32016-02-09 14:57:42 +0200677 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300678
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Matan Barakb4ff3a32016-02-09 14:57:42 +0200681 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200682 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300683
Matan Barakb4ff3a32016-02-09 14:57:42 +0200684 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200685 u8 atomic_size_qp[0x10];
686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688 u8 atomic_size_dc[0x10];
689
Matan Barakb4ff3a32016-02-09 14:57:42 +0200690 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691};
692
693struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200694 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300695
696 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200697 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300698
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300700
701 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
702
703 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
704
705 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300708};
709
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200710struct mlx5_ifc_calc_op {
711 u8 reserved_at_0[0x10];
712 u8 reserved_at_10[0x9];
713 u8 op_swap_endianness[0x1];
714 u8 op_min[0x1];
715 u8 op_xor[0x1];
716 u8 op_or[0x1];
717 u8 op_and[0x1];
718 u8 op_max[0x1];
719 u8 op_add[0x1];
720};
721
722struct mlx5_ifc_vector_calc_cap_bits {
723 u8 calc_matrix[0x1];
724 u8 reserved_at_1[0x1f];
725 u8 reserved_at_20[0x8];
726 u8 max_vec_count[0x8];
727 u8 reserved_at_30[0xd];
728 u8 max_chunk_size[0x3];
729 struct mlx5_ifc_calc_op calc0;
730 struct mlx5_ifc_calc_op calc1;
731 struct mlx5_ifc_calc_op calc2;
732 struct mlx5_ifc_calc_op calc3;
733
734 u8 reserved_at_e0[0x720];
735};
736
Saeed Mahameede2816822015-05-28 22:28:40 +0300737enum {
738 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
739 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300740 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300741};
742
743enum {
744 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
745 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
746};
747
748enum {
749 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
750 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
751 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
752 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
753 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
754};
755
756enum {
757 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
758 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
759 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
760 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
761 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
762 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
763};
764
765enum {
766 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
767 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
768};
769
770enum {
771 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
772 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
773 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
774};
775
776enum {
777 MLX5_CAP_PORT_TYPE_IB = 0x0,
778 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300779};
780
Max Gurtovoy1410a902017-05-28 10:53:10 +0300781enum {
782 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
783 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
784 MLX5_CAP_UMR_FENCE_NONE = 0x2,
785};
786
Eli Cohenb7755162014-10-02 12:19:44 +0300787struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200788 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300789
790 u8 log_max_srq_sz[0x8];
791 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200792 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300793 u8 log_max_qp[0x5];
794
Matan Barakb4ff3a32016-02-09 14:57:42 +0200795 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300796 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300798
Matan Barakb4ff3a32016-02-09 14:57:42 +0200799 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300800 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300802 u8 log_max_cq[0x5];
803
804 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200805 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300806 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200807 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300808 u8 log_max_eq[0x4];
809
810 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200811 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200813 u8 force_teardown[0x1];
814 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300815 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200816 u8 umr_extended_translation_offset[0x1];
817 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_klm_list_size[0x6];
819
Matan Barakb4ff3a32016-02-09 14:57:42 +0200820 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200822 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300823 u8 log_max_ra_res_dc[0x6];
824
Matan Barakb4ff3a32016-02-09 14:57:42 +0200825 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300826 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200827 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300828 u8 log_max_ra_res_qp[0x6];
829
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200830 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 cc_query_allowed[0x1];
832 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200833 u8 start_pad[0x1];
834 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300835 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300836 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300837
Saeed Mahameede2816822015-05-28 22:28:40 +0300838 u8 out_of_seq_cnt[0x1];
839 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300840 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300841 u8 reserved_at_183[0x1];
842 u8 modify_rq_counter_set_id[0x1];
843 u8 reserved_at_185[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300844 u8 max_qp_cnt[0xa];
845 u8 pkey_table_size[0x10];
846
Saeed Mahameede2816822015-05-28 22:28:40 +0300847 u8 vport_group_manager[0x1];
848 u8 vhca_group_manager[0x1];
849 u8 ib_virt[0x1];
850 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200851 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300852 u8 ets[0x1];
853 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200854 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300855 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200856 u8 mcam_reg[0x1];
857 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200859 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200860 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300861 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200862 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300863 u8 disable_link_up[0x1];
864 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300865 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300866 u8 num_ports[0x8];
867
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300868 u8 reserved_at_1c0[0x1];
869 u8 pps[0x1];
870 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300871 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300872 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200873 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300874 u8 reserved_at_1d0[0x1];
875 u8 dcbx[0x1];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200876 u8 reserved_at_1d2[0x3];
877 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200878 u8 rol_s[0x1];
879 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300880 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200881 u8 wol_s[0x1];
882 u8 wol_g[0x1];
883 u8 wol_a[0x1];
884 u8 wol_b[0x1];
885 u8 wol_m[0x1];
886 u8 wol_u[0x1];
887 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300888
889 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300890 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300891 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300892
Saeed Mahameede2816822015-05-28 22:28:40 +0300893 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300894 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300895 u8 reserved_at_202[0x1];
896 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200897 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300898 u8 reserved_at_205[0x5];
899 u8 umr_fence[0x2];
900 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300901 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300902 u8 cmdif_checksum[0x2];
903 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300904 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300905 u8 wq_signature[0x1];
906 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300907 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300908 u8 sho[0x1];
909 u8 tph[0x1];
910 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300911 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300912 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300913 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300914 u8 roce[0x1];
915 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300916 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300917
918 u8 cq_oi[0x1];
919 u8 cq_resize[0x1];
920 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300921 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300922 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300923 u8 pg[0x1];
924 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300925 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300926 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300927 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300928 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300929 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300930 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200931 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300932 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200933 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300934 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300935 u8 qkv[0x1];
936 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200937 u8 set_deth_sqpn[0x1];
938 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300939 u8 xrc[0x1];
940 u8 ud[0x1];
941 u8 uc[0x1];
942 u8 rc[0x1];
943
Eli Cohena6d51b62017-01-03 23:55:23 +0200944 u8 uar_4k[0x1];
945 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300947 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300948 u8 log_pg_sz[0x8];
949
950 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200951 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300952 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300954 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300955
956 u8 reserved_at_270[0xb];
957 u8 lag_master[0x1];
958 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300959
Tariq Toukane1c9c622016-04-11 23:10:21 +0300960 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300961 u8 max_wqe_sz_sq[0x10];
962
Tariq Toukane1c9c622016-04-11 23:10:21 +0300963 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 max_wqe_sz_rq[0x10];
965
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300966 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 max_wqe_sz_sq_dc[0x10];
968
Tariq Toukane1c9c622016-04-11 23:10:21 +0300969 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300970 u8 max_qp_mcg[0x19];
971
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300973 u8 log_max_mcg[0x8];
974
Tariq Toukane1c9c622016-04-11 23:10:21 +0300975 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300976 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_max_xrcd[0x5];
981
Amir Vadaia351a1b02016-07-14 10:32:38 +0300982 u8 reserved_at_340[0x8];
983 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300984 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +0300985
Eli Cohenb7755162014-10-02 12:19:44 +0300986
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300988 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300991 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_max_tis[0x5];
995
Saeed Mahameede2816822015-05-28 22:28:40 +0300996 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300998 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001000 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001002 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001004 u8 log_max_tis_per_sq[0x5];
1005
Tariq Toukane1c9c622016-04-11 23:10:21 +03001006 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001007 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001009 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001011 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001014
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001016 u8 log_max_wq_sz[0x5];
1017
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001018 u8 nic_vport_change_event[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_3e1[0xa];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001020 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001022 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001024 u8 log_max_current_uc_list[0x5];
1025
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001027
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001029 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001031 u8 log_uar_page_sz[0x10];
1032
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001034 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001035 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036
Eli Cohena6d51b62017-01-03 23:55:23 +02001037 u8 reserved_at_500[0x20];
1038 u8 num_of_uars_per_page[0x20];
1039 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040
1041 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001042 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001043
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001044 u8 cqe_compression_timeout[0x10];
1045 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001046
Saeed Mahameed74862162016-06-09 15:11:34 +03001047 u8 reserved_at_5e0[0x10];
1048 u8 tag_matching[0x1];
1049 u8 rndv_offload_rc[0x1];
1050 u8 rndv_offload_dc[0x1];
1051 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001052 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001053 u8 log_max_xrq[0x5];
1054
Max Gurtovoy7b135582017-01-02 11:37:38 +02001055 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001056};
1057
Saeed Mahameed81848732015-12-01 18:03:20 +02001058enum mlx5_flow_destination_type {
1059 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1060 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1061 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001062
1063 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001064};
1065
1066struct mlx5_ifc_dest_format_struct_bits {
1067 u8 destination_type[0x8];
1068 u8 destination_id[0x18];
1069
Matan Barakb4ff3a32016-02-09 14:57:42 +02001070 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001071};
1072
Amir Vadai9dc0b282016-05-13 12:55:39 +00001073struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001074 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001075
1076 u8 reserved_at_20[0x20];
1077};
1078
1079union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1080 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1081 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1082 u8 reserved_at_0[0x40];
1083};
1084
Saeed Mahameede2816822015-05-28 22:28:40 +03001085struct mlx5_ifc_fte_match_param_bits {
1086 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1087
1088 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1089
1090 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1091
Matan Barakb4ff3a32016-02-09 14:57:42 +02001092 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001093};
1094
1095enum {
1096 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1097 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1098 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1099 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1100 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1101};
1102
1103struct mlx5_ifc_rx_hash_field_select_bits {
1104 u8 l3_prot_type[0x1];
1105 u8 l4_prot_type[0x1];
1106 u8 selected_fields[0x1e];
1107};
1108
1109enum {
1110 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1111 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1112};
1113
1114enum {
1115 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1116 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1117};
1118
1119struct mlx5_ifc_wq_bits {
1120 u8 wq_type[0x4];
1121 u8 wq_signature[0x1];
1122 u8 end_padding_mode[0x2];
1123 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001124 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001125
1126 u8 hds_skip_first_sge[0x1];
1127 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001128 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001129 u8 page_offset[0x5];
1130 u8 lwm[0x10];
1131
Matan Barakb4ff3a32016-02-09 14:57:42 +02001132 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001133 u8 pd[0x18];
1134
Matan Barakb4ff3a32016-02-09 14:57:42 +02001135 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001136 u8 uar_page[0x18];
1137
1138 u8 dbr_addr[0x40];
1139
1140 u8 hw_counter[0x20];
1141
1142 u8 sw_counter[0x20];
1143
Matan Barakb4ff3a32016-02-09 14:57:42 +02001144 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001145 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001146 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001147 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001148 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001149 u8 log_wq_sz[0x5];
1150
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001151 u8 reserved_at_120[0x15];
1152 u8 log_wqe_num_of_strides[0x3];
1153 u8 two_byte_shift_en[0x1];
1154 u8 reserved_at_139[0x4];
1155 u8 log_wqe_stride_size[0x3];
1156
1157 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001158
1159 struct mlx5_ifc_cmd_pas_bits pas[0];
1160};
1161
1162struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001163 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001164 u8 rq_num[0x18];
1165};
1166
1167struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001168 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001169 u8 mac_addr_47_32[0x10];
1170
1171 u8 mac_addr_31_0[0x20];
1172};
1173
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001174struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001175 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001176 u8 vlan[0x0c];
1177
Matan Barakb4ff3a32016-02-09 14:57:42 +02001178 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001179};
1180
Saeed Mahameede2816822015-05-28 22:28:40 +03001181struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001182 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001183
1184 u8 min_time_between_cnps[0x20];
1185
Matan Barakb4ff3a32016-02-09 14:57:42 +02001186 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001187 u8 cnp_dscp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001188 u8 reserved_at_d8[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001189 u8 cnp_802p_prio[0x3];
1190
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192};
1193
1194struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196
Matan Barakb4ff3a32016-02-09 14:57:42 +02001197 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001198 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001199 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001200 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202
Matan Barakb4ff3a32016-02-09 14:57:42 +02001203 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001204
1205 u8 rpg_time_reset[0x20];
1206
1207 u8 rpg_byte_reset[0x20];
1208
1209 u8 rpg_threshold[0x20];
1210
1211 u8 rpg_max_rate[0x20];
1212
1213 u8 rpg_ai_rate[0x20];
1214
1215 u8 rpg_hai_rate[0x20];
1216
1217 u8 rpg_gd[0x20];
1218
1219 u8 rpg_min_dec_fac[0x20];
1220
1221 u8 rpg_min_rate[0x20];
1222
Matan Barakb4ff3a32016-02-09 14:57:42 +02001223 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001224
1225 u8 rate_to_set_on_first_cnp[0x20];
1226
1227 u8 dce_tcp_g[0x20];
1228
1229 u8 dce_tcp_rtt[0x20];
1230
1231 u8 rate_reduce_monitor_period[0x20];
1232
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001234
1235 u8 initial_alpha_value[0x20];
1236
Matan Barakb4ff3a32016-02-09 14:57:42 +02001237 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001238};
1239
1240struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001241 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001242
1243 u8 rppp_max_rps[0x20];
1244
1245 u8 rpg_time_reset[0x20];
1246
1247 u8 rpg_byte_reset[0x20];
1248
1249 u8 rpg_threshold[0x20];
1250
1251 u8 rpg_max_rate[0x20];
1252
1253 u8 rpg_ai_rate[0x20];
1254
1255 u8 rpg_hai_rate[0x20];
1256
1257 u8 rpg_gd[0x20];
1258
1259 u8 rpg_min_dec_fac[0x20];
1260
1261 u8 rpg_min_rate[0x20];
1262
Matan Barakb4ff3a32016-02-09 14:57:42 +02001263 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001264};
1265
1266enum {
1267 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1268 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1269 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1270};
1271
1272struct mlx5_ifc_resize_field_select_bits {
1273 u8 resize_field_select[0x20];
1274};
1275
1276enum {
1277 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1278 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1279 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1280 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1281};
1282
1283struct mlx5_ifc_modify_field_select_bits {
1284 u8 modify_field_select[0x20];
1285};
1286
1287struct mlx5_ifc_field_select_r_roce_np_bits {
1288 u8 field_select_r_roce_np[0x20];
1289};
1290
1291struct mlx5_ifc_field_select_r_roce_rp_bits {
1292 u8 field_select_r_roce_rp[0x20];
1293};
1294
1295enum {
1296 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1297 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1298 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1299 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1300 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1301 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1302 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1303 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1304 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1305 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1306};
1307
1308struct mlx5_ifc_field_select_802_1qau_rp_bits {
1309 u8 field_select_8021qaurp[0x20];
1310};
1311
1312struct mlx5_ifc_phys_layer_cntrs_bits {
1313 u8 time_since_last_clear_high[0x20];
1314
1315 u8 time_since_last_clear_low[0x20];
1316
1317 u8 symbol_errors_high[0x20];
1318
1319 u8 symbol_errors_low[0x20];
1320
1321 u8 sync_headers_errors_high[0x20];
1322
1323 u8 sync_headers_errors_low[0x20];
1324
1325 u8 edpl_bip_errors_lane0_high[0x20];
1326
1327 u8 edpl_bip_errors_lane0_low[0x20];
1328
1329 u8 edpl_bip_errors_lane1_high[0x20];
1330
1331 u8 edpl_bip_errors_lane1_low[0x20];
1332
1333 u8 edpl_bip_errors_lane2_high[0x20];
1334
1335 u8 edpl_bip_errors_lane2_low[0x20];
1336
1337 u8 edpl_bip_errors_lane3_high[0x20];
1338
1339 u8 edpl_bip_errors_lane3_low[0x20];
1340
1341 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1342
1343 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1344
1345 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1346
1347 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1348
1349 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1350
1351 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1352
1353 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1354
1355 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1356
1357 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1358
1359 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1360
1361 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1362
1363 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1364
1365 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1366
1367 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1368
1369 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1370
1371 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1372
1373 u8 rs_fec_corrected_blocks_high[0x20];
1374
1375 u8 rs_fec_corrected_blocks_low[0x20];
1376
1377 u8 rs_fec_uncorrectable_blocks_high[0x20];
1378
1379 u8 rs_fec_uncorrectable_blocks_low[0x20];
1380
1381 u8 rs_fec_no_errors_blocks_high[0x20];
1382
1383 u8 rs_fec_no_errors_blocks_low[0x20];
1384
1385 u8 rs_fec_single_error_blocks_high[0x20];
1386
1387 u8 rs_fec_single_error_blocks_low[0x20];
1388
1389 u8 rs_fec_corrected_symbols_total_high[0x20];
1390
1391 u8 rs_fec_corrected_symbols_total_low[0x20];
1392
1393 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1394
1395 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1396
1397 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1398
1399 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1400
1401 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1402
1403 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1404
1405 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1406
1407 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1408
1409 u8 link_down_events[0x20];
1410
1411 u8 successful_recovery_events[0x20];
1412
Matan Barakb4ff3a32016-02-09 14:57:42 +02001413 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001414};
1415
Gal Pressmand8dc0502016-09-27 17:04:51 +03001416struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1417 u8 time_since_last_clear_high[0x20];
1418
1419 u8 time_since_last_clear_low[0x20];
1420
1421 u8 phy_received_bits_high[0x20];
1422
1423 u8 phy_received_bits_low[0x20];
1424
1425 u8 phy_symbol_errors_high[0x20];
1426
1427 u8 phy_symbol_errors_low[0x20];
1428
1429 u8 phy_corrected_bits_high[0x20];
1430
1431 u8 phy_corrected_bits_low[0x20];
1432
1433 u8 phy_corrected_bits_lane0_high[0x20];
1434
1435 u8 phy_corrected_bits_lane0_low[0x20];
1436
1437 u8 phy_corrected_bits_lane1_high[0x20];
1438
1439 u8 phy_corrected_bits_lane1_low[0x20];
1440
1441 u8 phy_corrected_bits_lane2_high[0x20];
1442
1443 u8 phy_corrected_bits_lane2_low[0x20];
1444
1445 u8 phy_corrected_bits_lane3_high[0x20];
1446
1447 u8 phy_corrected_bits_lane3_low[0x20];
1448
1449 u8 reserved_at_200[0x5c0];
1450};
1451
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001452struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1453 u8 symbol_error_counter[0x10];
1454
1455 u8 link_error_recovery_counter[0x8];
1456
1457 u8 link_downed_counter[0x8];
1458
1459 u8 port_rcv_errors[0x10];
1460
1461 u8 port_rcv_remote_physical_errors[0x10];
1462
1463 u8 port_rcv_switch_relay_errors[0x10];
1464
1465 u8 port_xmit_discards[0x10];
1466
1467 u8 port_xmit_constraint_errors[0x8];
1468
1469 u8 port_rcv_constraint_errors[0x8];
1470
1471 u8 reserved_at_70[0x8];
1472
1473 u8 link_overrun_errors[0x8];
1474
1475 u8 reserved_at_80[0x10];
1476
1477 u8 vl_15_dropped[0x10];
1478
Tim Wright133bea02017-05-01 17:30:08 +01001479 u8 reserved_at_a0[0x80];
1480
1481 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001482};
1483
Saeed Mahameede2816822015-05-28 22:28:40 +03001484struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1485 u8 transmit_queue_high[0x20];
1486
1487 u8 transmit_queue_low[0x20];
1488
Matan Barakb4ff3a32016-02-09 14:57:42 +02001489 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001490};
1491
1492struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1493 u8 rx_octets_high[0x20];
1494
1495 u8 rx_octets_low[0x20];
1496
Matan Barakb4ff3a32016-02-09 14:57:42 +02001497 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001498
1499 u8 rx_frames_high[0x20];
1500
1501 u8 rx_frames_low[0x20];
1502
1503 u8 tx_octets_high[0x20];
1504
1505 u8 tx_octets_low[0x20];
1506
Matan Barakb4ff3a32016-02-09 14:57:42 +02001507 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001508
1509 u8 tx_frames_high[0x20];
1510
1511 u8 tx_frames_low[0x20];
1512
1513 u8 rx_pause_high[0x20];
1514
1515 u8 rx_pause_low[0x20];
1516
1517 u8 rx_pause_duration_high[0x20];
1518
1519 u8 rx_pause_duration_low[0x20];
1520
1521 u8 tx_pause_high[0x20];
1522
1523 u8 tx_pause_low[0x20];
1524
1525 u8 tx_pause_duration_high[0x20];
1526
1527 u8 tx_pause_duration_low[0x20];
1528
1529 u8 rx_pause_transition_high[0x20];
1530
1531 u8 rx_pause_transition_low[0x20];
1532
Matan Barakb4ff3a32016-02-09 14:57:42 +02001533 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001534};
1535
1536struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1537 u8 port_transmit_wait_high[0x20];
1538
1539 u8 port_transmit_wait_low[0x20];
1540
Matan Barakb4ff3a32016-02-09 14:57:42 +02001541 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001542};
1543
1544struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1545 u8 dot3stats_alignment_errors_high[0x20];
1546
1547 u8 dot3stats_alignment_errors_low[0x20];
1548
1549 u8 dot3stats_fcs_errors_high[0x20];
1550
1551 u8 dot3stats_fcs_errors_low[0x20];
1552
1553 u8 dot3stats_single_collision_frames_high[0x20];
1554
1555 u8 dot3stats_single_collision_frames_low[0x20];
1556
1557 u8 dot3stats_multiple_collision_frames_high[0x20];
1558
1559 u8 dot3stats_multiple_collision_frames_low[0x20];
1560
1561 u8 dot3stats_sqe_test_errors_high[0x20];
1562
1563 u8 dot3stats_sqe_test_errors_low[0x20];
1564
1565 u8 dot3stats_deferred_transmissions_high[0x20];
1566
1567 u8 dot3stats_deferred_transmissions_low[0x20];
1568
1569 u8 dot3stats_late_collisions_high[0x20];
1570
1571 u8 dot3stats_late_collisions_low[0x20];
1572
1573 u8 dot3stats_excessive_collisions_high[0x20];
1574
1575 u8 dot3stats_excessive_collisions_low[0x20];
1576
1577 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1578
1579 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1580
1581 u8 dot3stats_carrier_sense_errors_high[0x20];
1582
1583 u8 dot3stats_carrier_sense_errors_low[0x20];
1584
1585 u8 dot3stats_frame_too_longs_high[0x20];
1586
1587 u8 dot3stats_frame_too_longs_low[0x20];
1588
1589 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1590
1591 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1592
1593 u8 dot3stats_symbol_errors_high[0x20];
1594
1595 u8 dot3stats_symbol_errors_low[0x20];
1596
1597 u8 dot3control_in_unknown_opcodes_high[0x20];
1598
1599 u8 dot3control_in_unknown_opcodes_low[0x20];
1600
1601 u8 dot3in_pause_frames_high[0x20];
1602
1603 u8 dot3in_pause_frames_low[0x20];
1604
1605 u8 dot3out_pause_frames_high[0x20];
1606
1607 u8 dot3out_pause_frames_low[0x20];
1608
Matan Barakb4ff3a32016-02-09 14:57:42 +02001609 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001610};
1611
1612struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1613 u8 ether_stats_drop_events_high[0x20];
1614
1615 u8 ether_stats_drop_events_low[0x20];
1616
1617 u8 ether_stats_octets_high[0x20];
1618
1619 u8 ether_stats_octets_low[0x20];
1620
1621 u8 ether_stats_pkts_high[0x20];
1622
1623 u8 ether_stats_pkts_low[0x20];
1624
1625 u8 ether_stats_broadcast_pkts_high[0x20];
1626
1627 u8 ether_stats_broadcast_pkts_low[0x20];
1628
1629 u8 ether_stats_multicast_pkts_high[0x20];
1630
1631 u8 ether_stats_multicast_pkts_low[0x20];
1632
1633 u8 ether_stats_crc_align_errors_high[0x20];
1634
1635 u8 ether_stats_crc_align_errors_low[0x20];
1636
1637 u8 ether_stats_undersize_pkts_high[0x20];
1638
1639 u8 ether_stats_undersize_pkts_low[0x20];
1640
1641 u8 ether_stats_oversize_pkts_high[0x20];
1642
1643 u8 ether_stats_oversize_pkts_low[0x20];
1644
1645 u8 ether_stats_fragments_high[0x20];
1646
1647 u8 ether_stats_fragments_low[0x20];
1648
1649 u8 ether_stats_jabbers_high[0x20];
1650
1651 u8 ether_stats_jabbers_low[0x20];
1652
1653 u8 ether_stats_collisions_high[0x20];
1654
1655 u8 ether_stats_collisions_low[0x20];
1656
1657 u8 ether_stats_pkts64octets_high[0x20];
1658
1659 u8 ether_stats_pkts64octets_low[0x20];
1660
1661 u8 ether_stats_pkts65to127octets_high[0x20];
1662
1663 u8 ether_stats_pkts65to127octets_low[0x20];
1664
1665 u8 ether_stats_pkts128to255octets_high[0x20];
1666
1667 u8 ether_stats_pkts128to255octets_low[0x20];
1668
1669 u8 ether_stats_pkts256to511octets_high[0x20];
1670
1671 u8 ether_stats_pkts256to511octets_low[0x20];
1672
1673 u8 ether_stats_pkts512to1023octets_high[0x20];
1674
1675 u8 ether_stats_pkts512to1023octets_low[0x20];
1676
1677 u8 ether_stats_pkts1024to1518octets_high[0x20];
1678
1679 u8 ether_stats_pkts1024to1518octets_low[0x20];
1680
1681 u8 ether_stats_pkts1519to2047octets_high[0x20];
1682
1683 u8 ether_stats_pkts1519to2047octets_low[0x20];
1684
1685 u8 ether_stats_pkts2048to4095octets_high[0x20];
1686
1687 u8 ether_stats_pkts2048to4095octets_low[0x20];
1688
1689 u8 ether_stats_pkts4096to8191octets_high[0x20];
1690
1691 u8 ether_stats_pkts4096to8191octets_low[0x20];
1692
1693 u8 ether_stats_pkts8192to10239octets_high[0x20];
1694
1695 u8 ether_stats_pkts8192to10239octets_low[0x20];
1696
Matan Barakb4ff3a32016-02-09 14:57:42 +02001697 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001698};
1699
1700struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1701 u8 if_in_octets_high[0x20];
1702
1703 u8 if_in_octets_low[0x20];
1704
1705 u8 if_in_ucast_pkts_high[0x20];
1706
1707 u8 if_in_ucast_pkts_low[0x20];
1708
1709 u8 if_in_discards_high[0x20];
1710
1711 u8 if_in_discards_low[0x20];
1712
1713 u8 if_in_errors_high[0x20];
1714
1715 u8 if_in_errors_low[0x20];
1716
1717 u8 if_in_unknown_protos_high[0x20];
1718
1719 u8 if_in_unknown_protos_low[0x20];
1720
1721 u8 if_out_octets_high[0x20];
1722
1723 u8 if_out_octets_low[0x20];
1724
1725 u8 if_out_ucast_pkts_high[0x20];
1726
1727 u8 if_out_ucast_pkts_low[0x20];
1728
1729 u8 if_out_discards_high[0x20];
1730
1731 u8 if_out_discards_low[0x20];
1732
1733 u8 if_out_errors_high[0x20];
1734
1735 u8 if_out_errors_low[0x20];
1736
1737 u8 if_in_multicast_pkts_high[0x20];
1738
1739 u8 if_in_multicast_pkts_low[0x20];
1740
1741 u8 if_in_broadcast_pkts_high[0x20];
1742
1743 u8 if_in_broadcast_pkts_low[0x20];
1744
1745 u8 if_out_multicast_pkts_high[0x20];
1746
1747 u8 if_out_multicast_pkts_low[0x20];
1748
1749 u8 if_out_broadcast_pkts_high[0x20];
1750
1751 u8 if_out_broadcast_pkts_low[0x20];
1752
Matan Barakb4ff3a32016-02-09 14:57:42 +02001753 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001754};
1755
1756struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1757 u8 a_frames_transmitted_ok_high[0x20];
1758
1759 u8 a_frames_transmitted_ok_low[0x20];
1760
1761 u8 a_frames_received_ok_high[0x20];
1762
1763 u8 a_frames_received_ok_low[0x20];
1764
1765 u8 a_frame_check_sequence_errors_high[0x20];
1766
1767 u8 a_frame_check_sequence_errors_low[0x20];
1768
1769 u8 a_alignment_errors_high[0x20];
1770
1771 u8 a_alignment_errors_low[0x20];
1772
1773 u8 a_octets_transmitted_ok_high[0x20];
1774
1775 u8 a_octets_transmitted_ok_low[0x20];
1776
1777 u8 a_octets_received_ok_high[0x20];
1778
1779 u8 a_octets_received_ok_low[0x20];
1780
1781 u8 a_multicast_frames_xmitted_ok_high[0x20];
1782
1783 u8 a_multicast_frames_xmitted_ok_low[0x20];
1784
1785 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1786
1787 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1788
1789 u8 a_multicast_frames_received_ok_high[0x20];
1790
1791 u8 a_multicast_frames_received_ok_low[0x20];
1792
1793 u8 a_broadcast_frames_received_ok_high[0x20];
1794
1795 u8 a_broadcast_frames_received_ok_low[0x20];
1796
1797 u8 a_in_range_length_errors_high[0x20];
1798
1799 u8 a_in_range_length_errors_low[0x20];
1800
1801 u8 a_out_of_range_length_field_high[0x20];
1802
1803 u8 a_out_of_range_length_field_low[0x20];
1804
1805 u8 a_frame_too_long_errors_high[0x20];
1806
1807 u8 a_frame_too_long_errors_low[0x20];
1808
1809 u8 a_symbol_error_during_carrier_high[0x20];
1810
1811 u8 a_symbol_error_during_carrier_low[0x20];
1812
1813 u8 a_mac_control_frames_transmitted_high[0x20];
1814
1815 u8 a_mac_control_frames_transmitted_low[0x20];
1816
1817 u8 a_mac_control_frames_received_high[0x20];
1818
1819 u8 a_mac_control_frames_received_low[0x20];
1820
1821 u8 a_unsupported_opcodes_received_high[0x20];
1822
1823 u8 a_unsupported_opcodes_received_low[0x20];
1824
1825 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1826
1827 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1828
1829 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1830
1831 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1832
Matan Barakb4ff3a32016-02-09 14:57:42 +02001833 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001834};
1835
Gal Pressman8ed1a632016-11-17 13:46:01 +02001836struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1837 u8 life_time_counter_high[0x20];
1838
1839 u8 life_time_counter_low[0x20];
1840
1841 u8 rx_errors[0x20];
1842
1843 u8 tx_errors[0x20];
1844
1845 u8 l0_to_recovery_eieos[0x20];
1846
1847 u8 l0_to_recovery_ts[0x20];
1848
1849 u8 l0_to_recovery_framing[0x20];
1850
1851 u8 l0_to_recovery_retrain[0x20];
1852
1853 u8 crc_error_dllp[0x20];
1854
1855 u8 crc_error_tlp[0x20];
1856
1857 u8 reserved_at_140[0x680];
1858};
1859
Saeed Mahameede2816822015-05-28 22:28:40 +03001860struct mlx5_ifc_cmd_inter_comp_event_bits {
1861 u8 command_completion_vector[0x20];
1862
Matan Barakb4ff3a32016-02-09 14:57:42 +02001863 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001864};
1865
1866struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001867 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001868 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001869 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001870 u8 vl[0x4];
1871
Matan Barakb4ff3a32016-02-09 14:57:42 +02001872 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001873};
1874
1875struct mlx5_ifc_db_bf_congestion_event_bits {
1876 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001877 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001878 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001879 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001880
Matan Barakb4ff3a32016-02-09 14:57:42 +02001881 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001882};
1883
1884struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001885 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001886
1887 u8 gpio_event_hi[0x20];
1888
1889 u8 gpio_event_lo[0x20];
1890
Matan Barakb4ff3a32016-02-09 14:57:42 +02001891 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001892};
1893
1894struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001895 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001896
1897 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001898 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001899
Matan Barakb4ff3a32016-02-09 14:57:42 +02001900 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001901};
1902
1903struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001904 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001905};
1906
1907enum {
1908 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1909 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1910};
1911
1912struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001913 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001914 u8 cqn[0x18];
1915
Matan Barakb4ff3a32016-02-09 14:57:42 +02001916 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001917
Matan Barakb4ff3a32016-02-09 14:57:42 +02001918 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001919 u8 syndrome[0x8];
1920
Matan Barakb4ff3a32016-02-09 14:57:42 +02001921 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001922};
1923
1924struct mlx5_ifc_rdma_page_fault_event_bits {
1925 u8 bytes_committed[0x20];
1926
1927 u8 r_key[0x20];
1928
Matan Barakb4ff3a32016-02-09 14:57:42 +02001929 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001930 u8 packet_len[0x10];
1931
1932 u8 rdma_op_len[0x20];
1933
1934 u8 rdma_va[0x40];
1935
Matan Barakb4ff3a32016-02-09 14:57:42 +02001936 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001937 u8 rdma[0x1];
1938 u8 write[0x1];
1939 u8 requestor[0x1];
1940 u8 qp_number[0x18];
1941};
1942
1943struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1944 u8 bytes_committed[0x20];
1945
Matan Barakb4ff3a32016-02-09 14:57:42 +02001946 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001947 u8 wqe_index[0x10];
1948
Matan Barakb4ff3a32016-02-09 14:57:42 +02001949 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001950 u8 len[0x10];
1951
Matan Barakb4ff3a32016-02-09 14:57:42 +02001952 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001953
Matan Barakb4ff3a32016-02-09 14:57:42 +02001954 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001955 u8 rdma[0x1];
1956 u8 write_read[0x1];
1957 u8 requestor[0x1];
1958 u8 qpn[0x18];
1959};
1960
1961struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001962 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001963
1964 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001965 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001966
Matan Barakb4ff3a32016-02-09 14:57:42 +02001967 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001968 u8 qpn_rqn_sqn[0x18];
1969};
1970
1971struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001972 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001973
Matan Barakb4ff3a32016-02-09 14:57:42 +02001974 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001975 u8 dct_number[0x18];
1976};
1977
1978struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001979 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001980
Matan Barakb4ff3a32016-02-09 14:57:42 +02001981 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001982 u8 cq_number[0x18];
1983};
1984
1985enum {
1986 MLX5_QPC_STATE_RST = 0x0,
1987 MLX5_QPC_STATE_INIT = 0x1,
1988 MLX5_QPC_STATE_RTR = 0x2,
1989 MLX5_QPC_STATE_RTS = 0x3,
1990 MLX5_QPC_STATE_SQER = 0x4,
1991 MLX5_QPC_STATE_ERR = 0x6,
1992 MLX5_QPC_STATE_SQD = 0x7,
1993 MLX5_QPC_STATE_SUSPENDED = 0x9,
1994};
1995
1996enum {
1997 MLX5_QPC_ST_RC = 0x0,
1998 MLX5_QPC_ST_UC = 0x1,
1999 MLX5_QPC_ST_UD = 0x2,
2000 MLX5_QPC_ST_XRC = 0x3,
2001 MLX5_QPC_ST_DCI = 0x5,
2002 MLX5_QPC_ST_QP0 = 0x7,
2003 MLX5_QPC_ST_QP1 = 0x8,
2004 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2005 MLX5_QPC_ST_REG_UMR = 0xc,
2006};
2007
2008enum {
2009 MLX5_QPC_PM_STATE_ARMED = 0x0,
2010 MLX5_QPC_PM_STATE_REARM = 0x1,
2011 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2012 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2013};
2014
2015enum {
2016 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2017 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2018};
2019
2020enum {
2021 MLX5_QPC_MTU_256_BYTES = 0x1,
2022 MLX5_QPC_MTU_512_BYTES = 0x2,
2023 MLX5_QPC_MTU_1K_BYTES = 0x3,
2024 MLX5_QPC_MTU_2K_BYTES = 0x4,
2025 MLX5_QPC_MTU_4K_BYTES = 0x5,
2026 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2027};
2028
2029enum {
2030 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2031 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2032 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2033 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2034 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2035 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2036 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2037 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2038};
2039
2040enum {
2041 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2042 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2043 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2044};
2045
2046enum {
2047 MLX5_QPC_CS_RES_DISABLE = 0x0,
2048 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2049 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2050};
2051
2052struct mlx5_ifc_qpc_bits {
2053 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002054 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002055 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002056 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002057 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002058 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002059 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002060 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002061
2062 u8 wq_signature[0x1];
2063 u8 block_lb_mc[0x1];
2064 u8 atomic_like_write_en[0x1];
2065 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002066 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002067 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002068 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002069 u8 pd[0x18];
2070
2071 u8 mtu[0x3];
2072 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002073 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002074 u8 log_rq_size[0x4];
2075 u8 log_rq_stride[0x3];
2076 u8 no_sq[0x1];
2077 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002078 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002079 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002080 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002081
2082 u8 counter_set_id[0x8];
2083 u8 uar_page[0x18];
2084
Matan Barakb4ff3a32016-02-09 14:57:42 +02002085 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002086 u8 user_index[0x18];
2087
Matan Barakb4ff3a32016-02-09 14:57:42 +02002088 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002089 u8 log_page_size[0x5];
2090 u8 remote_qpn[0x18];
2091
2092 struct mlx5_ifc_ads_bits primary_address_path;
2093
2094 struct mlx5_ifc_ads_bits secondary_address_path;
2095
2096 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002097 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002098 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002099 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002100 u8 retry_count[0x3];
2101 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002102 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002103 u8 fre[0x1];
2104 u8 cur_rnr_retry[0x3];
2105 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002106 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002107
Matan Barakb4ff3a32016-02-09 14:57:42 +02002108 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002109
Matan Barakb4ff3a32016-02-09 14:57:42 +02002110 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002111 u8 next_send_psn[0x18];
2112
Matan Barakb4ff3a32016-02-09 14:57:42 +02002113 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002114 u8 cqn_snd[0x18];
2115
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002116 u8 reserved_at_400[0x8];
2117 u8 deth_sqpn[0x18];
2118
2119 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002120
Matan Barakb4ff3a32016-02-09 14:57:42 +02002121 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122 u8 last_acked_psn[0x18];
2123
Matan Barakb4ff3a32016-02-09 14:57:42 +02002124 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002125 u8 ssn[0x18];
2126
Matan Barakb4ff3a32016-02-09 14:57:42 +02002127 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002128 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002129 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002130 u8 atomic_mode[0x4];
2131 u8 rre[0x1];
2132 u8 rwe[0x1];
2133 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002134 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002135 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002136 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002137 u8 cd_slave_receive[0x1];
2138 u8 cd_slave_send[0x1];
2139 u8 cd_master[0x1];
2140
Matan Barakb4ff3a32016-02-09 14:57:42 +02002141 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002142 u8 min_rnr_nak[0x5];
2143 u8 next_rcv_psn[0x18];
2144
Matan Barakb4ff3a32016-02-09 14:57:42 +02002145 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002146 u8 xrcd[0x18];
2147
Matan Barakb4ff3a32016-02-09 14:57:42 +02002148 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002149 u8 cqn_rcv[0x18];
2150
2151 u8 dbr_addr[0x40];
2152
2153 u8 q_key[0x20];
2154
Matan Barakb4ff3a32016-02-09 14:57:42 +02002155 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002156 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002157 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002158
Matan Barakb4ff3a32016-02-09 14:57:42 +02002159 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002160 u8 rmsn[0x18];
2161
2162 u8 hw_sq_wqebb_counter[0x10];
2163 u8 sw_sq_wqebb_counter[0x10];
2164
2165 u8 hw_rq_counter[0x20];
2166
2167 u8 sw_rq_counter[0x20];
2168
Matan Barakb4ff3a32016-02-09 14:57:42 +02002169 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002170
Matan Barakb4ff3a32016-02-09 14:57:42 +02002171 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002172 u8 cgs[0x1];
2173 u8 cs_req[0x8];
2174 u8 cs_res[0x8];
2175
2176 u8 dc_access_key[0x40];
2177
Matan Barakb4ff3a32016-02-09 14:57:42 +02002178 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002179};
2180
2181struct mlx5_ifc_roce_addr_layout_bits {
2182 u8 source_l3_address[16][0x8];
2183
Matan Barakb4ff3a32016-02-09 14:57:42 +02002184 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185 u8 vlan_valid[0x1];
2186 u8 vlan_id[0xc];
2187 u8 source_mac_47_32[0x10];
2188
2189 u8 source_mac_31_0[0x20];
2190
Matan Barakb4ff3a32016-02-09 14:57:42 +02002191 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002192 u8 roce_l3_type[0x4];
2193 u8 roce_version[0x8];
2194
Matan Barakb4ff3a32016-02-09 14:57:42 +02002195 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002196};
2197
2198union mlx5_ifc_hca_cap_union_bits {
2199 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2200 struct mlx5_ifc_odp_cap_bits odp_cap;
2201 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2202 struct mlx5_ifc_roce_cap_bits roce_cap;
2203 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2204 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002205 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002206 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002207 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002208 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002209 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002210 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002211};
2212
2213enum {
2214 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2215 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2216 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002217 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002218 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2219 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002220 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002221};
2222
2223struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002224 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002225
2226 u8 group_id[0x20];
2227
Matan Barakb4ff3a32016-02-09 14:57:42 +02002228 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002229 u8 flow_tag[0x18];
2230
Matan Barakb4ff3a32016-02-09 14:57:42 +02002231 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002232 u8 action[0x10];
2233
Matan Barakb4ff3a32016-02-09 14:57:42 +02002234 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002235 u8 destination_list_size[0x18];
2236
Amir Vadai9dc0b282016-05-13 12:55:39 +00002237 u8 reserved_at_a0[0x8];
2238 u8 flow_counter_list_size[0x18];
2239
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002240 u8 encap_id[0x20];
2241
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002242 u8 modify_header_id[0x20];
2243
2244 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002245
2246 struct mlx5_ifc_fte_match_param_bits match_value;
2247
Matan Barakb4ff3a32016-02-09 14:57:42 +02002248 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002249
Amir Vadai9dc0b282016-05-13 12:55:39 +00002250 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002251};
2252
2253enum {
2254 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2255 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2256};
2257
2258struct mlx5_ifc_xrc_srqc_bits {
2259 u8 state[0x4];
2260 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002261 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002262
2263 u8 wq_signature[0x1];
2264 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002265 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266 u8 rlky[0x1];
2267 u8 basic_cyclic_rcv_wqe[0x1];
2268 u8 log_rq_stride[0x3];
2269 u8 xrcd[0x18];
2270
2271 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002272 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002273 u8 cqn[0x18];
2274
Matan Barakb4ff3a32016-02-09 14:57:42 +02002275 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002276
2277 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002278 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002279 u8 log_page_size[0x6];
2280 u8 user_index[0x18];
2281
Matan Barakb4ff3a32016-02-09 14:57:42 +02002282 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002283
Matan Barakb4ff3a32016-02-09 14:57:42 +02002284 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002285 u8 pd[0x18];
2286
2287 u8 lwm[0x10];
2288 u8 wqe_cnt[0x10];
2289
Matan Barakb4ff3a32016-02-09 14:57:42 +02002290 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002291
2292 u8 db_record_addr_h[0x20];
2293
2294 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002295 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002296
Matan Barakb4ff3a32016-02-09 14:57:42 +02002297 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002298};
2299
2300struct mlx5_ifc_traffic_counter_bits {
2301 u8 packets[0x40];
2302
2303 u8 octets[0x40];
2304};
2305
2306struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002307 u8 strict_lag_tx_port_affinity[0x1];
2308 u8 reserved_at_1[0x3];
2309 u8 lag_tx_port_affinity[0x04];
2310
2311 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002312 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002313 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002314
Matan Barakb4ff3a32016-02-09 14:57:42 +02002315 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002316
Matan Barakb4ff3a32016-02-09 14:57:42 +02002317 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318 u8 transport_domain[0x18];
2319
Erez Shitrit500a3d02017-04-13 06:36:51 +03002320 u8 reserved_at_140[0x8];
2321 u8 underlay_qpn[0x18];
2322 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002323};
2324
2325enum {
2326 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2327 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2328};
2329
2330enum {
2331 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2332 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2333};
2334
2335enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002336 MLX5_RX_HASH_FN_NONE = 0x0,
2337 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2338 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002339};
2340
2341enum {
2342 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2343 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2344};
2345
2346struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002347 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002348
2349 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002350 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002351
Matan Barakb4ff3a32016-02-09 14:57:42 +02002352 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002353
Matan Barakb4ff3a32016-02-09 14:57:42 +02002354 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355 u8 lro_timeout_period_usecs[0x10];
2356 u8 lro_enable_mask[0x4];
2357 u8 lro_max_ip_payload_size[0x8];
2358
Matan Barakb4ff3a32016-02-09 14:57:42 +02002359 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002360
Matan Barakb4ff3a32016-02-09 14:57:42 +02002361 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002362 u8 inline_rqn[0x18];
2363
2364 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002365 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002366 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002367 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002368 u8 indirect_table[0x18];
2369
2370 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002371 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372 u8 self_lb_block[0x2];
2373 u8 transport_domain[0x18];
2374
2375 u8 rx_hash_toeplitz_key[10][0x20];
2376
2377 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2378
2379 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2380
Matan Barakb4ff3a32016-02-09 14:57:42 +02002381 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002382};
2383
2384enum {
2385 MLX5_SRQC_STATE_GOOD = 0x0,
2386 MLX5_SRQC_STATE_ERROR = 0x1,
2387};
2388
2389struct mlx5_ifc_srqc_bits {
2390 u8 state[0x4];
2391 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002392 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002393
2394 u8 wq_signature[0x1];
2395 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002396 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002397 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002398 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002399 u8 log_rq_stride[0x3];
2400 u8 xrcd[0x18];
2401
2402 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002403 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002404 u8 cqn[0x18];
2405
Matan Barakb4ff3a32016-02-09 14:57:42 +02002406 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002407
Matan Barakb4ff3a32016-02-09 14:57:42 +02002408 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002409 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002410 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002411
Matan Barakb4ff3a32016-02-09 14:57:42 +02002412 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002413
Matan Barakb4ff3a32016-02-09 14:57:42 +02002414 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002415 u8 pd[0x18];
2416
2417 u8 lwm[0x10];
2418 u8 wqe_cnt[0x10];
2419
Matan Barakb4ff3a32016-02-09 14:57:42 +02002420 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002421
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002422 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002423
Matan Barakb4ff3a32016-02-09 14:57:42 +02002424 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002425};
2426
2427enum {
2428 MLX5_SQC_STATE_RST = 0x0,
2429 MLX5_SQC_STATE_RDY = 0x1,
2430 MLX5_SQC_STATE_ERR = 0x3,
2431};
2432
2433struct mlx5_ifc_sqc_bits {
2434 u8 rlky[0x1];
2435 u8 cd_master[0x1];
2436 u8 fre[0x1];
2437 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002438 u8 reserved_at_4[0x1];
2439 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002440 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002441 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002442 u8 allow_swp[0x1];
2443 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002444
Matan Barakb4ff3a32016-02-09 14:57:42 +02002445 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002446 u8 user_index[0x18];
2447
Matan Barakb4ff3a32016-02-09 14:57:42 +02002448 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002449 u8 cqn[0x18];
2450
Saeed Mahameed74862162016-06-09 15:11:34 +03002451 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002452
Saeed Mahameed74862162016-06-09 15:11:34 +03002453 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002455 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002456
Matan Barakb4ff3a32016-02-09 14:57:42 +02002457 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002458
Matan Barakb4ff3a32016-02-09 14:57:42 +02002459 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002460 u8 tis_num_0[0x18];
2461
2462 struct mlx5_ifc_wq_bits wq;
2463};
2464
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002465enum {
2466 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2467 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2468 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2469 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2470};
2471
2472struct mlx5_ifc_scheduling_context_bits {
2473 u8 element_type[0x8];
2474 u8 reserved_at_8[0x18];
2475
2476 u8 element_attributes[0x20];
2477
2478 u8 parent_element_id[0x20];
2479
2480 u8 reserved_at_60[0x40];
2481
2482 u8 bw_share[0x20];
2483
2484 u8 max_average_bw[0x20];
2485
2486 u8 reserved_at_e0[0x120];
2487};
2488
Saeed Mahameede2816822015-05-28 22:28:40 +03002489struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002490 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002491
Matan Barakb4ff3a32016-02-09 14:57:42 +02002492 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002493 u8 rqt_max_size[0x10];
2494
Matan Barakb4ff3a32016-02-09 14:57:42 +02002495 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002496 u8 rqt_actual_size[0x10];
2497
Matan Barakb4ff3a32016-02-09 14:57:42 +02002498 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002499
2500 struct mlx5_ifc_rq_num_bits rq_num[0];
2501};
2502
2503enum {
2504 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2505 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2506};
2507
2508enum {
2509 MLX5_RQC_STATE_RST = 0x0,
2510 MLX5_RQC_STATE_RDY = 0x1,
2511 MLX5_RQC_STATE_ERR = 0x3,
2512};
2513
2514struct mlx5_ifc_rqc_bits {
2515 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002516 u8 reserved_at_1[0x1];
2517 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002518 u8 vsd[0x1];
2519 u8 mem_rq_type[0x4];
2520 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002521 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002522 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002523 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002524
Matan Barakb4ff3a32016-02-09 14:57:42 +02002525 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002526 u8 user_index[0x18];
2527
Matan Barakb4ff3a32016-02-09 14:57:42 +02002528 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002529 u8 cqn[0x18];
2530
2531 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002532 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002533
Matan Barakb4ff3a32016-02-09 14:57:42 +02002534 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002535 u8 rmpn[0x18];
2536
Matan Barakb4ff3a32016-02-09 14:57:42 +02002537 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002538
2539 struct mlx5_ifc_wq_bits wq;
2540};
2541
2542enum {
2543 MLX5_RMPC_STATE_RDY = 0x1,
2544 MLX5_RMPC_STATE_ERR = 0x3,
2545};
2546
2547struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002548 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002549 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002550 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002551
2552 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002553 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002554
Matan Barakb4ff3a32016-02-09 14:57:42 +02002555 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002556
2557 struct mlx5_ifc_wq_bits wq;
2558};
2559
Saeed Mahameede2816822015-05-28 22:28:40 +03002560struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002561 u8 reserved_at_0[0x5];
2562 u8 min_wqe_inline_mode[0x3];
2563 u8 reserved_at_8[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03002564 u8 roce_en[0x1];
2565
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002566 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002567 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002568 u8 event_on_mtu[0x1];
2569 u8 event_on_promisc_change[0x1];
2570 u8 event_on_vlan_change[0x1];
2571 u8 event_on_mc_address_change[0x1];
2572 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002573
Matan Barakb4ff3a32016-02-09 14:57:42 +02002574 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002575
2576 u8 mtu[0x10];
2577
Achiad Shochat9efa7522015-12-23 18:47:20 +02002578 u8 system_image_guid[0x40];
2579 u8 port_guid[0x40];
2580 u8 node_guid[0x40];
2581
Matan Barakb4ff3a32016-02-09 14:57:42 +02002582 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002583 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002584 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002585
2586 u8 promisc_uc[0x1];
2587 u8 promisc_mc[0x1];
2588 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002589 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002590 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002592 u8 allowed_list_size[0xc];
2593
2594 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2595
Matan Barakb4ff3a32016-02-09 14:57:42 +02002596 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002597
2598 u8 current_uc_mac_address[0][0x40];
2599};
2600
2601enum {
2602 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2603 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2604 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002605 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002606};
2607
2608struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002609 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002610 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002611 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002612 u8 small_fence_on_rdma_read_response[0x1];
2613 u8 umr_en[0x1];
2614 u8 a[0x1];
2615 u8 rw[0x1];
2616 u8 rr[0x1];
2617 u8 lw[0x1];
2618 u8 lr[0x1];
2619 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002620 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002621
2622 u8 qpn[0x18];
2623 u8 mkey_7_0[0x8];
2624
Matan Barakb4ff3a32016-02-09 14:57:42 +02002625 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002626
2627 u8 length64[0x1];
2628 u8 bsf_en[0x1];
2629 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002630 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002631 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002632 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002633 u8 en_rinval[0x1];
2634 u8 pd[0x18];
2635
2636 u8 start_addr[0x40];
2637
2638 u8 len[0x40];
2639
2640 u8 bsf_octword_size[0x20];
2641
Matan Barakb4ff3a32016-02-09 14:57:42 +02002642 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002643
2644 u8 translations_octword_size[0x20];
2645
Matan Barakb4ff3a32016-02-09 14:57:42 +02002646 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002647 u8 log_page_size[0x5];
2648
Matan Barakb4ff3a32016-02-09 14:57:42 +02002649 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002650};
2651
2652struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002653 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002654 u8 pkey[0x10];
2655};
2656
2657struct mlx5_ifc_array128_auto_bits {
2658 u8 array128_auto[16][0x8];
2659};
2660
2661struct mlx5_ifc_hca_vport_context_bits {
2662 u8 field_select[0x20];
2663
Matan Barakb4ff3a32016-02-09 14:57:42 +02002664 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002665
2666 u8 sm_virt_aware[0x1];
2667 u8 has_smi[0x1];
2668 u8 has_raw[0x1];
2669 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002670 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002671 u8 port_physical_state[0x4];
2672 u8 vport_state_policy[0x4];
2673 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002674 u8 vport_state[0x4];
2675
Matan Barakb4ff3a32016-02-09 14:57:42 +02002676 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002677
2678 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002679
2680 u8 port_guid[0x40];
2681
2682 u8 node_guid[0x40];
2683
2684 u8 cap_mask1[0x20];
2685
2686 u8 cap_mask1_field_select[0x20];
2687
2688 u8 cap_mask2[0x20];
2689
2690 u8 cap_mask2_field_select[0x20];
2691
Matan Barakb4ff3a32016-02-09 14:57:42 +02002692 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002693
2694 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002695 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002696 u8 init_type_reply[0x4];
2697 u8 lmc[0x3];
2698 u8 subnet_timeout[0x5];
2699
2700 u8 sm_lid[0x10];
2701 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002702 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002703
2704 u8 qkey_violation_counter[0x10];
2705 u8 pkey_violation_counter[0x10];
2706
Matan Barakb4ff3a32016-02-09 14:57:42 +02002707 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002708};
2709
Saeed Mahameedd6666752015-12-01 18:03:22 +02002710struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002711 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002712 u8 vport_svlan_strip[0x1];
2713 u8 vport_cvlan_strip[0x1];
2714 u8 vport_svlan_insert[0x1];
2715 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002716 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002717
Matan Barakb4ff3a32016-02-09 14:57:42 +02002718 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002719
2720 u8 svlan_cfi[0x1];
2721 u8 svlan_pcp[0x3];
2722 u8 svlan_id[0xc];
2723 u8 cvlan_cfi[0x1];
2724 u8 cvlan_pcp[0x3];
2725 u8 cvlan_id[0xc];
2726
Matan Barakb4ff3a32016-02-09 14:57:42 +02002727 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002728};
2729
Saeed Mahameede2816822015-05-28 22:28:40 +03002730enum {
2731 MLX5_EQC_STATUS_OK = 0x0,
2732 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2733};
2734
2735enum {
2736 MLX5_EQC_ST_ARMED = 0x9,
2737 MLX5_EQC_ST_FIRED = 0xa,
2738};
2739
2740struct mlx5_ifc_eqc_bits {
2741 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002742 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002743 u8 ec[0x1];
2744 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002745 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002746 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002747 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002748
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002750
Matan Barakb4ff3a32016-02-09 14:57:42 +02002751 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002752 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002753 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002754
Matan Barakb4ff3a32016-02-09 14:57:42 +02002755 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002756 u8 log_eq_size[0x5];
2757 u8 uar_page[0x18];
2758
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002760
Matan Barakb4ff3a32016-02-09 14:57:42 +02002761 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002762 u8 intr[0x8];
2763
Matan Barakb4ff3a32016-02-09 14:57:42 +02002764 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002765 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002767
Matan Barakb4ff3a32016-02-09 14:57:42 +02002768 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002769
Matan Barakb4ff3a32016-02-09 14:57:42 +02002770 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002771 u8 consumer_counter[0x18];
2772
Matan Barakb4ff3a32016-02-09 14:57:42 +02002773 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002774 u8 producer_counter[0x18];
2775
Matan Barakb4ff3a32016-02-09 14:57:42 +02002776 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002777};
2778
2779enum {
2780 MLX5_DCTC_STATE_ACTIVE = 0x0,
2781 MLX5_DCTC_STATE_DRAINING = 0x1,
2782 MLX5_DCTC_STATE_DRAINED = 0x2,
2783};
2784
2785enum {
2786 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2787 MLX5_DCTC_CS_RES_NA = 0x1,
2788 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2789};
2790
2791enum {
2792 MLX5_DCTC_MTU_256_BYTES = 0x1,
2793 MLX5_DCTC_MTU_512_BYTES = 0x2,
2794 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2795 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2796 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2797};
2798
2799struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002800 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002801 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002802 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002803
Matan Barakb4ff3a32016-02-09 14:57:42 +02002804 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002805 u8 user_index[0x18];
2806
Matan Barakb4ff3a32016-02-09 14:57:42 +02002807 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002808 u8 cqn[0x18];
2809
2810 u8 counter_set_id[0x8];
2811 u8 atomic_mode[0x4];
2812 u8 rre[0x1];
2813 u8 rwe[0x1];
2814 u8 rae[0x1];
2815 u8 atomic_like_write_en[0x1];
2816 u8 latency_sensitive[0x1];
2817 u8 rlky[0x1];
2818 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002819 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002820
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002822 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002823 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002824 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002825 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002826
Matan Barakb4ff3a32016-02-09 14:57:42 +02002827 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002828 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002829
Matan Barakb4ff3a32016-02-09 14:57:42 +02002830 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002831 u8 pd[0x18];
2832
2833 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002834 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002835 u8 flow_label[0x14];
2836
2837 u8 dc_access_key[0x40];
2838
Matan Barakb4ff3a32016-02-09 14:57:42 +02002839 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002840 u8 mtu[0x3];
2841 u8 port[0x8];
2842 u8 pkey_index[0x10];
2843
Matan Barakb4ff3a32016-02-09 14:57:42 +02002844 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002845 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002846 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002847 u8 hop_limit[0x8];
2848
2849 u8 dc_access_key_violation_count[0x20];
2850
Matan Barakb4ff3a32016-02-09 14:57:42 +02002851 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002852 u8 dei_cfi[0x1];
2853 u8 eth_prio[0x3];
2854 u8 ecn[0x2];
2855 u8 dscp[0x6];
2856
Matan Barakb4ff3a32016-02-09 14:57:42 +02002857 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002858};
2859
2860enum {
2861 MLX5_CQC_STATUS_OK = 0x0,
2862 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2863 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2864};
2865
2866enum {
2867 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2868 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2869};
2870
2871enum {
2872 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2873 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2874 MLX5_CQC_ST_FIRED = 0xa,
2875};
2876
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002877enum {
2878 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2879 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002880 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002881};
2882
Saeed Mahameede2816822015-05-28 22:28:40 +03002883struct mlx5_ifc_cqc_bits {
2884 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002885 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002886 u8 cqe_sz[0x3];
2887 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002888 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002889 u8 scqe_break_moderation_en[0x1];
2890 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002891 u8 cq_period_mode[0x2];
2892 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002893 u8 mini_cqe_res_format[0x2];
2894 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002895 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002896
Matan Barakb4ff3a32016-02-09 14:57:42 +02002897 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002898
Matan Barakb4ff3a32016-02-09 14:57:42 +02002899 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002900 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002901 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002902
Matan Barakb4ff3a32016-02-09 14:57:42 +02002903 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002904 u8 log_cq_size[0x5];
2905 u8 uar_page[0x18];
2906
Matan Barakb4ff3a32016-02-09 14:57:42 +02002907 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002908 u8 cq_period[0xc];
2909 u8 cq_max_count[0x10];
2910
Matan Barakb4ff3a32016-02-09 14:57:42 +02002911 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002912 u8 c_eqn[0x8];
2913
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002916 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002917
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919
Matan Barakb4ff3a32016-02-09 14:57:42 +02002920 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002921 u8 last_notified_index[0x18];
2922
Matan Barakb4ff3a32016-02-09 14:57:42 +02002923 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002924 u8 last_solicit_index[0x18];
2925
Matan Barakb4ff3a32016-02-09 14:57:42 +02002926 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002927 u8 consumer_counter[0x18];
2928
Matan Barakb4ff3a32016-02-09 14:57:42 +02002929 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002930 u8 producer_counter[0x18];
2931
Matan Barakb4ff3a32016-02-09 14:57:42 +02002932 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002933
2934 u8 dbr_addr[0x40];
2935};
2936
2937union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2938 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2939 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2940 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002941 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002942};
2943
2944struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002945 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002946
Matan Barakb4ff3a32016-02-09 14:57:42 +02002947 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002948 u8 ieee_vendor_id[0x18];
2949
Matan Barakb4ff3a32016-02-09 14:57:42 +02002950 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002951 u8 vsd_vendor_id[0x10];
2952
2953 u8 vsd[208][0x8];
2954
2955 u8 vsd_contd_psid[16][0x8];
2956};
2957
Saeed Mahameed74862162016-06-09 15:11:34 +03002958enum {
2959 MLX5_XRQC_STATE_GOOD = 0x0,
2960 MLX5_XRQC_STATE_ERROR = 0x1,
2961};
2962
2963enum {
2964 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2965 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2966};
2967
2968enum {
2969 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2970};
2971
2972struct mlx5_ifc_tag_matching_topology_context_bits {
2973 u8 log_matching_list_sz[0x4];
2974 u8 reserved_at_4[0xc];
2975 u8 append_next_index[0x10];
2976
2977 u8 sw_phase_cnt[0x10];
2978 u8 hw_phase_cnt[0x10];
2979
2980 u8 reserved_at_40[0x40];
2981};
2982
2983struct mlx5_ifc_xrqc_bits {
2984 u8 state[0x4];
2985 u8 rlkey[0x1];
2986 u8 reserved_at_5[0xf];
2987 u8 topology[0x4];
2988 u8 reserved_at_18[0x4];
2989 u8 offload[0x4];
2990
2991 u8 reserved_at_20[0x8];
2992 u8 user_index[0x18];
2993
2994 u8 reserved_at_40[0x8];
2995 u8 cqn[0x18];
2996
2997 u8 reserved_at_60[0xa0];
2998
2999 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3000
Artemy Kovalyov5579e152016-08-31 05:17:54 +00003001 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03003002
3003 struct mlx5_ifc_wq_bits wq;
3004};
3005
Saeed Mahameede2816822015-05-28 22:28:40 +03003006union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3007 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3008 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003009 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003010};
3011
3012union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3013 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3014 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3015 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003016 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003017};
3018
3019union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3020 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3021 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3022 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3023 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3024 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3025 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3026 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003027 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003028 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003029 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003030 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003031};
3032
Gal Pressman8ed1a632016-11-17 13:46:01 +02003033union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3034 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3035 u8 reserved_at_0[0x7c0];
3036};
3037
Saeed Mahameede2816822015-05-28 22:28:40 +03003038union mlx5_ifc_event_auto_bits {
3039 struct mlx5_ifc_comp_event_bits comp_event;
3040 struct mlx5_ifc_dct_events_bits dct_events;
3041 struct mlx5_ifc_qp_events_bits qp_events;
3042 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3043 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3044 struct mlx5_ifc_cq_error_bits cq_error;
3045 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3046 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3047 struct mlx5_ifc_gpio_event_bits gpio_event;
3048 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3049 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3050 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003051 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003052};
3053
3054struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003055 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003056
3057 u8 assert_existptr[0x20];
3058
3059 u8 assert_callra[0x20];
3060
Matan Barakb4ff3a32016-02-09 14:57:42 +02003061 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003062
3063 u8 fw_version[0x20];
3064
3065 u8 hw_id[0x20];
3066
Matan Barakb4ff3a32016-02-09 14:57:42 +02003067 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003068
3069 u8 irisc_index[0x8];
3070 u8 synd[0x8];
3071 u8 ext_synd[0x10];
3072};
3073
3074struct mlx5_ifc_register_loopback_control_bits {
3075 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003076 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003077 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003078 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003079
Matan Barakb4ff3a32016-02-09 14:57:42 +02003080 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003081};
3082
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003083struct mlx5_ifc_vport_tc_element_bits {
3084 u8 traffic_class[0x4];
3085 u8 reserved_at_4[0xc];
3086 u8 vport_number[0x10];
3087};
3088
3089struct mlx5_ifc_vport_element_bits {
3090 u8 reserved_at_0[0x10];
3091 u8 vport_number[0x10];
3092};
3093
3094enum {
3095 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3096 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3097 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3098};
3099
3100struct mlx5_ifc_tsar_element_bits {
3101 u8 reserved_at_0[0x8];
3102 u8 tsar_type[0x8];
3103 u8 reserved_at_10[0x10];
3104};
3105
Majd Dibbiny8812c242017-02-09 14:20:12 +02003106enum {
3107 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3108 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3109};
3110
Saeed Mahameede2816822015-05-28 22:28:40 +03003111struct mlx5_ifc_teardown_hca_out_bits {
3112 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003113 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003114
3115 u8 syndrome[0x20];
3116
Majd Dibbiny8812c242017-02-09 14:20:12 +02003117 u8 reserved_at_40[0x3f];
3118
3119 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003120};
3121
3122enum {
3123 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003124 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003125};
3126
3127struct mlx5_ifc_teardown_hca_in_bits {
3128 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003129 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003130
Matan Barakb4ff3a32016-02-09 14:57:42 +02003131 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003132 u8 op_mod[0x10];
3133
Matan Barakb4ff3a32016-02-09 14:57:42 +02003134 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003135 u8 profile[0x10];
3136
Matan Barakb4ff3a32016-02-09 14:57:42 +02003137 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003138};
3139
3140struct mlx5_ifc_sqerr2rts_qp_out_bits {
3141 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003142 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003143
3144 u8 syndrome[0x20];
3145
Matan Barakb4ff3a32016-02-09 14:57:42 +02003146 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003147};
3148
3149struct mlx5_ifc_sqerr2rts_qp_in_bits {
3150 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003151 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003152
Matan Barakb4ff3a32016-02-09 14:57:42 +02003153 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003154 u8 op_mod[0x10];
3155
Matan Barakb4ff3a32016-02-09 14:57:42 +02003156 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003157 u8 qpn[0x18];
3158
Matan Barakb4ff3a32016-02-09 14:57:42 +02003159 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003160
3161 u8 opt_param_mask[0x20];
3162
Matan Barakb4ff3a32016-02-09 14:57:42 +02003163 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003164
3165 struct mlx5_ifc_qpc_bits qpc;
3166
Matan Barakb4ff3a32016-02-09 14:57:42 +02003167 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003168};
3169
3170struct mlx5_ifc_sqd2rts_qp_out_bits {
3171 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003172 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003173
3174 u8 syndrome[0x20];
3175
Matan Barakb4ff3a32016-02-09 14:57:42 +02003176 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003177};
3178
3179struct mlx5_ifc_sqd2rts_qp_in_bits {
3180 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003181 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003182
Matan Barakb4ff3a32016-02-09 14:57:42 +02003183 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003184 u8 op_mod[0x10];
3185
Matan Barakb4ff3a32016-02-09 14:57:42 +02003186 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003187 u8 qpn[0x18];
3188
Matan Barakb4ff3a32016-02-09 14:57:42 +02003189 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003190
3191 u8 opt_param_mask[0x20];
3192
Matan Barakb4ff3a32016-02-09 14:57:42 +02003193 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003194
3195 struct mlx5_ifc_qpc_bits qpc;
3196
Matan Barakb4ff3a32016-02-09 14:57:42 +02003197 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003198};
3199
3200struct mlx5_ifc_set_roce_address_out_bits {
3201 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003202 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003203
3204 u8 syndrome[0x20];
3205
Matan Barakb4ff3a32016-02-09 14:57:42 +02003206 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003207};
3208
3209struct mlx5_ifc_set_roce_address_in_bits {
3210 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003211 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003212
Matan Barakb4ff3a32016-02-09 14:57:42 +02003213 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003214 u8 op_mod[0x10];
3215
3216 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003217 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003218
Matan Barakb4ff3a32016-02-09 14:57:42 +02003219 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003220
3221 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3222};
3223
3224struct mlx5_ifc_set_mad_demux_out_bits {
3225 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003226 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003227
3228 u8 syndrome[0x20];
3229
Matan Barakb4ff3a32016-02-09 14:57:42 +02003230 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003231};
3232
3233enum {
3234 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3235 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3236};
3237
3238struct mlx5_ifc_set_mad_demux_in_bits {
3239 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003240 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003241
Matan Barakb4ff3a32016-02-09 14:57:42 +02003242 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003243 u8 op_mod[0x10];
3244
Matan Barakb4ff3a32016-02-09 14:57:42 +02003245 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003246
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003249 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003250};
3251
3252struct mlx5_ifc_set_l2_table_entry_out_bits {
3253 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003254 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003255
3256 u8 syndrome[0x20];
3257
Matan Barakb4ff3a32016-02-09 14:57:42 +02003258 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003259};
3260
3261struct mlx5_ifc_set_l2_table_entry_in_bits {
3262 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003263 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003264
Matan Barakb4ff3a32016-02-09 14:57:42 +02003265 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003266 u8 op_mod[0x10];
3267
Matan Barakb4ff3a32016-02-09 14:57:42 +02003268 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003269
Matan Barakb4ff3a32016-02-09 14:57:42 +02003270 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003271 u8 table_index[0x18];
3272
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274
Matan Barakb4ff3a32016-02-09 14:57:42 +02003275 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003276 u8 vlan_valid[0x1];
3277 u8 vlan[0xc];
3278
3279 struct mlx5_ifc_mac_address_layout_bits mac_address;
3280
Matan Barakb4ff3a32016-02-09 14:57:42 +02003281 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003282};
3283
3284struct mlx5_ifc_set_issi_out_bits {
3285 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003286 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003287
3288 u8 syndrome[0x20];
3289
Matan Barakb4ff3a32016-02-09 14:57:42 +02003290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003291};
3292
3293struct mlx5_ifc_set_issi_in_bits {
3294 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003295 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003296
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298 u8 op_mod[0x10];
3299
Matan Barakb4ff3a32016-02-09 14:57:42 +02003300 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003301 u8 current_issi[0x10];
3302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304};
3305
3306struct mlx5_ifc_set_hca_cap_out_bits {
3307 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309
3310 u8 syndrome[0x20];
3311
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003313};
3314
3315struct mlx5_ifc_set_hca_cap_in_bits {
3316 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003317 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003318
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003320 u8 op_mod[0x10];
3321
Matan Barakb4ff3a32016-02-09 14:57:42 +02003322 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003323
Saeed Mahameede2816822015-05-28 22:28:40 +03003324 union mlx5_ifc_hca_cap_union_bits capability;
3325};
3326
Maor Gottlieb26a81452015-12-10 17:12:39 +02003327enum {
3328 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3329 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3330 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3331 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3332};
3333
Saeed Mahameede2816822015-05-28 22:28:40 +03003334struct mlx5_ifc_set_fte_out_bits {
3335 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003336 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003337
3338 u8 syndrome[0x20];
3339
Matan Barakb4ff3a32016-02-09 14:57:42 +02003340 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003341};
3342
3343struct mlx5_ifc_set_fte_in_bits {
3344 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003345 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003346
Matan Barakb4ff3a32016-02-09 14:57:42 +02003347 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003348 u8 op_mod[0x10];
3349
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003350 u8 other_vport[0x1];
3351 u8 reserved_at_41[0xf];
3352 u8 vport_number[0x10];
3353
3354 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003355
3356 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003357 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003358
Matan Barakb4ff3a32016-02-09 14:57:42 +02003359 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003360 u8 table_id[0x18];
3361
Matan Barakb4ff3a32016-02-09 14:57:42 +02003362 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003363 u8 modify_enable_mask[0x8];
3364
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003366
3367 u8 flow_index[0x20];
3368
Matan Barakb4ff3a32016-02-09 14:57:42 +02003369 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003370
3371 struct mlx5_ifc_flow_context_bits flow_context;
3372};
3373
3374struct mlx5_ifc_rts2rts_qp_out_bits {
3375 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377
3378 u8 syndrome[0x20];
3379
Matan Barakb4ff3a32016-02-09 14:57:42 +02003380 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003381};
3382
3383struct mlx5_ifc_rts2rts_qp_in_bits {
3384 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003385 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003386
Matan Barakb4ff3a32016-02-09 14:57:42 +02003387 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003388 u8 op_mod[0x10];
3389
Matan Barakb4ff3a32016-02-09 14:57:42 +02003390 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003391 u8 qpn[0x18];
3392
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394
3395 u8 opt_param_mask[0x20];
3396
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398
3399 struct mlx5_ifc_qpc_bits qpc;
3400
Matan Barakb4ff3a32016-02-09 14:57:42 +02003401 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003402};
3403
3404struct mlx5_ifc_rtr2rts_qp_out_bits {
3405 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407
3408 u8 syndrome[0x20];
3409
Matan Barakb4ff3a32016-02-09 14:57:42 +02003410 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003411};
3412
3413struct mlx5_ifc_rtr2rts_qp_in_bits {
3414 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003416
Matan Barakb4ff3a32016-02-09 14:57:42 +02003417 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003418 u8 op_mod[0x10];
3419
Matan Barakb4ff3a32016-02-09 14:57:42 +02003420 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003421 u8 qpn[0x18];
3422
Matan Barakb4ff3a32016-02-09 14:57:42 +02003423 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003424
3425 u8 opt_param_mask[0x20];
3426
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428
3429 struct mlx5_ifc_qpc_bits qpc;
3430
Matan Barakb4ff3a32016-02-09 14:57:42 +02003431 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003432};
3433
3434struct mlx5_ifc_rst2init_qp_out_bits {
3435 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003436 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003437
3438 u8 syndrome[0x20];
3439
Matan Barakb4ff3a32016-02-09 14:57:42 +02003440 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003441};
3442
3443struct mlx5_ifc_rst2init_qp_in_bits {
3444 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446
Matan Barakb4ff3a32016-02-09 14:57:42 +02003447 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003448 u8 op_mod[0x10];
3449
Matan Barakb4ff3a32016-02-09 14:57:42 +02003450 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003451 u8 qpn[0x18];
3452
Matan Barakb4ff3a32016-02-09 14:57:42 +02003453 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003454
3455 u8 opt_param_mask[0x20];
3456
Matan Barakb4ff3a32016-02-09 14:57:42 +02003457 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003458
3459 struct mlx5_ifc_qpc_bits qpc;
3460
Matan Barakb4ff3a32016-02-09 14:57:42 +02003461 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003462};
3463
Saeed Mahameed74862162016-06-09 15:11:34 +03003464struct mlx5_ifc_query_xrq_out_bits {
3465 u8 status[0x8];
3466 u8 reserved_at_8[0x18];
3467
3468 u8 syndrome[0x20];
3469
3470 u8 reserved_at_40[0x40];
3471
3472 struct mlx5_ifc_xrqc_bits xrq_context;
3473};
3474
3475struct mlx5_ifc_query_xrq_in_bits {
3476 u8 opcode[0x10];
3477 u8 reserved_at_10[0x10];
3478
3479 u8 reserved_at_20[0x10];
3480 u8 op_mod[0x10];
3481
3482 u8 reserved_at_40[0x8];
3483 u8 xrqn[0x18];
3484
3485 u8 reserved_at_60[0x20];
3486};
3487
Saeed Mahameede2816822015-05-28 22:28:40 +03003488struct mlx5_ifc_query_xrc_srq_out_bits {
3489 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003490 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003491
3492 u8 syndrome[0x20];
3493
Matan Barakb4ff3a32016-02-09 14:57:42 +02003494 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003495
3496 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3497
Matan Barakb4ff3a32016-02-09 14:57:42 +02003498 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003499
3500 u8 pas[0][0x40];
3501};
3502
3503struct mlx5_ifc_query_xrc_srq_in_bits {
3504 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003505 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003506
Matan Barakb4ff3a32016-02-09 14:57:42 +02003507 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003508 u8 op_mod[0x10];
3509
Matan Barakb4ff3a32016-02-09 14:57:42 +02003510 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003511 u8 xrc_srqn[0x18];
3512
Matan Barakb4ff3a32016-02-09 14:57:42 +02003513 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003514};
3515
3516enum {
3517 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3518 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3519};
3520
3521struct mlx5_ifc_query_vport_state_out_bits {
3522 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003523 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003524
3525 u8 syndrome[0x20];
3526
Matan Barakb4ff3a32016-02-09 14:57:42 +02003527 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003528
Matan Barakb4ff3a32016-02-09 14:57:42 +02003529 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003530 u8 admin_state[0x4];
3531 u8 state[0x4];
3532};
3533
3534enum {
3535 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003536 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003537};
3538
3539struct mlx5_ifc_query_vport_state_in_bits {
3540 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003541 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003542
Matan Barakb4ff3a32016-02-09 14:57:42 +02003543 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003544 u8 op_mod[0x10];
3545
3546 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003547 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003548 u8 vport_number[0x10];
3549
Matan Barakb4ff3a32016-02-09 14:57:42 +02003550 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003551};
3552
3553struct mlx5_ifc_query_vport_counter_out_bits {
3554 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003555 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003556
3557 u8 syndrome[0x20];
3558
Matan Barakb4ff3a32016-02-09 14:57:42 +02003559 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003560
3561 struct mlx5_ifc_traffic_counter_bits received_errors;
3562
3563 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3564
3565 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3566
3567 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3568
3569 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3570
3571 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3572
3573 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3574
3575 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3576
3577 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3578
3579 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3580
3581 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3582
3583 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3584
Matan Barakb4ff3a32016-02-09 14:57:42 +02003585 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003586};
3587
3588enum {
3589 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3590};
3591
3592struct mlx5_ifc_query_vport_counter_in_bits {
3593 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003594 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003595
Matan Barakb4ff3a32016-02-09 14:57:42 +02003596 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003597 u8 op_mod[0x10];
3598
3599 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003600 u8 reserved_at_41[0xb];
3601 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003602 u8 vport_number[0x10];
3603
Matan Barakb4ff3a32016-02-09 14:57:42 +02003604 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003605
3606 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003607 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003608
Matan Barakb4ff3a32016-02-09 14:57:42 +02003609 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003610};
3611
3612struct mlx5_ifc_query_tis_out_bits {
3613 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003614 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003615
3616 u8 syndrome[0x20];
3617
Matan Barakb4ff3a32016-02-09 14:57:42 +02003618 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003619
3620 struct mlx5_ifc_tisc_bits tis_context;
3621};
3622
3623struct mlx5_ifc_query_tis_in_bits {
3624 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003625 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003626
Matan Barakb4ff3a32016-02-09 14:57:42 +02003627 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003628 u8 op_mod[0x10];
3629
Matan Barakb4ff3a32016-02-09 14:57:42 +02003630 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003631 u8 tisn[0x18];
3632
Matan Barakb4ff3a32016-02-09 14:57:42 +02003633 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003634};
3635
3636struct mlx5_ifc_query_tir_out_bits {
3637 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003638 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003639
3640 u8 syndrome[0x20];
3641
Matan Barakb4ff3a32016-02-09 14:57:42 +02003642 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003643
3644 struct mlx5_ifc_tirc_bits tir_context;
3645};
3646
3647struct mlx5_ifc_query_tir_in_bits {
3648 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003649 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003650
Matan Barakb4ff3a32016-02-09 14:57:42 +02003651 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003652 u8 op_mod[0x10];
3653
Matan Barakb4ff3a32016-02-09 14:57:42 +02003654 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003655 u8 tirn[0x18];
3656
Matan Barakb4ff3a32016-02-09 14:57:42 +02003657 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003658};
3659
3660struct mlx5_ifc_query_srq_out_bits {
3661 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003662 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003663
3664 u8 syndrome[0x20];
3665
Matan Barakb4ff3a32016-02-09 14:57:42 +02003666 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003667
3668 struct mlx5_ifc_srqc_bits srq_context_entry;
3669
Matan Barakb4ff3a32016-02-09 14:57:42 +02003670 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003671
3672 u8 pas[0][0x40];
3673};
3674
3675struct mlx5_ifc_query_srq_in_bits {
3676 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003677 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003678
Matan Barakb4ff3a32016-02-09 14:57:42 +02003679 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003680 u8 op_mod[0x10];
3681
Matan Barakb4ff3a32016-02-09 14:57:42 +02003682 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003683 u8 srqn[0x18];
3684
Matan Barakb4ff3a32016-02-09 14:57:42 +02003685 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003686};
3687
3688struct mlx5_ifc_query_sq_out_bits {
3689 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003690 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003691
3692 u8 syndrome[0x20];
3693
Matan Barakb4ff3a32016-02-09 14:57:42 +02003694 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003695
3696 struct mlx5_ifc_sqc_bits sq_context;
3697};
3698
3699struct mlx5_ifc_query_sq_in_bits {
3700 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003701 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003702
Matan Barakb4ff3a32016-02-09 14:57:42 +02003703 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003704 u8 op_mod[0x10];
3705
Matan Barakb4ff3a32016-02-09 14:57:42 +02003706 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003707 u8 sqn[0x18];
3708
Matan Barakb4ff3a32016-02-09 14:57:42 +02003709 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003710};
3711
3712struct mlx5_ifc_query_special_contexts_out_bits {
3713 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003714 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003715
3716 u8 syndrome[0x20];
3717
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003718 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003719
3720 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003721
3722 u8 null_mkey[0x20];
3723
3724 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003725};
3726
3727struct mlx5_ifc_query_special_contexts_in_bits {
3728 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003729 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003730
Matan Barakb4ff3a32016-02-09 14:57:42 +02003731 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003732 u8 op_mod[0x10];
3733
Matan Barakb4ff3a32016-02-09 14:57:42 +02003734 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003735};
3736
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003737struct mlx5_ifc_query_scheduling_element_out_bits {
3738 u8 opcode[0x10];
3739 u8 reserved_at_10[0x10];
3740
3741 u8 reserved_at_20[0x10];
3742 u8 op_mod[0x10];
3743
3744 u8 reserved_at_40[0xc0];
3745
3746 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3747
3748 u8 reserved_at_300[0x100];
3749};
3750
3751enum {
3752 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3753};
3754
3755struct mlx5_ifc_query_scheduling_element_in_bits {
3756 u8 opcode[0x10];
3757 u8 reserved_at_10[0x10];
3758
3759 u8 reserved_at_20[0x10];
3760 u8 op_mod[0x10];
3761
3762 u8 scheduling_hierarchy[0x8];
3763 u8 reserved_at_48[0x18];
3764
3765 u8 scheduling_element_id[0x20];
3766
3767 u8 reserved_at_80[0x180];
3768};
3769
Saeed Mahameede2816822015-05-28 22:28:40 +03003770struct mlx5_ifc_query_rqt_out_bits {
3771 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003772 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003773
3774 u8 syndrome[0x20];
3775
Matan Barakb4ff3a32016-02-09 14:57:42 +02003776 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003777
3778 struct mlx5_ifc_rqtc_bits rqt_context;
3779};
3780
3781struct mlx5_ifc_query_rqt_in_bits {
3782 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003783 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003784
Matan Barakb4ff3a32016-02-09 14:57:42 +02003785 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003786 u8 op_mod[0x10];
3787
Matan Barakb4ff3a32016-02-09 14:57:42 +02003788 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003789 u8 rqtn[0x18];
3790
Matan Barakb4ff3a32016-02-09 14:57:42 +02003791 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003792};
3793
3794struct mlx5_ifc_query_rq_out_bits {
3795 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003796 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003797
3798 u8 syndrome[0x20];
3799
Matan Barakb4ff3a32016-02-09 14:57:42 +02003800 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003801
3802 struct mlx5_ifc_rqc_bits rq_context;
3803};
3804
3805struct mlx5_ifc_query_rq_in_bits {
3806 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003807 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003808
Matan Barakb4ff3a32016-02-09 14:57:42 +02003809 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003810 u8 op_mod[0x10];
3811
Matan Barakb4ff3a32016-02-09 14:57:42 +02003812 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003813 u8 rqn[0x18];
3814
Matan Barakb4ff3a32016-02-09 14:57:42 +02003815 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003816};
3817
3818struct mlx5_ifc_query_roce_address_out_bits {
3819 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003820 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003821
3822 u8 syndrome[0x20];
3823
Matan Barakb4ff3a32016-02-09 14:57:42 +02003824 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003825
3826 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3827};
3828
3829struct mlx5_ifc_query_roce_address_in_bits {
3830 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003831 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003832
Matan Barakb4ff3a32016-02-09 14:57:42 +02003833 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003834 u8 op_mod[0x10];
3835
3836 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003837 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003838
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840};
3841
3842struct mlx5_ifc_query_rmp_out_bits {
3843 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845
3846 u8 syndrome[0x20];
3847
Matan Barakb4ff3a32016-02-09 14:57:42 +02003848 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003849
3850 struct mlx5_ifc_rmpc_bits rmp_context;
3851};
3852
3853struct mlx5_ifc_query_rmp_in_bits {
3854 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003855 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003856
Matan Barakb4ff3a32016-02-09 14:57:42 +02003857 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003858 u8 op_mod[0x10];
3859
Matan Barakb4ff3a32016-02-09 14:57:42 +02003860 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003861 u8 rmpn[0x18];
3862
Matan Barakb4ff3a32016-02-09 14:57:42 +02003863 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003864};
3865
3866struct mlx5_ifc_query_qp_out_bits {
3867 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003868 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003869
3870 u8 syndrome[0x20];
3871
Matan Barakb4ff3a32016-02-09 14:57:42 +02003872 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003873
3874 u8 opt_param_mask[0x20];
3875
Matan Barakb4ff3a32016-02-09 14:57:42 +02003876 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003877
3878 struct mlx5_ifc_qpc_bits qpc;
3879
Matan Barakb4ff3a32016-02-09 14:57:42 +02003880 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881
3882 u8 pas[0][0x40];
3883};
3884
3885struct mlx5_ifc_query_qp_in_bits {
3886 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888
Matan Barakb4ff3a32016-02-09 14:57:42 +02003889 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003890 u8 op_mod[0x10];
3891
Matan Barakb4ff3a32016-02-09 14:57:42 +02003892 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003893 u8 qpn[0x18];
3894
Matan Barakb4ff3a32016-02-09 14:57:42 +02003895 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003896};
3897
3898struct mlx5_ifc_query_q_counter_out_bits {
3899 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003900 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003901
3902 u8 syndrome[0x20];
3903
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905
3906 u8 rx_write_requests[0x20];
3907
Matan Barakb4ff3a32016-02-09 14:57:42 +02003908 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003909
3910 u8 rx_read_requests[0x20];
3911
Matan Barakb4ff3a32016-02-09 14:57:42 +02003912 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003913
3914 u8 rx_atomic_requests[0x20];
3915
Matan Barakb4ff3a32016-02-09 14:57:42 +02003916 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003917
3918 u8 rx_dct_connect[0x20];
3919
Matan Barakb4ff3a32016-02-09 14:57:42 +02003920 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003921
3922 u8 out_of_buffer[0x20];
3923
Matan Barakb4ff3a32016-02-09 14:57:42 +02003924 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003925
3926 u8 out_of_sequence[0x20];
3927
Saeed Mahameed74862162016-06-09 15:11:34 +03003928 u8 reserved_at_1e0[0x20];
3929
3930 u8 duplicate_request[0x20];
3931
3932 u8 reserved_at_220[0x20];
3933
3934 u8 rnr_nak_retry_err[0x20];
3935
3936 u8 reserved_at_260[0x20];
3937
3938 u8 packet_seq_err[0x20];
3939
3940 u8 reserved_at_2a0[0x20];
3941
3942 u8 implied_nak_seq_err[0x20];
3943
3944 u8 reserved_at_2e0[0x20];
3945
3946 u8 local_ack_timeout_err[0x20];
3947
3948 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003949};
3950
3951struct mlx5_ifc_query_q_counter_in_bits {
3952 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003953 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003954
Matan Barakb4ff3a32016-02-09 14:57:42 +02003955 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003956 u8 op_mod[0x10];
3957
Matan Barakb4ff3a32016-02-09 14:57:42 +02003958 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003959
3960 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003961 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003962
Matan Barakb4ff3a32016-02-09 14:57:42 +02003963 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003964 u8 counter_set_id[0x8];
3965};
3966
3967struct mlx5_ifc_query_pages_out_bits {
3968 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003969 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003970
3971 u8 syndrome[0x20];
3972
Matan Barakb4ff3a32016-02-09 14:57:42 +02003973 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003974 u8 function_id[0x10];
3975
3976 u8 num_pages[0x20];
3977};
3978
3979enum {
3980 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3981 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3982 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3983};
3984
3985struct mlx5_ifc_query_pages_in_bits {
3986 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003987 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003988
Matan Barakb4ff3a32016-02-09 14:57:42 +02003989 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003990 u8 op_mod[0x10];
3991
Matan Barakb4ff3a32016-02-09 14:57:42 +02003992 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003993 u8 function_id[0x10];
3994
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996};
3997
3998struct mlx5_ifc_query_nic_vport_context_out_bits {
3999 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004000 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004001
4002 u8 syndrome[0x20];
4003
Matan Barakb4ff3a32016-02-09 14:57:42 +02004004 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004005
4006 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4007};
4008
4009struct mlx5_ifc_query_nic_vport_context_in_bits {
4010 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004011 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004012
Matan Barakb4ff3a32016-02-09 14:57:42 +02004013 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004014 u8 op_mod[0x10];
4015
4016 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004017 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004018 u8 vport_number[0x10];
4019
Matan Barakb4ff3a32016-02-09 14:57:42 +02004020 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004021 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004022 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004023};
4024
4025struct mlx5_ifc_query_mkey_out_bits {
4026 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004027 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004028
4029 u8 syndrome[0x20];
4030
Matan Barakb4ff3a32016-02-09 14:57:42 +02004031 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004032
4033 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4034
Matan Barakb4ff3a32016-02-09 14:57:42 +02004035 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004036
4037 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4038
4039 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4040};
4041
4042struct mlx5_ifc_query_mkey_in_bits {
4043 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004044 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004045
Matan Barakb4ff3a32016-02-09 14:57:42 +02004046 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004047 u8 op_mod[0x10];
4048
Matan Barakb4ff3a32016-02-09 14:57:42 +02004049 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004050 u8 mkey_index[0x18];
4051
4052 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004053 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004054};
4055
4056struct mlx5_ifc_query_mad_demux_out_bits {
4057 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004058 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004059
4060 u8 syndrome[0x20];
4061
Matan Barakb4ff3a32016-02-09 14:57:42 +02004062 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004063
4064 u8 mad_dumux_parameters_block[0x20];
4065};
4066
4067struct mlx5_ifc_query_mad_demux_in_bits {
4068 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004069 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004070
Matan Barakb4ff3a32016-02-09 14:57:42 +02004071 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004072 u8 op_mod[0x10];
4073
Matan Barakb4ff3a32016-02-09 14:57:42 +02004074 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004075};
4076
4077struct mlx5_ifc_query_l2_table_entry_out_bits {
4078 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004079 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004080
4081 u8 syndrome[0x20];
4082
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084
Matan Barakb4ff3a32016-02-09 14:57:42 +02004085 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004086 u8 vlan_valid[0x1];
4087 u8 vlan[0xc];
4088
4089 struct mlx5_ifc_mac_address_layout_bits mac_address;
4090
Matan Barakb4ff3a32016-02-09 14:57:42 +02004091 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004092};
4093
4094struct mlx5_ifc_query_l2_table_entry_in_bits {
4095 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004096 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004097
Matan Barakb4ff3a32016-02-09 14:57:42 +02004098 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004099 u8 op_mod[0x10];
4100
Matan Barakb4ff3a32016-02-09 14:57:42 +02004101 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004102
Matan Barakb4ff3a32016-02-09 14:57:42 +02004103 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004104 u8 table_index[0x18];
4105
Matan Barakb4ff3a32016-02-09 14:57:42 +02004106 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004107};
4108
4109struct mlx5_ifc_query_issi_out_bits {
4110 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004111 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004112
4113 u8 syndrome[0x20];
4114
Matan Barakb4ff3a32016-02-09 14:57:42 +02004115 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004116 u8 current_issi[0x10];
4117
Matan Barakb4ff3a32016-02-09 14:57:42 +02004118 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004119
Matan Barakb4ff3a32016-02-09 14:57:42 +02004120 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004121 u8 supported_issi_dw0[0x20];
4122};
4123
4124struct mlx5_ifc_query_issi_in_bits {
4125 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004126 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004127
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129 u8 op_mod[0x10];
4130
Matan Barakb4ff3a32016-02-09 14:57:42 +02004131 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004132};
4133
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004134struct mlx5_ifc_set_driver_version_out_bits {
4135 u8 status[0x8];
4136 u8 reserved_0[0x18];
4137
4138 u8 syndrome[0x20];
4139 u8 reserved_1[0x40];
4140};
4141
4142struct mlx5_ifc_set_driver_version_in_bits {
4143 u8 opcode[0x10];
4144 u8 reserved_0[0x10];
4145
4146 u8 reserved_1[0x10];
4147 u8 op_mod[0x10];
4148
4149 u8 reserved_2[0x40];
4150 u8 driver_version[64][0x8];
4151};
4152
Saeed Mahameede2816822015-05-28 22:28:40 +03004153struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4154 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004155 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004156
4157 u8 syndrome[0x20];
4158
Matan Barakb4ff3a32016-02-09 14:57:42 +02004159 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004160
4161 struct mlx5_ifc_pkey_bits pkey[0];
4162};
4163
4164struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4165 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004166 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004167
Matan Barakb4ff3a32016-02-09 14:57:42 +02004168 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004169 u8 op_mod[0x10];
4170
4171 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004172 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004173 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004174 u8 vport_number[0x10];
4175
Matan Barakb4ff3a32016-02-09 14:57:42 +02004176 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004177 u8 pkey_index[0x10];
4178};
4179
Eli Coheneff901d2016-03-11 22:58:42 +02004180enum {
4181 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4182 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4183 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4184};
4185
Saeed Mahameede2816822015-05-28 22:28:40 +03004186struct mlx5_ifc_query_hca_vport_gid_out_bits {
4187 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189
4190 u8 syndrome[0x20];
4191
Matan Barakb4ff3a32016-02-09 14:57:42 +02004192 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004193
4194 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004195 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004196
4197 struct mlx5_ifc_array128_auto_bits gid[0];
4198};
4199
4200struct mlx5_ifc_query_hca_vport_gid_in_bits {
4201 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004202 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004203
Matan Barakb4ff3a32016-02-09 14:57:42 +02004204 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004205 u8 op_mod[0x10];
4206
4207 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004208 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004209 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004210 u8 vport_number[0x10];
4211
Matan Barakb4ff3a32016-02-09 14:57:42 +02004212 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004213 u8 gid_index[0x10];
4214};
4215
4216struct mlx5_ifc_query_hca_vport_context_out_bits {
4217 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004218 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004219
4220 u8 syndrome[0x20];
4221
Matan Barakb4ff3a32016-02-09 14:57:42 +02004222 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004223
4224 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4225};
4226
4227struct mlx5_ifc_query_hca_vport_context_in_bits {
4228 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004229 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004230
Matan Barakb4ff3a32016-02-09 14:57:42 +02004231 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004232 u8 op_mod[0x10];
4233
4234 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004235 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004236 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004237 u8 vport_number[0x10];
4238
Matan Barakb4ff3a32016-02-09 14:57:42 +02004239 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004240};
4241
4242struct mlx5_ifc_query_hca_cap_out_bits {
4243 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004244 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004245
4246 u8 syndrome[0x20];
4247
Matan Barakb4ff3a32016-02-09 14:57:42 +02004248 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004249
4250 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004251};
4252
4253struct mlx5_ifc_query_hca_cap_in_bits {
4254 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004256
Matan Barakb4ff3a32016-02-09 14:57:42 +02004257 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004258 u8 op_mod[0x10];
4259
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004261};
4262
Saeed Mahameede2816822015-05-28 22:28:40 +03004263struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004264 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004266
4267 u8 syndrome[0x20];
4268
Matan Barakb4ff3a32016-02-09 14:57:42 +02004269 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004270
Matan Barakb4ff3a32016-02-09 14:57:42 +02004271 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004272 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004273 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004274 u8 log_size[0x8];
4275
Matan Barakb4ff3a32016-02-09 14:57:42 +02004276 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004277};
4278
Saeed Mahameede2816822015-05-28 22:28:40 +03004279struct mlx5_ifc_query_flow_table_in_bits {
4280 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004281 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004282
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004284 u8 op_mod[0x10];
4285
Matan Barakb4ff3a32016-02-09 14:57:42 +02004286 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004287
4288 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004289 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004290
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004292 u8 table_id[0x18];
4293
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295};
4296
4297struct mlx5_ifc_query_fte_out_bits {
4298 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300
4301 u8 syndrome[0x20];
4302
Matan Barakb4ff3a32016-02-09 14:57:42 +02004303 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004304
4305 struct mlx5_ifc_flow_context_bits flow_context;
4306};
4307
4308struct mlx5_ifc_query_fte_in_bits {
4309 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004310 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004311
Matan Barakb4ff3a32016-02-09 14:57:42 +02004312 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004313 u8 op_mod[0x10];
4314
Matan Barakb4ff3a32016-02-09 14:57:42 +02004315 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004316
4317 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319
Matan Barakb4ff3a32016-02-09 14:57:42 +02004320 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004321 u8 table_id[0x18];
4322
Matan Barakb4ff3a32016-02-09 14:57:42 +02004323 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004324
4325 u8 flow_index[0x20];
4326
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328};
4329
4330enum {
4331 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4332 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4333 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4334};
4335
4336struct mlx5_ifc_query_flow_group_out_bits {
4337 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004338 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004339
4340 u8 syndrome[0x20];
4341
Matan Barakb4ff3a32016-02-09 14:57:42 +02004342 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004343
4344 u8 start_flow_index[0x20];
4345
Matan Barakb4ff3a32016-02-09 14:57:42 +02004346 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004347
4348 u8 end_flow_index[0x20];
4349
Matan Barakb4ff3a32016-02-09 14:57:42 +02004350 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004351
Matan Barakb4ff3a32016-02-09 14:57:42 +02004352 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004353 u8 match_criteria_enable[0x8];
4354
4355 struct mlx5_ifc_fte_match_param_bits match_criteria;
4356
Matan Barakb4ff3a32016-02-09 14:57:42 +02004357 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004358};
4359
4360struct mlx5_ifc_query_flow_group_in_bits {
4361 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004362 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004363
Matan Barakb4ff3a32016-02-09 14:57:42 +02004364 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004365 u8 op_mod[0x10];
4366
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004368
4369 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371
Matan Barakb4ff3a32016-02-09 14:57:42 +02004372 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004373 u8 table_id[0x18];
4374
4375 u8 group_id[0x20];
4376
Matan Barakb4ff3a32016-02-09 14:57:42 +02004377 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004378};
4379
Amir Vadai9dc0b282016-05-13 12:55:39 +00004380struct mlx5_ifc_query_flow_counter_out_bits {
4381 u8 status[0x8];
4382 u8 reserved_at_8[0x18];
4383
4384 u8 syndrome[0x20];
4385
4386 u8 reserved_at_40[0x40];
4387
4388 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4389};
4390
4391struct mlx5_ifc_query_flow_counter_in_bits {
4392 u8 opcode[0x10];
4393 u8 reserved_at_10[0x10];
4394
4395 u8 reserved_at_20[0x10];
4396 u8 op_mod[0x10];
4397
4398 u8 reserved_at_40[0x80];
4399
4400 u8 clear[0x1];
4401 u8 reserved_at_c1[0xf];
4402 u8 num_of_counters[0x10];
4403
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004404 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004405};
4406
Saeed Mahameedd6666752015-12-01 18:03:22 +02004407struct mlx5_ifc_query_esw_vport_context_out_bits {
4408 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004409 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004410
4411 u8 syndrome[0x20];
4412
Matan Barakb4ff3a32016-02-09 14:57:42 +02004413 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004414
4415 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4416};
4417
4418struct mlx5_ifc_query_esw_vport_context_in_bits {
4419 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004420 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004421
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004423 u8 op_mod[0x10];
4424
4425 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004426 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004427 u8 vport_number[0x10];
4428
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004430};
4431
4432struct mlx5_ifc_modify_esw_vport_context_out_bits {
4433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004434 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004435
4436 u8 syndrome[0x20];
4437
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004439};
4440
4441struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004443 u8 vport_cvlan_insert[0x1];
4444 u8 vport_svlan_insert[0x1];
4445 u8 vport_cvlan_strip[0x1];
4446 u8 vport_svlan_strip[0x1];
4447};
4448
4449struct mlx5_ifc_modify_esw_vport_context_in_bits {
4450 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004452
Matan Barakb4ff3a32016-02-09 14:57:42 +02004453 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004454 u8 op_mod[0x10];
4455
4456 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004457 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004458 u8 vport_number[0x10];
4459
4460 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4461
4462 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4463};
4464
Saeed Mahameede2816822015-05-28 22:28:40 +03004465struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004466 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004467 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004468
4469 u8 syndrome[0x20];
4470
Matan Barakb4ff3a32016-02-09 14:57:42 +02004471 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004472
4473 struct mlx5_ifc_eqc_bits eq_context_entry;
4474
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004476
4477 u8 event_bitmask[0x40];
4478
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004480
4481 u8 pas[0][0x40];
4482};
4483
4484struct mlx5_ifc_query_eq_in_bits {
4485 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004486 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004487
Matan Barakb4ff3a32016-02-09 14:57:42 +02004488 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004489 u8 op_mod[0x10];
4490
Matan Barakb4ff3a32016-02-09 14:57:42 +02004491 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004492 u8 eq_number[0x8];
4493
Matan Barakb4ff3a32016-02-09 14:57:42 +02004494 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004495};
4496
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004497struct mlx5_ifc_encap_header_in_bits {
4498 u8 reserved_at_0[0x5];
4499 u8 header_type[0x3];
4500 u8 reserved_at_8[0xe];
4501 u8 encap_header_size[0xa];
4502
4503 u8 reserved_at_20[0x10];
4504 u8 encap_header[2][0x8];
4505
4506 u8 more_encap_header[0][0x8];
4507};
4508
4509struct mlx5_ifc_query_encap_header_out_bits {
4510 u8 status[0x8];
4511 u8 reserved_at_8[0x18];
4512
4513 u8 syndrome[0x20];
4514
4515 u8 reserved_at_40[0xa0];
4516
4517 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4518};
4519
4520struct mlx5_ifc_query_encap_header_in_bits {
4521 u8 opcode[0x10];
4522 u8 reserved_at_10[0x10];
4523
4524 u8 reserved_at_20[0x10];
4525 u8 op_mod[0x10];
4526
4527 u8 encap_id[0x20];
4528
4529 u8 reserved_at_60[0xa0];
4530};
4531
4532struct mlx5_ifc_alloc_encap_header_out_bits {
4533 u8 status[0x8];
4534 u8 reserved_at_8[0x18];
4535
4536 u8 syndrome[0x20];
4537
4538 u8 encap_id[0x20];
4539
4540 u8 reserved_at_60[0x20];
4541};
4542
4543struct mlx5_ifc_alloc_encap_header_in_bits {
4544 u8 opcode[0x10];
4545 u8 reserved_at_10[0x10];
4546
4547 u8 reserved_at_20[0x10];
4548 u8 op_mod[0x10];
4549
4550 u8 reserved_at_40[0xa0];
4551
4552 struct mlx5_ifc_encap_header_in_bits encap_header;
4553};
4554
4555struct mlx5_ifc_dealloc_encap_header_out_bits {
4556 u8 status[0x8];
4557 u8 reserved_at_8[0x18];
4558
4559 u8 syndrome[0x20];
4560
4561 u8 reserved_at_40[0x40];
4562};
4563
4564struct mlx5_ifc_dealloc_encap_header_in_bits {
4565 u8 opcode[0x10];
4566 u8 reserved_at_10[0x10];
4567
4568 u8 reserved_20[0x10];
4569 u8 op_mod[0x10];
4570
4571 u8 encap_id[0x20];
4572
4573 u8 reserved_60[0x20];
4574};
4575
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004576struct mlx5_ifc_set_action_in_bits {
4577 u8 action_type[0x4];
4578 u8 field[0xc];
4579 u8 reserved_at_10[0x3];
4580 u8 offset[0x5];
4581 u8 reserved_at_18[0x3];
4582 u8 length[0x5];
4583
4584 u8 data[0x20];
4585};
4586
4587struct mlx5_ifc_add_action_in_bits {
4588 u8 action_type[0x4];
4589 u8 field[0xc];
4590 u8 reserved_at_10[0x10];
4591
4592 u8 data[0x20];
4593};
4594
4595union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4596 struct mlx5_ifc_set_action_in_bits set_action_in;
4597 struct mlx5_ifc_add_action_in_bits add_action_in;
4598 u8 reserved_at_0[0x40];
4599};
4600
4601enum {
4602 MLX5_ACTION_TYPE_SET = 0x1,
4603 MLX5_ACTION_TYPE_ADD = 0x2,
4604};
4605
4606enum {
4607 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4608 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4609 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4610 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4611 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4612 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4613 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4614 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4615 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4616 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4617 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4618 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4619 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4620 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4621 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4622 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4623 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4624 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4625 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4626 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4627 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4628 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004629 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004630};
4631
4632struct mlx5_ifc_alloc_modify_header_context_out_bits {
4633 u8 status[0x8];
4634 u8 reserved_at_8[0x18];
4635
4636 u8 syndrome[0x20];
4637
4638 u8 modify_header_id[0x20];
4639
4640 u8 reserved_at_60[0x20];
4641};
4642
4643struct mlx5_ifc_alloc_modify_header_context_in_bits {
4644 u8 opcode[0x10];
4645 u8 reserved_at_10[0x10];
4646
4647 u8 reserved_at_20[0x10];
4648 u8 op_mod[0x10];
4649
4650 u8 reserved_at_40[0x20];
4651
4652 u8 table_type[0x8];
4653 u8 reserved_at_68[0x10];
4654 u8 num_of_actions[0x8];
4655
4656 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4657};
4658
4659struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4660 u8 status[0x8];
4661 u8 reserved_at_8[0x18];
4662
4663 u8 syndrome[0x20];
4664
4665 u8 reserved_at_40[0x40];
4666};
4667
4668struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4669 u8 opcode[0x10];
4670 u8 reserved_at_10[0x10];
4671
4672 u8 reserved_at_20[0x10];
4673 u8 op_mod[0x10];
4674
4675 u8 modify_header_id[0x20];
4676
4677 u8 reserved_at_60[0x20];
4678};
4679
Saeed Mahameede2816822015-05-28 22:28:40 +03004680struct mlx5_ifc_query_dct_out_bits {
4681 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004682 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004683
4684 u8 syndrome[0x20];
4685
Matan Barakb4ff3a32016-02-09 14:57:42 +02004686 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004687
4688 struct mlx5_ifc_dctc_bits dct_context_entry;
4689
Matan Barakb4ff3a32016-02-09 14:57:42 +02004690 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004691};
4692
4693struct mlx5_ifc_query_dct_in_bits {
4694 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004695 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004696
Matan Barakb4ff3a32016-02-09 14:57:42 +02004697 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004698 u8 op_mod[0x10];
4699
Matan Barakb4ff3a32016-02-09 14:57:42 +02004700 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004701 u8 dctn[0x18];
4702
Matan Barakb4ff3a32016-02-09 14:57:42 +02004703 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004704};
4705
4706struct mlx5_ifc_query_cq_out_bits {
4707 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004708 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004709
4710 u8 syndrome[0x20];
4711
Matan Barakb4ff3a32016-02-09 14:57:42 +02004712 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004713
4714 struct mlx5_ifc_cqc_bits cq_context;
4715
Matan Barakb4ff3a32016-02-09 14:57:42 +02004716 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004717
4718 u8 pas[0][0x40];
4719};
4720
4721struct mlx5_ifc_query_cq_in_bits {
4722 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004723 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004724
Matan Barakb4ff3a32016-02-09 14:57:42 +02004725 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004726 u8 op_mod[0x10];
4727
Matan Barakb4ff3a32016-02-09 14:57:42 +02004728 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004729 u8 cqn[0x18];
4730
Matan Barakb4ff3a32016-02-09 14:57:42 +02004731 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004732};
4733
4734struct mlx5_ifc_query_cong_status_out_bits {
4735 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004736 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004737
4738 u8 syndrome[0x20];
4739
Matan Barakb4ff3a32016-02-09 14:57:42 +02004740 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004741
4742 u8 enable[0x1];
4743 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004744 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004745};
4746
4747struct mlx5_ifc_query_cong_status_in_bits {
4748 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004749 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004750
Matan Barakb4ff3a32016-02-09 14:57:42 +02004751 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004752 u8 op_mod[0x10];
4753
Matan Barakb4ff3a32016-02-09 14:57:42 +02004754 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004755 u8 priority[0x4];
4756 u8 cong_protocol[0x4];
4757
Matan Barakb4ff3a32016-02-09 14:57:42 +02004758 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004759};
4760
4761struct mlx5_ifc_query_cong_statistics_out_bits {
4762 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004763 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004764
4765 u8 syndrome[0x20];
4766
Matan Barakb4ff3a32016-02-09 14:57:42 +02004767 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004768
Parav Pandite1f24a72017-04-16 07:29:29 +03004769 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004770
4771 u8 sum_flows[0x20];
4772
Parav Pandite1f24a72017-04-16 07:29:29 +03004773 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004774
Parav Pandite1f24a72017-04-16 07:29:29 +03004775 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004776
Parav Pandite1f24a72017-04-16 07:29:29 +03004777 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004778
Parav Pandite1f24a72017-04-16 07:29:29 +03004779 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004780
Matan Barakb4ff3a32016-02-09 14:57:42 +02004781 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782
4783 u8 time_stamp_high[0x20];
4784
4785 u8 time_stamp_low[0x20];
4786
4787 u8 accumulators_period[0x20];
4788
Parav Pandite1f24a72017-04-16 07:29:29 +03004789 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004790
Parav Pandite1f24a72017-04-16 07:29:29 +03004791 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004792
Parav Pandite1f24a72017-04-16 07:29:29 +03004793 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004794
Parav Pandite1f24a72017-04-16 07:29:29 +03004795 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004796
Matan Barakb4ff3a32016-02-09 14:57:42 +02004797 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004798};
4799
4800struct mlx5_ifc_query_cong_statistics_in_bits {
4801 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004802 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004803
Matan Barakb4ff3a32016-02-09 14:57:42 +02004804 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004805 u8 op_mod[0x10];
4806
4807 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004808 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004809
Matan Barakb4ff3a32016-02-09 14:57:42 +02004810 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004811};
4812
4813struct mlx5_ifc_query_cong_params_out_bits {
4814 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004815 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004816
4817 u8 syndrome[0x20];
4818
Matan Barakb4ff3a32016-02-09 14:57:42 +02004819 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004820
4821 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4822};
4823
4824struct mlx5_ifc_query_cong_params_in_bits {
4825 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004826 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004827
Matan Barakb4ff3a32016-02-09 14:57:42 +02004828 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004829 u8 op_mod[0x10];
4830
Matan Barakb4ff3a32016-02-09 14:57:42 +02004831 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004832 u8 cong_protocol[0x4];
4833
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835};
4836
4837struct mlx5_ifc_query_adapter_out_bits {
4838 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004839 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004840
4841 u8 syndrome[0x20];
4842
Matan Barakb4ff3a32016-02-09 14:57:42 +02004843 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004844
4845 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4846};
4847
4848struct mlx5_ifc_query_adapter_in_bits {
4849 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004850 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004851
Matan Barakb4ff3a32016-02-09 14:57:42 +02004852 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004853 u8 op_mod[0x10];
4854
Matan Barakb4ff3a32016-02-09 14:57:42 +02004855 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856};
4857
4858struct mlx5_ifc_qp_2rst_out_bits {
4859 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004860 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861
4862 u8 syndrome[0x20];
4863
Matan Barakb4ff3a32016-02-09 14:57:42 +02004864 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004865};
4866
4867struct mlx5_ifc_qp_2rst_in_bits {
4868 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004869 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004870
Matan Barakb4ff3a32016-02-09 14:57:42 +02004871 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004872 u8 op_mod[0x10];
4873
Matan Barakb4ff3a32016-02-09 14:57:42 +02004874 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004875 u8 qpn[0x18];
4876
Matan Barakb4ff3a32016-02-09 14:57:42 +02004877 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004878};
4879
4880struct mlx5_ifc_qp_2err_out_bits {
4881 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004882 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004883
4884 u8 syndrome[0x20];
4885
Matan Barakb4ff3a32016-02-09 14:57:42 +02004886 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004887};
4888
4889struct mlx5_ifc_qp_2err_in_bits {
4890 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004891 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004892
Matan Barakb4ff3a32016-02-09 14:57:42 +02004893 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004894 u8 op_mod[0x10];
4895
Matan Barakb4ff3a32016-02-09 14:57:42 +02004896 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004897 u8 qpn[0x18];
4898
Matan Barakb4ff3a32016-02-09 14:57:42 +02004899 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004900};
4901
4902struct mlx5_ifc_page_fault_resume_out_bits {
4903 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004904 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004905
4906 u8 syndrome[0x20];
4907
Matan Barakb4ff3a32016-02-09 14:57:42 +02004908 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909};
4910
4911struct mlx5_ifc_page_fault_resume_in_bits {
4912 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914
Matan Barakb4ff3a32016-02-09 14:57:42 +02004915 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004916 u8 op_mod[0x10];
4917
4918 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004919 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004920 u8 page_fault_type[0x3];
4921 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004922
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004923 u8 reserved_at_60[0x8];
4924 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004925};
4926
4927struct mlx5_ifc_nop_out_bits {
4928 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004929 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004930
4931 u8 syndrome[0x20];
4932
Matan Barakb4ff3a32016-02-09 14:57:42 +02004933 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004934};
4935
4936struct mlx5_ifc_nop_in_bits {
4937 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004938 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004939
Matan Barakb4ff3a32016-02-09 14:57:42 +02004940 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004941 u8 op_mod[0x10];
4942
Matan Barakb4ff3a32016-02-09 14:57:42 +02004943 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944};
4945
4946struct mlx5_ifc_modify_vport_state_out_bits {
4947 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004948 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004949
4950 u8 syndrome[0x20];
4951
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953};
4954
4955struct mlx5_ifc_modify_vport_state_in_bits {
4956 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004958
Matan Barakb4ff3a32016-02-09 14:57:42 +02004959 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004960 u8 op_mod[0x10];
4961
4962 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004963 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004964 u8 vport_number[0x10];
4965
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004968 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004969};
4970
4971struct mlx5_ifc_modify_tis_out_bits {
4972 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004973 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004974
4975 u8 syndrome[0x20];
4976
Matan Barakb4ff3a32016-02-09 14:57:42 +02004977 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004978};
4979
majd@mellanox.com75850d02016-01-14 19:13:06 +02004980struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004981 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004982
Aviv Heller84df61e2016-05-10 13:47:50 +03004983 u8 reserved_at_20[0x1d];
4984 u8 lag_tx_port_affinity[0x1];
4985 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004986 u8 prio[0x1];
4987};
4988
Saeed Mahameede2816822015-05-28 22:28:40 +03004989struct mlx5_ifc_modify_tis_in_bits {
4990 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004991 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992
Matan Barakb4ff3a32016-02-09 14:57:42 +02004993 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004994 u8 op_mod[0x10];
4995
Matan Barakb4ff3a32016-02-09 14:57:42 +02004996 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997 u8 tisn[0x18];
4998
Matan Barakb4ff3a32016-02-09 14:57:42 +02004999 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000
majd@mellanox.com75850d02016-01-14 19:13:06 +02005001 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005002
Matan Barakb4ff3a32016-02-09 14:57:42 +02005003 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005004
5005 struct mlx5_ifc_tisc_bits ctx;
5006};
5007
Achiad Shochatd9eea402015-08-04 14:05:42 +03005008struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005009 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005010
Matan Barakb4ff3a32016-02-09 14:57:42 +02005011 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005012 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005013 u8 reserved_at_3c[0x1];
5014 u8 hash[0x1];
5015 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005016 u8 lro[0x1];
5017};
5018
Saeed Mahameede2816822015-05-28 22:28:40 +03005019struct mlx5_ifc_modify_tir_out_bits {
5020 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022
5023 u8 syndrome[0x20];
5024
Matan Barakb4ff3a32016-02-09 14:57:42 +02005025 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026};
5027
5028struct mlx5_ifc_modify_tir_in_bits {
5029 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005031
Matan Barakb4ff3a32016-02-09 14:57:42 +02005032 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005033 u8 op_mod[0x10];
5034
Matan Barakb4ff3a32016-02-09 14:57:42 +02005035 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005036 u8 tirn[0x18];
5037
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039
Achiad Shochatd9eea402015-08-04 14:05:42 +03005040 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005041
Matan Barakb4ff3a32016-02-09 14:57:42 +02005042 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005043
5044 struct mlx5_ifc_tirc_bits ctx;
5045};
5046
5047struct mlx5_ifc_modify_sq_out_bits {
5048 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005049 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005050
5051 u8 syndrome[0x20];
5052
Matan Barakb4ff3a32016-02-09 14:57:42 +02005053 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005054};
5055
5056struct mlx5_ifc_modify_sq_in_bits {
5057 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005058 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005059
Matan Barakb4ff3a32016-02-09 14:57:42 +02005060 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005061 u8 op_mod[0x10];
5062
5063 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005064 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005065 u8 sqn[0x18];
5066
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068
5069 u8 modify_bitmask[0x40];
5070
Matan Barakb4ff3a32016-02-09 14:57:42 +02005071 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005072
5073 struct mlx5_ifc_sqc_bits ctx;
5074};
5075
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005076struct mlx5_ifc_modify_scheduling_element_out_bits {
5077 u8 status[0x8];
5078 u8 reserved_at_8[0x18];
5079
5080 u8 syndrome[0x20];
5081
5082 u8 reserved_at_40[0x1c0];
5083};
5084
5085enum {
5086 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5087 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5088};
5089
5090struct mlx5_ifc_modify_scheduling_element_in_bits {
5091 u8 opcode[0x10];
5092 u8 reserved_at_10[0x10];
5093
5094 u8 reserved_at_20[0x10];
5095 u8 op_mod[0x10];
5096
5097 u8 scheduling_hierarchy[0x8];
5098 u8 reserved_at_48[0x18];
5099
5100 u8 scheduling_element_id[0x20];
5101
5102 u8 reserved_at_80[0x20];
5103
5104 u8 modify_bitmask[0x20];
5105
5106 u8 reserved_at_c0[0x40];
5107
5108 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5109
5110 u8 reserved_at_300[0x100];
5111};
5112
Saeed Mahameede2816822015-05-28 22:28:40 +03005113struct mlx5_ifc_modify_rqt_out_bits {
5114 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116
5117 u8 syndrome[0x20];
5118
Matan Barakb4ff3a32016-02-09 14:57:42 +02005119 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005120};
5121
Achiad Shochat5c503682015-08-04 14:05:43 +03005122struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005123 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005124
Matan Barakb4ff3a32016-02-09 14:57:42 +02005125 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005126 u8 rqn_list[0x1];
5127};
5128
Saeed Mahameede2816822015-05-28 22:28:40 +03005129struct mlx5_ifc_modify_rqt_in_bits {
5130 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005131 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005132
Matan Barakb4ff3a32016-02-09 14:57:42 +02005133 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005134 u8 op_mod[0x10];
5135
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137 u8 rqtn[0x18];
5138
Matan Barakb4ff3a32016-02-09 14:57:42 +02005139 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005140
Achiad Shochat5c503682015-08-04 14:05:43 +03005141 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005142
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144
5145 struct mlx5_ifc_rqtc_bits ctx;
5146};
5147
5148struct mlx5_ifc_modify_rq_out_bits {
5149 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005150 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005151
5152 u8 syndrome[0x20];
5153
Matan Barakb4ff3a32016-02-09 14:57:42 +02005154 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005155};
5156
Alex Vesker83b502a2016-08-04 17:32:02 +03005157enum {
5158 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005159 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005160 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005161};
5162
Saeed Mahameede2816822015-05-28 22:28:40 +03005163struct mlx5_ifc_modify_rq_in_bits {
5164 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005165 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005166
Matan Barakb4ff3a32016-02-09 14:57:42 +02005167 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005168 u8 op_mod[0x10];
5169
5170 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005171 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005172 u8 rqn[0x18];
5173
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175
5176 u8 modify_bitmask[0x40];
5177
Matan Barakb4ff3a32016-02-09 14:57:42 +02005178 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005179
5180 struct mlx5_ifc_rqc_bits ctx;
5181};
5182
5183struct mlx5_ifc_modify_rmp_out_bits {
5184 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005185 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005186
5187 u8 syndrome[0x20];
5188
Matan Barakb4ff3a32016-02-09 14:57:42 +02005189 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005190};
5191
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005192struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005193 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005194
Matan Barakb4ff3a32016-02-09 14:57:42 +02005195 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005196 u8 lwm[0x1];
5197};
5198
Saeed Mahameede2816822015-05-28 22:28:40 +03005199struct mlx5_ifc_modify_rmp_in_bits {
5200 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005201 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005202
Matan Barakb4ff3a32016-02-09 14:57:42 +02005203 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005204 u8 op_mod[0x10];
5205
5206 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005207 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005208 u8 rmpn[0x18];
5209
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005211
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005212 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005213
Matan Barakb4ff3a32016-02-09 14:57:42 +02005214 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005215
5216 struct mlx5_ifc_rmpc_bits ctx;
5217};
5218
5219struct mlx5_ifc_modify_nic_vport_context_out_bits {
5220 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005221 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005222
5223 u8 syndrome[0x20];
5224
Matan Barakb4ff3a32016-02-09 14:57:42 +02005225 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005226};
5227
5228struct mlx5_ifc_modify_nic_vport_field_select_bits {
Noa Osherovich23898c72016-06-10 00:07:37 +03005229 u8 reserved_at_0[0x16];
5230 u8 node_guid[0x1];
5231 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005232 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005233 u8 mtu[0x1];
5234 u8 change_event[0x1];
5235 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005236 u8 permanent_address[0x1];
5237 u8 addresses_list[0x1];
5238 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005239 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005240};
5241
5242struct mlx5_ifc_modify_nic_vport_context_in_bits {
5243 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005244 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005245
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247 u8 op_mod[0x10];
5248
5249 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005250 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005251 u8 vport_number[0x10];
5252
5253 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5254
Matan Barakb4ff3a32016-02-09 14:57:42 +02005255 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005256
5257 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5258};
5259
5260struct mlx5_ifc_modify_hca_vport_context_out_bits {
5261 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005262 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005263
5264 u8 syndrome[0x20];
5265
Matan Barakb4ff3a32016-02-09 14:57:42 +02005266 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005267};
5268
5269struct mlx5_ifc_modify_hca_vport_context_in_bits {
5270 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005271 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005272
Matan Barakb4ff3a32016-02-09 14:57:42 +02005273 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005274 u8 op_mod[0x10];
5275
5276 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005277 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005278 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005279 u8 vport_number[0x10];
5280
Matan Barakb4ff3a32016-02-09 14:57:42 +02005281 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005282
5283 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5284};
5285
5286struct mlx5_ifc_modify_cq_out_bits {
5287 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005288 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005289
5290 u8 syndrome[0x20];
5291
Matan Barakb4ff3a32016-02-09 14:57:42 +02005292 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005293};
5294
5295enum {
5296 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5297 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5298};
5299
5300struct mlx5_ifc_modify_cq_in_bits {
5301 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005302 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005303
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005305 u8 op_mod[0x10];
5306
Matan Barakb4ff3a32016-02-09 14:57:42 +02005307 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005308 u8 cqn[0x18];
5309
5310 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5311
5312 struct mlx5_ifc_cqc_bits cq_context;
5313
Matan Barakb4ff3a32016-02-09 14:57:42 +02005314 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005315
5316 u8 pas[0][0x40];
5317};
5318
5319struct mlx5_ifc_modify_cong_status_out_bits {
5320 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005321 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005322
5323 u8 syndrome[0x20];
5324
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005326};
5327
5328struct mlx5_ifc_modify_cong_status_in_bits {
5329 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331
Matan Barakb4ff3a32016-02-09 14:57:42 +02005332 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005333 u8 op_mod[0x10];
5334
Matan Barakb4ff3a32016-02-09 14:57:42 +02005335 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005336 u8 priority[0x4];
5337 u8 cong_protocol[0x4];
5338
5339 u8 enable[0x1];
5340 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005341 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005342};
5343
5344struct mlx5_ifc_modify_cong_params_out_bits {
5345 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005346 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005347
5348 u8 syndrome[0x20];
5349
Matan Barakb4ff3a32016-02-09 14:57:42 +02005350 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005351};
5352
5353struct mlx5_ifc_modify_cong_params_in_bits {
5354 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005355 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005356
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358 u8 op_mod[0x10];
5359
Matan Barakb4ff3a32016-02-09 14:57:42 +02005360 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005361 u8 cong_protocol[0x4];
5362
5363 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5364
Matan Barakb4ff3a32016-02-09 14:57:42 +02005365 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005366
5367 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5368};
5369
5370struct mlx5_ifc_manage_pages_out_bits {
5371 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005372 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005373
5374 u8 syndrome[0x20];
5375
5376 u8 output_num_entries[0x20];
5377
Matan Barakb4ff3a32016-02-09 14:57:42 +02005378 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005379
5380 u8 pas[0][0x40];
5381};
5382
5383enum {
5384 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5385 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5386 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5387};
5388
5389struct mlx5_ifc_manage_pages_in_bits {
5390 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005391 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005392
Matan Barakb4ff3a32016-02-09 14:57:42 +02005393 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005394 u8 op_mod[0x10];
5395
Matan Barakb4ff3a32016-02-09 14:57:42 +02005396 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005397 u8 function_id[0x10];
5398
5399 u8 input_num_entries[0x20];
5400
5401 u8 pas[0][0x40];
5402};
5403
5404struct mlx5_ifc_mad_ifc_out_bits {
5405 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005406 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005407
5408 u8 syndrome[0x20];
5409
Matan Barakb4ff3a32016-02-09 14:57:42 +02005410 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005411
5412 u8 response_mad_packet[256][0x8];
5413};
5414
5415struct mlx5_ifc_mad_ifc_in_bits {
5416 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418
Matan Barakb4ff3a32016-02-09 14:57:42 +02005419 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005420 u8 op_mod[0x10];
5421
5422 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005423 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005424 u8 port[0x8];
5425
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427
5428 u8 mad[256][0x8];
5429};
5430
5431struct mlx5_ifc_init_hca_out_bits {
5432 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005433 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005434
5435 u8 syndrome[0x20];
5436
Matan Barakb4ff3a32016-02-09 14:57:42 +02005437 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005438};
5439
5440struct mlx5_ifc_init_hca_in_bits {
5441 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005442 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005443
Matan Barakb4ff3a32016-02-09 14:57:42 +02005444 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005445 u8 op_mod[0x10];
5446
Matan Barakb4ff3a32016-02-09 14:57:42 +02005447 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005448};
5449
5450struct mlx5_ifc_init2rtr_qp_out_bits {
5451 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005452 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005453
5454 u8 syndrome[0x20];
5455
Matan Barakb4ff3a32016-02-09 14:57:42 +02005456 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005457};
5458
5459struct mlx5_ifc_init2rtr_qp_in_bits {
5460 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005461 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005462
Matan Barakb4ff3a32016-02-09 14:57:42 +02005463 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005464 u8 op_mod[0x10];
5465
Matan Barakb4ff3a32016-02-09 14:57:42 +02005466 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005467 u8 qpn[0x18];
5468
Matan Barakb4ff3a32016-02-09 14:57:42 +02005469 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005470
5471 u8 opt_param_mask[0x20];
5472
Matan Barakb4ff3a32016-02-09 14:57:42 +02005473 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005474
5475 struct mlx5_ifc_qpc_bits qpc;
5476
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478};
5479
5480struct mlx5_ifc_init2init_qp_out_bits {
5481 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005482 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005483
5484 u8 syndrome[0x20];
5485
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487};
5488
5489struct mlx5_ifc_init2init_qp_in_bits {
5490 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494 u8 op_mod[0x10];
5495
Matan Barakb4ff3a32016-02-09 14:57:42 +02005496 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005497 u8 qpn[0x18];
5498
Matan Barakb4ff3a32016-02-09 14:57:42 +02005499 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005500
5501 u8 opt_param_mask[0x20];
5502
Matan Barakb4ff3a32016-02-09 14:57:42 +02005503 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005504
5505 struct mlx5_ifc_qpc_bits qpc;
5506
Matan Barakb4ff3a32016-02-09 14:57:42 +02005507 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005508};
5509
5510struct mlx5_ifc_get_dropped_packet_log_out_bits {
5511 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005512 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005513
5514 u8 syndrome[0x20];
5515
Matan Barakb4ff3a32016-02-09 14:57:42 +02005516 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005517
5518 u8 packet_headers_log[128][0x8];
5519
5520 u8 packet_syndrome[64][0x8];
5521};
5522
5523struct mlx5_ifc_get_dropped_packet_log_in_bits {
5524 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005525 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005526
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528 u8 op_mod[0x10];
5529
Matan Barakb4ff3a32016-02-09 14:57:42 +02005530 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005531};
5532
5533struct mlx5_ifc_gen_eqe_in_bits {
5534 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005535 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005536
Matan Barakb4ff3a32016-02-09 14:57:42 +02005537 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005538 u8 op_mod[0x10];
5539
Matan Barakb4ff3a32016-02-09 14:57:42 +02005540 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005541 u8 eq_number[0x8];
5542
Matan Barakb4ff3a32016-02-09 14:57:42 +02005543 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005544
5545 u8 eqe[64][0x8];
5546};
5547
5548struct mlx5_ifc_gen_eq_out_bits {
5549 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005550 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005551
5552 u8 syndrome[0x20];
5553
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555};
5556
5557struct mlx5_ifc_enable_hca_out_bits {
5558 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005559 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005560
5561 u8 syndrome[0x20];
5562
Matan Barakb4ff3a32016-02-09 14:57:42 +02005563 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005564};
5565
5566struct mlx5_ifc_enable_hca_in_bits {
5567 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005568 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005569
Matan Barakb4ff3a32016-02-09 14:57:42 +02005570 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005571 u8 op_mod[0x10];
5572
Matan Barakb4ff3a32016-02-09 14:57:42 +02005573 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005574 u8 function_id[0x10];
5575
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577};
5578
5579struct mlx5_ifc_drain_dct_out_bits {
5580 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005581 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005582
5583 u8 syndrome[0x20];
5584
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586};
5587
5588struct mlx5_ifc_drain_dct_in_bits {
5589 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591
Matan Barakb4ff3a32016-02-09 14:57:42 +02005592 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005593 u8 op_mod[0x10];
5594
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596 u8 dctn[0x18];
5597
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599};
5600
5601struct mlx5_ifc_disable_hca_out_bits {
5602 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005604
5605 u8 syndrome[0x20];
5606
Matan Barakb4ff3a32016-02-09 14:57:42 +02005607 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005608};
5609
5610struct mlx5_ifc_disable_hca_in_bits {
5611 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005612 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005613
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615 u8 op_mod[0x10];
5616
Matan Barakb4ff3a32016-02-09 14:57:42 +02005617 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005618 u8 function_id[0x10];
5619
Matan Barakb4ff3a32016-02-09 14:57:42 +02005620 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005621};
5622
5623struct mlx5_ifc_detach_from_mcg_out_bits {
5624 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005625 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005626
5627 u8 syndrome[0x20];
5628
Matan Barakb4ff3a32016-02-09 14:57:42 +02005629 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005630};
5631
5632struct mlx5_ifc_detach_from_mcg_in_bits {
5633 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005634 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005635
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637 u8 op_mod[0x10];
5638
Matan Barakb4ff3a32016-02-09 14:57:42 +02005639 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005640 u8 qpn[0x18];
5641
Matan Barakb4ff3a32016-02-09 14:57:42 +02005642 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005643
5644 u8 multicast_gid[16][0x8];
5645};
5646
Saeed Mahameed74862162016-06-09 15:11:34 +03005647struct mlx5_ifc_destroy_xrq_out_bits {
5648 u8 status[0x8];
5649 u8 reserved_at_8[0x18];
5650
5651 u8 syndrome[0x20];
5652
5653 u8 reserved_at_40[0x40];
5654};
5655
5656struct mlx5_ifc_destroy_xrq_in_bits {
5657 u8 opcode[0x10];
5658 u8 reserved_at_10[0x10];
5659
5660 u8 reserved_at_20[0x10];
5661 u8 op_mod[0x10];
5662
5663 u8 reserved_at_40[0x8];
5664 u8 xrqn[0x18];
5665
5666 u8 reserved_at_60[0x20];
5667};
5668
Saeed Mahameede2816822015-05-28 22:28:40 +03005669struct mlx5_ifc_destroy_xrc_srq_out_bits {
5670 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005671 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005672
5673 u8 syndrome[0x20];
5674
Matan Barakb4ff3a32016-02-09 14:57:42 +02005675 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005676};
5677
5678struct mlx5_ifc_destroy_xrc_srq_in_bits {
5679 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683 u8 op_mod[0x10];
5684
Matan Barakb4ff3a32016-02-09 14:57:42 +02005685 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005686 u8 xrc_srqn[0x18];
5687
Matan Barakb4ff3a32016-02-09 14:57:42 +02005688 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005689};
5690
5691struct mlx5_ifc_destroy_tis_out_bits {
5692 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005693 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005694
5695 u8 syndrome[0x20];
5696
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698};
5699
5700struct mlx5_ifc_destroy_tis_in_bits {
5701 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703
Matan Barakb4ff3a32016-02-09 14:57:42 +02005704 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005705 u8 op_mod[0x10];
5706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708 u8 tisn[0x18];
5709
Matan Barakb4ff3a32016-02-09 14:57:42 +02005710 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005711};
5712
5713struct mlx5_ifc_destroy_tir_out_bits {
5714 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005715 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005716
5717 u8 syndrome[0x20];
5718
Matan Barakb4ff3a32016-02-09 14:57:42 +02005719 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005720};
5721
5722struct mlx5_ifc_destroy_tir_in_bits {
5723 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005724 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005725
Matan Barakb4ff3a32016-02-09 14:57:42 +02005726 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005727 u8 op_mod[0x10];
5728
Matan Barakb4ff3a32016-02-09 14:57:42 +02005729 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005730 u8 tirn[0x18];
5731
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733};
5734
5735struct mlx5_ifc_destroy_srq_out_bits {
5736 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005737 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005738
5739 u8 syndrome[0x20];
5740
Matan Barakb4ff3a32016-02-09 14:57:42 +02005741 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005742};
5743
5744struct mlx5_ifc_destroy_srq_in_bits {
5745 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005746 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005747
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749 u8 op_mod[0x10];
5750
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752 u8 srqn[0x18];
5753
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755};
5756
5757struct mlx5_ifc_destroy_sq_out_bits {
5758 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005759 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005760
5761 u8 syndrome[0x20];
5762
Matan Barakb4ff3a32016-02-09 14:57:42 +02005763 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005764};
5765
5766struct mlx5_ifc_destroy_sq_in_bits {
5767 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005768 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005769
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771 u8 op_mod[0x10];
5772
Matan Barakb4ff3a32016-02-09 14:57:42 +02005773 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005774 u8 sqn[0x18];
5775
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777};
5778
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005779struct mlx5_ifc_destroy_scheduling_element_out_bits {
5780 u8 status[0x8];
5781 u8 reserved_at_8[0x18];
5782
5783 u8 syndrome[0x20];
5784
5785 u8 reserved_at_40[0x1c0];
5786};
5787
5788struct mlx5_ifc_destroy_scheduling_element_in_bits {
5789 u8 opcode[0x10];
5790 u8 reserved_at_10[0x10];
5791
5792 u8 reserved_at_20[0x10];
5793 u8 op_mod[0x10];
5794
5795 u8 scheduling_hierarchy[0x8];
5796 u8 reserved_at_48[0x18];
5797
5798 u8 scheduling_element_id[0x20];
5799
5800 u8 reserved_at_80[0x180];
5801};
5802
Saeed Mahameede2816822015-05-28 22:28:40 +03005803struct mlx5_ifc_destroy_rqt_out_bits {
5804 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005805 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005806
5807 u8 syndrome[0x20];
5808
Matan Barakb4ff3a32016-02-09 14:57:42 +02005809 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005810};
5811
5812struct mlx5_ifc_destroy_rqt_in_bits {
5813 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005814 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005815
Matan Barakb4ff3a32016-02-09 14:57:42 +02005816 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005817 u8 op_mod[0x10];
5818
Matan Barakb4ff3a32016-02-09 14:57:42 +02005819 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005820 u8 rqtn[0x18];
5821
Matan Barakb4ff3a32016-02-09 14:57:42 +02005822 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005823};
5824
5825struct mlx5_ifc_destroy_rq_out_bits {
5826 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005827 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005828
5829 u8 syndrome[0x20];
5830
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832};
5833
5834struct mlx5_ifc_destroy_rq_in_bits {
5835 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005836 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005837
Matan Barakb4ff3a32016-02-09 14:57:42 +02005838 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005839 u8 op_mod[0x10];
5840
Matan Barakb4ff3a32016-02-09 14:57:42 +02005841 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005842 u8 rqn[0x18];
5843
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845};
5846
5847struct mlx5_ifc_destroy_rmp_out_bits {
5848 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005849 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005850
5851 u8 syndrome[0x20];
5852
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854};
5855
5856struct mlx5_ifc_destroy_rmp_in_bits {
5857 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005858 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005859
Matan Barakb4ff3a32016-02-09 14:57:42 +02005860 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005861 u8 op_mod[0x10];
5862
Matan Barakb4ff3a32016-02-09 14:57:42 +02005863 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005864 u8 rmpn[0x18];
5865
Matan Barakb4ff3a32016-02-09 14:57:42 +02005866 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005867};
5868
5869struct mlx5_ifc_destroy_qp_out_bits {
5870 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005871 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005872
5873 u8 syndrome[0x20];
5874
Matan Barakb4ff3a32016-02-09 14:57:42 +02005875 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005876};
5877
5878struct mlx5_ifc_destroy_qp_in_bits {
5879 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005880 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005881
Matan Barakb4ff3a32016-02-09 14:57:42 +02005882 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005883 u8 op_mod[0x10];
5884
Matan Barakb4ff3a32016-02-09 14:57:42 +02005885 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005886 u8 qpn[0x18];
5887
Matan Barakb4ff3a32016-02-09 14:57:42 +02005888 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005889};
5890
5891struct mlx5_ifc_destroy_psv_out_bits {
5892 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005893 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005894
5895 u8 syndrome[0x20];
5896
Matan Barakb4ff3a32016-02-09 14:57:42 +02005897 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005898};
5899
5900struct mlx5_ifc_destroy_psv_in_bits {
5901 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005902 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005903
Matan Barakb4ff3a32016-02-09 14:57:42 +02005904 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005905 u8 op_mod[0x10];
5906
Matan Barakb4ff3a32016-02-09 14:57:42 +02005907 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005908 u8 psvn[0x18];
5909
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911};
5912
5913struct mlx5_ifc_destroy_mkey_out_bits {
5914 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005915 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005916
5917 u8 syndrome[0x20];
5918
Matan Barakb4ff3a32016-02-09 14:57:42 +02005919 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005920};
5921
5922struct mlx5_ifc_destroy_mkey_in_bits {
5923 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005924 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005925
Matan Barakb4ff3a32016-02-09 14:57:42 +02005926 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005927 u8 op_mod[0x10];
5928
Matan Barakb4ff3a32016-02-09 14:57:42 +02005929 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005930 u8 mkey_index[0x18];
5931
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933};
5934
5935struct mlx5_ifc_destroy_flow_table_out_bits {
5936 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005937 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005938
5939 u8 syndrome[0x20];
5940
Matan Barakb4ff3a32016-02-09 14:57:42 +02005941 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005942};
5943
5944struct mlx5_ifc_destroy_flow_table_in_bits {
5945 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005946 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005947
Matan Barakb4ff3a32016-02-09 14:57:42 +02005948 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005949 u8 op_mod[0x10];
5950
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005951 u8 other_vport[0x1];
5952 u8 reserved_at_41[0xf];
5953 u8 vport_number[0x10];
5954
5955 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005956
5957 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005958 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005959
Matan Barakb4ff3a32016-02-09 14:57:42 +02005960 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005961 u8 table_id[0x18];
5962
Matan Barakb4ff3a32016-02-09 14:57:42 +02005963 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005964};
5965
5966struct mlx5_ifc_destroy_flow_group_out_bits {
5967 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005968 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005969
5970 u8 syndrome[0x20];
5971
Matan Barakb4ff3a32016-02-09 14:57:42 +02005972 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005973};
5974
5975struct mlx5_ifc_destroy_flow_group_in_bits {
5976 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005977 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005978
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980 u8 op_mod[0x10];
5981
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005982 u8 other_vport[0x1];
5983 u8 reserved_at_41[0xf];
5984 u8 vport_number[0x10];
5985
5986 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005987
5988 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990
Matan Barakb4ff3a32016-02-09 14:57:42 +02005991 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005992 u8 table_id[0x18];
5993
5994 u8 group_id[0x20];
5995
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997};
5998
5999struct mlx5_ifc_destroy_eq_out_bits {
6000 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002
6003 u8 syndrome[0x20];
6004
Matan Barakb4ff3a32016-02-09 14:57:42 +02006005 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006006};
6007
6008struct mlx5_ifc_destroy_eq_in_bits {
6009 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006010 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006011
Matan Barakb4ff3a32016-02-09 14:57:42 +02006012 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006013 u8 op_mod[0x10];
6014
Matan Barakb4ff3a32016-02-09 14:57:42 +02006015 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006016 u8 eq_number[0x8];
6017
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019};
6020
6021struct mlx5_ifc_destroy_dct_out_bits {
6022 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024
6025 u8 syndrome[0x20];
6026
Matan Barakb4ff3a32016-02-09 14:57:42 +02006027 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006028};
6029
6030struct mlx5_ifc_destroy_dct_in_bits {
6031 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006032 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033
Matan Barakb4ff3a32016-02-09 14:57:42 +02006034 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006035 u8 op_mod[0x10];
6036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038 u8 dctn[0x18];
6039
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041};
6042
6043struct mlx5_ifc_destroy_cq_out_bits {
6044 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046
6047 u8 syndrome[0x20];
6048
Matan Barakb4ff3a32016-02-09 14:57:42 +02006049 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006050};
6051
6052struct mlx5_ifc_destroy_cq_in_bits {
6053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055
Matan Barakb4ff3a32016-02-09 14:57:42 +02006056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006057 u8 op_mod[0x10];
6058
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060 u8 cqn[0x18];
6061
Matan Barakb4ff3a32016-02-09 14:57:42 +02006062 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006063};
6064
6065struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6066 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006067 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006068
6069 u8 syndrome[0x20];
6070
Matan Barakb4ff3a32016-02-09 14:57:42 +02006071 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006072};
6073
6074struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6075 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006076 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006077
Matan Barakb4ff3a32016-02-09 14:57:42 +02006078 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006079 u8 op_mod[0x10];
6080
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082
Matan Barakb4ff3a32016-02-09 14:57:42 +02006083 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006084 u8 vxlan_udp_port[0x10];
6085};
6086
6087struct mlx5_ifc_delete_l2_table_entry_out_bits {
6088 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006089 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006090
6091 u8 syndrome[0x20];
6092
Matan Barakb4ff3a32016-02-09 14:57:42 +02006093 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094};
6095
6096struct mlx5_ifc_delete_l2_table_entry_in_bits {
6097 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006098 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006099
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101 u8 op_mod[0x10];
6102
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106 u8 table_index[0x18];
6107
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109};
6110
6111struct mlx5_ifc_delete_fte_out_bits {
6112 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006113 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006114
6115 u8 syndrome[0x20];
6116
Matan Barakb4ff3a32016-02-09 14:57:42 +02006117 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006118};
6119
6120struct mlx5_ifc_delete_fte_in_bits {
6121 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123
Matan Barakb4ff3a32016-02-09 14:57:42 +02006124 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006125 u8 op_mod[0x10];
6126
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006127 u8 other_vport[0x1];
6128 u8 reserved_at_41[0xf];
6129 u8 vport_number[0x10];
6130
6131 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006132
6133 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006134 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137 u8 table_id[0x18];
6138
Matan Barakb4ff3a32016-02-09 14:57:42 +02006139 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140
6141 u8 flow_index[0x20];
6142
Matan Barakb4ff3a32016-02-09 14:57:42 +02006143 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006144};
6145
6146struct mlx5_ifc_dealloc_xrcd_out_bits {
6147 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006148 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006149
6150 u8 syndrome[0x20];
6151
Matan Barakb4ff3a32016-02-09 14:57:42 +02006152 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006153};
6154
6155struct mlx5_ifc_dealloc_xrcd_in_bits {
6156 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158
Matan Barakb4ff3a32016-02-09 14:57:42 +02006159 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006160 u8 op_mod[0x10];
6161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163 u8 xrcd[0x18];
6164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166};
6167
6168struct mlx5_ifc_dealloc_uar_out_bits {
6169 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006170 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171
6172 u8 syndrome[0x20];
6173
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175};
6176
6177struct mlx5_ifc_dealloc_uar_in_bits {
6178 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006179 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006180
Matan Barakb4ff3a32016-02-09 14:57:42 +02006181 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006182 u8 op_mod[0x10];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185 u8 uar[0x18];
6186
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188};
6189
6190struct mlx5_ifc_dealloc_transport_domain_out_bits {
6191 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006192 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006193
6194 u8 syndrome[0x20];
6195
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197};
6198
6199struct mlx5_ifc_dealloc_transport_domain_in_bits {
6200 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204 u8 op_mod[0x10];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207 u8 transport_domain[0x18];
6208
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210};
6211
6212struct mlx5_ifc_dealloc_q_counter_out_bits {
6213 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006214 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006215
6216 u8 syndrome[0x20];
6217
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219};
6220
6221struct mlx5_ifc_dealloc_q_counter_in_bits {
6222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006224
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226 u8 op_mod[0x10];
6227
Matan Barakb4ff3a32016-02-09 14:57:42 +02006228 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229 u8 counter_set_id[0x8];
6230
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232};
6233
6234struct mlx5_ifc_dealloc_pd_out_bits {
6235 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006236 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006237
6238 u8 syndrome[0x20];
6239
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241};
6242
6243struct mlx5_ifc_dealloc_pd_in_bits {
6244 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006245 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006246
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248 u8 op_mod[0x10];
6249
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251 u8 pd[0x18];
6252
Matan Barakb4ff3a32016-02-09 14:57:42 +02006253 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006254};
6255
Amir Vadai9dc0b282016-05-13 12:55:39 +00006256struct mlx5_ifc_dealloc_flow_counter_out_bits {
6257 u8 status[0x8];
6258 u8 reserved_at_8[0x18];
6259
6260 u8 syndrome[0x20];
6261
6262 u8 reserved_at_40[0x40];
6263};
6264
6265struct mlx5_ifc_dealloc_flow_counter_in_bits {
6266 u8 opcode[0x10];
6267 u8 reserved_at_10[0x10];
6268
6269 u8 reserved_at_20[0x10];
6270 u8 op_mod[0x10];
6271
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006272 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006273
6274 u8 reserved_at_60[0x20];
6275};
6276
Saeed Mahameed74862162016-06-09 15:11:34 +03006277struct mlx5_ifc_create_xrq_out_bits {
6278 u8 status[0x8];
6279 u8 reserved_at_8[0x18];
6280
6281 u8 syndrome[0x20];
6282
6283 u8 reserved_at_40[0x8];
6284 u8 xrqn[0x18];
6285
6286 u8 reserved_at_60[0x20];
6287};
6288
6289struct mlx5_ifc_create_xrq_in_bits {
6290 u8 opcode[0x10];
6291 u8 reserved_at_10[0x10];
6292
6293 u8 reserved_at_20[0x10];
6294 u8 op_mod[0x10];
6295
6296 u8 reserved_at_40[0x40];
6297
6298 struct mlx5_ifc_xrqc_bits xrq_context;
6299};
6300
Saeed Mahameede2816822015-05-28 22:28:40 +03006301struct mlx5_ifc_create_xrc_srq_out_bits {
6302 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006303 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006304
6305 u8 syndrome[0x20];
6306
Matan Barakb4ff3a32016-02-09 14:57:42 +02006307 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006308 u8 xrc_srqn[0x18];
6309
Matan Barakb4ff3a32016-02-09 14:57:42 +02006310 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311};
6312
6313struct mlx5_ifc_create_xrc_srq_in_bits {
6314 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006315 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006316
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318 u8 op_mod[0x10];
6319
Matan Barakb4ff3a32016-02-09 14:57:42 +02006320 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006321
6322 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6323
Matan Barakb4ff3a32016-02-09 14:57:42 +02006324 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006325
6326 u8 pas[0][0x40];
6327};
6328
6329struct mlx5_ifc_create_tis_out_bits {
6330 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332
6333 u8 syndrome[0x20];
6334
Matan Barakb4ff3a32016-02-09 14:57:42 +02006335 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006336 u8 tisn[0x18];
6337
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339};
6340
6341struct mlx5_ifc_create_tis_in_bits {
6342 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344
Matan Barakb4ff3a32016-02-09 14:57:42 +02006345 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006346 u8 op_mod[0x10];
6347
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349
6350 struct mlx5_ifc_tisc_bits ctx;
6351};
6352
6353struct mlx5_ifc_create_tir_out_bits {
6354 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006355 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006356
6357 u8 syndrome[0x20];
6358
Matan Barakb4ff3a32016-02-09 14:57:42 +02006359 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006360 u8 tirn[0x18];
6361
Matan Barakb4ff3a32016-02-09 14:57:42 +02006362 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006363};
6364
6365struct mlx5_ifc_create_tir_in_bits {
6366 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006367 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006368
Matan Barakb4ff3a32016-02-09 14:57:42 +02006369 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006370 u8 op_mod[0x10];
6371
Matan Barakb4ff3a32016-02-09 14:57:42 +02006372 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006373
6374 struct mlx5_ifc_tirc_bits ctx;
6375};
6376
6377struct mlx5_ifc_create_srq_out_bits {
6378 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006379 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006380
6381 u8 syndrome[0x20];
6382
Matan Barakb4ff3a32016-02-09 14:57:42 +02006383 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006384 u8 srqn[0x18];
6385
Matan Barakb4ff3a32016-02-09 14:57:42 +02006386 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006387};
6388
6389struct mlx5_ifc_create_srq_in_bits {
6390 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006391 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006392
Matan Barakb4ff3a32016-02-09 14:57:42 +02006393 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006394 u8 op_mod[0x10];
6395
Matan Barakb4ff3a32016-02-09 14:57:42 +02006396 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006397
6398 struct mlx5_ifc_srqc_bits srq_context_entry;
6399
Matan Barakb4ff3a32016-02-09 14:57:42 +02006400 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006401
6402 u8 pas[0][0x40];
6403};
6404
6405struct mlx5_ifc_create_sq_out_bits {
6406 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006407 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006408
6409 u8 syndrome[0x20];
6410
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412 u8 sqn[0x18];
6413
Matan Barakb4ff3a32016-02-09 14:57:42 +02006414 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006415};
6416
6417struct mlx5_ifc_create_sq_in_bits {
6418 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006419 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006420
Matan Barakb4ff3a32016-02-09 14:57:42 +02006421 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006422 u8 op_mod[0x10];
6423
Matan Barakb4ff3a32016-02-09 14:57:42 +02006424 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006425
6426 struct mlx5_ifc_sqc_bits ctx;
6427};
6428
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006429struct mlx5_ifc_create_scheduling_element_out_bits {
6430 u8 status[0x8];
6431 u8 reserved_at_8[0x18];
6432
6433 u8 syndrome[0x20];
6434
6435 u8 reserved_at_40[0x40];
6436
6437 u8 scheduling_element_id[0x20];
6438
6439 u8 reserved_at_a0[0x160];
6440};
6441
6442struct mlx5_ifc_create_scheduling_element_in_bits {
6443 u8 opcode[0x10];
6444 u8 reserved_at_10[0x10];
6445
6446 u8 reserved_at_20[0x10];
6447 u8 op_mod[0x10];
6448
6449 u8 scheduling_hierarchy[0x8];
6450 u8 reserved_at_48[0x18];
6451
6452 u8 reserved_at_60[0xa0];
6453
6454 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6455
6456 u8 reserved_at_300[0x100];
6457};
6458
Saeed Mahameede2816822015-05-28 22:28:40 +03006459struct mlx5_ifc_create_rqt_out_bits {
6460 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006461 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006462
6463 u8 syndrome[0x20];
6464
Matan Barakb4ff3a32016-02-09 14:57:42 +02006465 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006466 u8 rqtn[0x18];
6467
Matan Barakb4ff3a32016-02-09 14:57:42 +02006468 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006469};
6470
6471struct mlx5_ifc_create_rqt_in_bits {
6472 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006473 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006474
Matan Barakb4ff3a32016-02-09 14:57:42 +02006475 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006476 u8 op_mod[0x10];
6477
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479
6480 struct mlx5_ifc_rqtc_bits rqt_context;
6481};
6482
6483struct mlx5_ifc_create_rq_out_bits {
6484 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006485 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006486
6487 u8 syndrome[0x20];
6488
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490 u8 rqn[0x18];
6491
Matan Barakb4ff3a32016-02-09 14:57:42 +02006492 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006493};
6494
6495struct mlx5_ifc_create_rq_in_bits {
6496 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500 u8 op_mod[0x10];
6501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503
6504 struct mlx5_ifc_rqc_bits ctx;
6505};
6506
6507struct mlx5_ifc_create_rmp_out_bits {
6508 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006509 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006510
6511 u8 syndrome[0x20];
6512
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514 u8 rmpn[0x18];
6515
Matan Barakb4ff3a32016-02-09 14:57:42 +02006516 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006517};
6518
6519struct mlx5_ifc_create_rmp_in_bits {
6520 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522
Matan Barakb4ff3a32016-02-09 14:57:42 +02006523 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006524 u8 op_mod[0x10];
6525
Matan Barakb4ff3a32016-02-09 14:57:42 +02006526 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006527
6528 struct mlx5_ifc_rmpc_bits ctx;
6529};
6530
6531struct mlx5_ifc_create_qp_out_bits {
6532 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006533 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006534
6535 u8 syndrome[0x20];
6536
Matan Barakb4ff3a32016-02-09 14:57:42 +02006537 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006538 u8 qpn[0x18];
6539
Matan Barakb4ff3a32016-02-09 14:57:42 +02006540 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006541};
6542
6543struct mlx5_ifc_create_qp_in_bits {
6544 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006545 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006546
Matan Barakb4ff3a32016-02-09 14:57:42 +02006547 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006548 u8 op_mod[0x10];
6549
Matan Barakb4ff3a32016-02-09 14:57:42 +02006550 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006551
6552 u8 opt_param_mask[0x20];
6553
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555
6556 struct mlx5_ifc_qpc_bits qpc;
6557
Matan Barakb4ff3a32016-02-09 14:57:42 +02006558 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006559
6560 u8 pas[0][0x40];
6561};
6562
6563struct mlx5_ifc_create_psv_out_bits {
6564 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006565 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006566
6567 u8 syndrome[0x20];
6568
Matan Barakb4ff3a32016-02-09 14:57:42 +02006569 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006570
Matan Barakb4ff3a32016-02-09 14:57:42 +02006571 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006572 u8 psv0_index[0x18];
6573
Matan Barakb4ff3a32016-02-09 14:57:42 +02006574 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006575 u8 psv1_index[0x18];
6576
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578 u8 psv2_index[0x18];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581 u8 psv3_index[0x18];
6582};
6583
6584struct mlx5_ifc_create_psv_in_bits {
6585 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006586 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006587
Matan Barakb4ff3a32016-02-09 14:57:42 +02006588 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006589 u8 op_mod[0x10];
6590
6591 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593 u8 pd[0x18];
6594
Matan Barakb4ff3a32016-02-09 14:57:42 +02006595 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006596};
6597
6598struct mlx5_ifc_create_mkey_out_bits {
6599 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006600 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006601
6602 u8 syndrome[0x20];
6603
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605 u8 mkey_index[0x18];
6606
Matan Barakb4ff3a32016-02-09 14:57:42 +02006607 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006608};
6609
6610struct mlx5_ifc_create_mkey_in_bits {
6611 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006612 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006613
Matan Barakb4ff3a32016-02-09 14:57:42 +02006614 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006615 u8 op_mod[0x10];
6616
Matan Barakb4ff3a32016-02-09 14:57:42 +02006617 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006618
6619 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621
6622 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6623
Matan Barakb4ff3a32016-02-09 14:57:42 +02006624 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006625
6626 u8 translations_octword_actual_size[0x20];
6627
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629
6630 u8 klm_pas_mtt[0][0x20];
6631};
6632
6633struct mlx5_ifc_create_flow_table_out_bits {
6634 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006635 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006636
6637 u8 syndrome[0x20];
6638
Matan Barakb4ff3a32016-02-09 14:57:42 +02006639 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006640 u8 table_id[0x18];
6641
Matan Barakb4ff3a32016-02-09 14:57:42 +02006642 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006643};
6644
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006645struct mlx5_ifc_flow_table_context_bits {
6646 u8 encap_en[0x1];
6647 u8 decap_en[0x1];
6648 u8 reserved_at_2[0x2];
6649 u8 table_miss_action[0x4];
6650 u8 level[0x8];
6651 u8 reserved_at_10[0x8];
6652 u8 log_size[0x8];
6653
6654 u8 reserved_at_20[0x8];
6655 u8 table_miss_id[0x18];
6656
6657 u8 reserved_at_40[0x8];
6658 u8 lag_master_next_table_id[0x18];
6659
6660 u8 reserved_at_60[0xe0];
6661};
6662
Saeed Mahameede2816822015-05-28 22:28:40 +03006663struct mlx5_ifc_create_flow_table_in_bits {
6664 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006665 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006666
Matan Barakb4ff3a32016-02-09 14:57:42 +02006667 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006668 u8 op_mod[0x10];
6669
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006670 u8 other_vport[0x1];
6671 u8 reserved_at_41[0xf];
6672 u8 vport_number[0x10];
6673
6674 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006675
6676 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006677 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006678
Matan Barakb4ff3a32016-02-09 14:57:42 +02006679 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006680
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006681 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006682};
6683
6684struct mlx5_ifc_create_flow_group_out_bits {
6685 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006686 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006687
6688 u8 syndrome[0x20];
6689
Matan Barakb4ff3a32016-02-09 14:57:42 +02006690 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006691 u8 group_id[0x18];
6692
Matan Barakb4ff3a32016-02-09 14:57:42 +02006693 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006694};
6695
6696enum {
6697 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6698 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6699 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6700};
6701
6702struct mlx5_ifc_create_flow_group_in_bits {
6703 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006704 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006705
Matan Barakb4ff3a32016-02-09 14:57:42 +02006706 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006707 u8 op_mod[0x10];
6708
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006709 u8 other_vport[0x1];
6710 u8 reserved_at_41[0xf];
6711 u8 vport_number[0x10];
6712
6713 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006714
6715 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006716 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006717
Matan Barakb4ff3a32016-02-09 14:57:42 +02006718 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006719 u8 table_id[0x18];
6720
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722
6723 u8 start_flow_index[0x20];
6724
Matan Barakb4ff3a32016-02-09 14:57:42 +02006725 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006726
6727 u8 end_flow_index[0x20];
6728
Matan Barakb4ff3a32016-02-09 14:57:42 +02006729 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006730
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732 u8 match_criteria_enable[0x8];
6733
6734 struct mlx5_ifc_fte_match_param_bits match_criteria;
6735
Matan Barakb4ff3a32016-02-09 14:57:42 +02006736 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006737};
6738
6739struct mlx5_ifc_create_eq_out_bits {
6740 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006741 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006742
6743 u8 syndrome[0x20];
6744
Matan Barakb4ff3a32016-02-09 14:57:42 +02006745 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006746 u8 eq_number[0x8];
6747
Matan Barakb4ff3a32016-02-09 14:57:42 +02006748 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006749};
6750
6751struct mlx5_ifc_create_eq_in_bits {
6752 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006753 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006754
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756 u8 op_mod[0x10];
6757
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759
6760 struct mlx5_ifc_eqc_bits eq_context_entry;
6761
Matan Barakb4ff3a32016-02-09 14:57:42 +02006762 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006763
6764 u8 event_bitmask[0x40];
6765
Matan Barakb4ff3a32016-02-09 14:57:42 +02006766 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006767
6768 u8 pas[0][0x40];
6769};
6770
6771struct mlx5_ifc_create_dct_out_bits {
6772 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006773 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006774
6775 u8 syndrome[0x20];
6776
Matan Barakb4ff3a32016-02-09 14:57:42 +02006777 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778 u8 dctn[0x18];
6779
Matan Barakb4ff3a32016-02-09 14:57:42 +02006780 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006781};
6782
6783struct mlx5_ifc_create_dct_in_bits {
6784 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006785 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006786
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788 u8 op_mod[0x10];
6789
Matan Barakb4ff3a32016-02-09 14:57:42 +02006790 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006791
6792 struct mlx5_ifc_dctc_bits dct_context_entry;
6793
Matan Barakb4ff3a32016-02-09 14:57:42 +02006794 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006795};
6796
6797struct mlx5_ifc_create_cq_out_bits {
6798 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800
6801 u8 syndrome[0x20];
6802
Matan Barakb4ff3a32016-02-09 14:57:42 +02006803 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006804 u8 cqn[0x18];
6805
Matan Barakb4ff3a32016-02-09 14:57:42 +02006806 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006807};
6808
6809struct mlx5_ifc_create_cq_in_bits {
6810 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006811 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006812
Matan Barakb4ff3a32016-02-09 14:57:42 +02006813 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006814 u8 op_mod[0x10];
6815
Matan Barakb4ff3a32016-02-09 14:57:42 +02006816 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006817
6818 struct mlx5_ifc_cqc_bits cq_context;
6819
Matan Barakb4ff3a32016-02-09 14:57:42 +02006820 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821
6822 u8 pas[0][0x40];
6823};
6824
6825struct mlx5_ifc_config_int_moderation_out_bits {
6826 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006827 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006828
6829 u8 syndrome[0x20];
6830
Matan Barakb4ff3a32016-02-09 14:57:42 +02006831 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006832 u8 min_delay[0xc];
6833 u8 int_vector[0x10];
6834
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836};
6837
6838enum {
6839 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6840 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6841};
6842
6843struct mlx5_ifc_config_int_moderation_in_bits {
6844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006846
Matan Barakb4ff3a32016-02-09 14:57:42 +02006847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006848 u8 op_mod[0x10];
6849
Matan Barakb4ff3a32016-02-09 14:57:42 +02006850 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006851 u8 min_delay[0xc];
6852 u8 int_vector[0x10];
6853
Matan Barakb4ff3a32016-02-09 14:57:42 +02006854 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006855};
6856
6857struct mlx5_ifc_attach_to_mcg_out_bits {
6858 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006859 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006860
6861 u8 syndrome[0x20];
6862
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864};
6865
6866struct mlx5_ifc_attach_to_mcg_in_bits {
6867 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006868 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006869
Matan Barakb4ff3a32016-02-09 14:57:42 +02006870 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006871 u8 op_mod[0x10];
6872
Matan Barakb4ff3a32016-02-09 14:57:42 +02006873 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006874 u8 qpn[0x18];
6875
Matan Barakb4ff3a32016-02-09 14:57:42 +02006876 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006877
6878 u8 multicast_gid[16][0x8];
6879};
6880
Saeed Mahameed74862162016-06-09 15:11:34 +03006881struct mlx5_ifc_arm_xrq_out_bits {
6882 u8 status[0x8];
6883 u8 reserved_at_8[0x18];
6884
6885 u8 syndrome[0x20];
6886
6887 u8 reserved_at_40[0x40];
6888};
6889
6890struct mlx5_ifc_arm_xrq_in_bits {
6891 u8 opcode[0x10];
6892 u8 reserved_at_10[0x10];
6893
6894 u8 reserved_at_20[0x10];
6895 u8 op_mod[0x10];
6896
6897 u8 reserved_at_40[0x8];
6898 u8 xrqn[0x18];
6899
6900 u8 reserved_at_60[0x10];
6901 u8 lwm[0x10];
6902};
6903
Saeed Mahameede2816822015-05-28 22:28:40 +03006904struct mlx5_ifc_arm_xrc_srq_out_bits {
6905 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006906 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006907
6908 u8 syndrome[0x20];
6909
Matan Barakb4ff3a32016-02-09 14:57:42 +02006910 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006911};
6912
6913enum {
6914 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6915};
6916
6917struct mlx5_ifc_arm_xrc_srq_in_bits {
6918 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006919 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006920
Matan Barakb4ff3a32016-02-09 14:57:42 +02006921 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006922 u8 op_mod[0x10];
6923
Matan Barakb4ff3a32016-02-09 14:57:42 +02006924 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006925 u8 xrc_srqn[0x18];
6926
Matan Barakb4ff3a32016-02-09 14:57:42 +02006927 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006928 u8 lwm[0x10];
6929};
6930
6931struct mlx5_ifc_arm_rq_out_bits {
6932 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006933 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006934
6935 u8 syndrome[0x20];
6936
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938};
6939
6940enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006941 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6942 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006943};
6944
6945struct mlx5_ifc_arm_rq_in_bits {
6946 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006947 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006948
Matan Barakb4ff3a32016-02-09 14:57:42 +02006949 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006950 u8 op_mod[0x10];
6951
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953 u8 srq_number[0x18];
6954
Matan Barakb4ff3a32016-02-09 14:57:42 +02006955 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956 u8 lwm[0x10];
6957};
6958
6959struct mlx5_ifc_arm_dct_out_bits {
6960 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006961 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006962
6963 u8 syndrome[0x20];
6964
Matan Barakb4ff3a32016-02-09 14:57:42 +02006965 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006966};
6967
6968struct mlx5_ifc_arm_dct_in_bits {
6969 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006970 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006971
Matan Barakb4ff3a32016-02-09 14:57:42 +02006972 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006973 u8 op_mod[0x10];
6974
Matan Barakb4ff3a32016-02-09 14:57:42 +02006975 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006976 u8 dct_number[0x18];
6977
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979};
6980
6981struct mlx5_ifc_alloc_xrcd_out_bits {
6982 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006983 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006984
6985 u8 syndrome[0x20];
6986
Matan Barakb4ff3a32016-02-09 14:57:42 +02006987 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006988 u8 xrcd[0x18];
6989
Matan Barakb4ff3a32016-02-09 14:57:42 +02006990 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991};
6992
6993struct mlx5_ifc_alloc_xrcd_in_bits {
6994 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006995 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006996
Matan Barakb4ff3a32016-02-09 14:57:42 +02006997 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006998 u8 op_mod[0x10];
6999
Matan Barakb4ff3a32016-02-09 14:57:42 +02007000 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007001};
7002
7003struct mlx5_ifc_alloc_uar_out_bits {
7004 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007005 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007006
7007 u8 syndrome[0x20];
7008
Matan Barakb4ff3a32016-02-09 14:57:42 +02007009 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007010 u8 uar[0x18];
7011
Matan Barakb4ff3a32016-02-09 14:57:42 +02007012 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007013};
7014
7015struct mlx5_ifc_alloc_uar_in_bits {
7016 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007017 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007018
Matan Barakb4ff3a32016-02-09 14:57:42 +02007019 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007020 u8 op_mod[0x10];
7021
Matan Barakb4ff3a32016-02-09 14:57:42 +02007022 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007023};
7024
7025struct mlx5_ifc_alloc_transport_domain_out_bits {
7026 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028
7029 u8 syndrome[0x20];
7030
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032 u8 transport_domain[0x18];
7033
Matan Barakb4ff3a32016-02-09 14:57:42 +02007034 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007035};
7036
7037struct mlx5_ifc_alloc_transport_domain_in_bits {
7038 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007039 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007040
Matan Barakb4ff3a32016-02-09 14:57:42 +02007041 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007042 u8 op_mod[0x10];
7043
Matan Barakb4ff3a32016-02-09 14:57:42 +02007044 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007045};
7046
7047struct mlx5_ifc_alloc_q_counter_out_bits {
7048 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007049 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007050
7051 u8 syndrome[0x20];
7052
Matan Barakb4ff3a32016-02-09 14:57:42 +02007053 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007054 u8 counter_set_id[0x8];
7055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057};
7058
7059struct mlx5_ifc_alloc_q_counter_in_bits {
7060 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007061 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007062
Matan Barakb4ff3a32016-02-09 14:57:42 +02007063 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007064 u8 op_mod[0x10];
7065
Matan Barakb4ff3a32016-02-09 14:57:42 +02007066 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007067};
7068
7069struct mlx5_ifc_alloc_pd_out_bits {
7070 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007071 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007072
7073 u8 syndrome[0x20];
7074
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076 u8 pd[0x18];
7077
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079};
7080
7081struct mlx5_ifc_alloc_pd_in_bits {
7082 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084
Matan Barakb4ff3a32016-02-09 14:57:42 +02007085 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007086 u8 op_mod[0x10];
7087
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089};
7090
Amir Vadai9dc0b282016-05-13 12:55:39 +00007091struct mlx5_ifc_alloc_flow_counter_out_bits {
7092 u8 status[0x8];
7093 u8 reserved_at_8[0x18];
7094
7095 u8 syndrome[0x20];
7096
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007097 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007098
7099 u8 reserved_at_60[0x20];
7100};
7101
7102struct mlx5_ifc_alloc_flow_counter_in_bits {
7103 u8 opcode[0x10];
7104 u8 reserved_at_10[0x10];
7105
7106 u8 reserved_at_20[0x10];
7107 u8 op_mod[0x10];
7108
7109 u8 reserved_at_40[0x40];
7110};
7111
Saeed Mahameede2816822015-05-28 22:28:40 +03007112struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7113 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007114 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007115
7116 u8 syndrome[0x20];
7117
Matan Barakb4ff3a32016-02-09 14:57:42 +02007118 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007119};
7120
7121struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7122 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007123 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007124
Matan Barakb4ff3a32016-02-09 14:57:42 +02007125 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007126 u8 op_mod[0x10];
7127
Matan Barakb4ff3a32016-02-09 14:57:42 +02007128 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007129
Matan Barakb4ff3a32016-02-09 14:57:42 +02007130 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007131 u8 vxlan_udp_port[0x10];
7132};
7133
Saeed Mahameed74862162016-06-09 15:11:34 +03007134struct mlx5_ifc_set_rate_limit_out_bits {
7135 u8 status[0x8];
7136 u8 reserved_at_8[0x18];
7137
7138 u8 syndrome[0x20];
7139
7140 u8 reserved_at_40[0x40];
7141};
7142
7143struct mlx5_ifc_set_rate_limit_in_bits {
7144 u8 opcode[0x10];
7145 u8 reserved_at_10[0x10];
7146
7147 u8 reserved_at_20[0x10];
7148 u8 op_mod[0x10];
7149
7150 u8 reserved_at_40[0x10];
7151 u8 rate_limit_index[0x10];
7152
7153 u8 reserved_at_60[0x20];
7154
7155 u8 rate_limit[0x20];
7156};
7157
Saeed Mahameede2816822015-05-28 22:28:40 +03007158struct mlx5_ifc_access_register_out_bits {
7159 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007160 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007161
7162 u8 syndrome[0x20];
7163
Matan Barakb4ff3a32016-02-09 14:57:42 +02007164 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007165
7166 u8 register_data[0][0x20];
7167};
7168
7169enum {
7170 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7171 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7172};
7173
7174struct mlx5_ifc_access_register_in_bits {
7175 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007176 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007177
Matan Barakb4ff3a32016-02-09 14:57:42 +02007178 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007179 u8 op_mod[0x10];
7180
Matan Barakb4ff3a32016-02-09 14:57:42 +02007181 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007182 u8 register_id[0x10];
7183
7184 u8 argument[0x20];
7185
7186 u8 register_data[0][0x20];
7187};
7188
7189struct mlx5_ifc_sltp_reg_bits {
7190 u8 status[0x4];
7191 u8 version[0x4];
7192 u8 local_port[0x8];
7193 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007194 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007195 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007196 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007197
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199
Matan Barakb4ff3a32016-02-09 14:57:42 +02007200 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007201 u8 polarity[0x1];
7202 u8 ob_tap0[0x8];
7203 u8 ob_tap1[0x8];
7204 u8 ob_tap2[0x8];
7205
Matan Barakb4ff3a32016-02-09 14:57:42 +02007206 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007207 u8 ob_preemp_mode[0x4];
7208 u8 ob_reg[0x8];
7209 u8 ob_bias[0x8];
7210
Matan Barakb4ff3a32016-02-09 14:57:42 +02007211 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007212};
7213
7214struct mlx5_ifc_slrg_reg_bits {
7215 u8 status[0x4];
7216 u8 version[0x4];
7217 u8 local_port[0x8];
7218 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007219 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007220 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007221 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007222
7223 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007224 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007225 u8 grade_lane_speed[0x4];
7226
7227 u8 grade_version[0x8];
7228 u8 grade[0x18];
7229
Matan Barakb4ff3a32016-02-09 14:57:42 +02007230 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007231 u8 height_grade_type[0x4];
7232 u8 height_grade[0x18];
7233
7234 u8 height_dz[0x10];
7235 u8 height_dv[0x10];
7236
Matan Barakb4ff3a32016-02-09 14:57:42 +02007237 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007238 u8 height_sigma[0x10];
7239
Matan Barakb4ff3a32016-02-09 14:57:42 +02007240 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007241
Matan Barakb4ff3a32016-02-09 14:57:42 +02007242 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007243 u8 phase_grade_type[0x4];
7244 u8 phase_grade[0x18];
7245
Matan Barakb4ff3a32016-02-09 14:57:42 +02007246 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007247 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007248 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007249 u8 phase_eo_neg[0x8];
7250
7251 u8 ffe_set_tested[0x10];
7252 u8 test_errors_per_lane[0x10];
7253};
7254
7255struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007256 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007257 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007258 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007259
Matan Barakb4ff3a32016-02-09 14:57:42 +02007260 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007261 u8 vl_hw_cap[0x4];
7262
Matan Barakb4ff3a32016-02-09 14:57:42 +02007263 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007264 u8 vl_admin[0x4];
7265
Matan Barakb4ff3a32016-02-09 14:57:42 +02007266 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007267 u8 vl_operational[0x4];
7268};
7269
7270struct mlx5_ifc_pude_reg_bits {
7271 u8 swid[0x8];
7272 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007273 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007274 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007275 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007276 u8 oper_status[0x4];
7277
Matan Barakb4ff3a32016-02-09 14:57:42 +02007278 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007279};
7280
7281struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007282 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007283 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007284 u8 an_disable_cap[0x1];
7285 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007286 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007287 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007288 u8 proto_mask[0x3];
7289
Saeed Mahameed74862162016-06-09 15:11:34 +03007290 u8 an_status[0x4];
7291 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007292
7293 u8 eth_proto_capability[0x20];
7294
7295 u8 ib_link_width_capability[0x10];
7296 u8 ib_proto_capability[0x10];
7297
Matan Barakb4ff3a32016-02-09 14:57:42 +02007298 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007299
7300 u8 eth_proto_admin[0x20];
7301
7302 u8 ib_link_width_admin[0x10];
7303 u8 ib_proto_admin[0x10];
7304
Matan Barakb4ff3a32016-02-09 14:57:42 +02007305 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007306
7307 u8 eth_proto_oper[0x20];
7308
7309 u8 ib_link_width_oper[0x10];
7310 u8 ib_proto_oper[0x10];
7311
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007312 u8 reserved_at_160[0x1c];
7313 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007314
7315 u8 eth_proto_lp_advertise[0x20];
7316
Matan Barakb4ff3a32016-02-09 14:57:42 +02007317 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007318};
7319
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007320struct mlx5_ifc_mlcr_reg_bits {
7321 u8 reserved_at_0[0x8];
7322 u8 local_port[0x8];
7323 u8 reserved_at_10[0x20];
7324
7325 u8 beacon_duration[0x10];
7326 u8 reserved_at_40[0x10];
7327
7328 u8 beacon_remain[0x10];
7329};
7330
Saeed Mahameede2816822015-05-28 22:28:40 +03007331struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007332 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007333
7334 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007335 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007336 u8 repetitions_mode[0x4];
7337 u8 num_of_repetitions[0x8];
7338
7339 u8 grade_version[0x8];
7340 u8 height_grade_type[0x4];
7341 u8 phase_grade_type[0x4];
7342 u8 height_grade_weight[0x8];
7343 u8 phase_grade_weight[0x8];
7344
7345 u8 gisim_measure_bits[0x10];
7346 u8 adaptive_tap_measure_bits[0x10];
7347
7348 u8 ber_bath_high_error_threshold[0x10];
7349 u8 ber_bath_mid_error_threshold[0x10];
7350
7351 u8 ber_bath_low_error_threshold[0x10];
7352 u8 one_ratio_high_threshold[0x10];
7353
7354 u8 one_ratio_high_mid_threshold[0x10];
7355 u8 one_ratio_low_mid_threshold[0x10];
7356
7357 u8 one_ratio_low_threshold[0x10];
7358 u8 ndeo_error_threshold[0x10];
7359
7360 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007361 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007362 u8 mix90_phase_for_voltage_bath[0x8];
7363
7364 u8 mixer_offset_start[0x10];
7365 u8 mixer_offset_end[0x10];
7366
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368 u8 ber_test_time[0xb];
7369};
7370
7371struct mlx5_ifc_pspa_reg_bits {
7372 u8 swid[0x8];
7373 u8 local_port[0x8];
7374 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007375 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007376
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378};
7379
7380struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007381 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007382 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007383 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007384 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386 u8 mode[0x2];
7387
Matan Barakb4ff3a32016-02-09 14:57:42 +02007388 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007389
Matan Barakb4ff3a32016-02-09 14:57:42 +02007390 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007391 u8 min_threshold[0x10];
7392
Matan Barakb4ff3a32016-02-09 14:57:42 +02007393 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007394 u8 max_threshold[0x10];
7395
Matan Barakb4ff3a32016-02-09 14:57:42 +02007396 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007397 u8 mark_probability_denominator[0x10];
7398
Matan Barakb4ff3a32016-02-09 14:57:42 +02007399 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007400};
7401
7402struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007403 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007404 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007405 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007406
Matan Barakb4ff3a32016-02-09 14:57:42 +02007407 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007408
Matan Barakb4ff3a32016-02-09 14:57:42 +02007409 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007410 u8 wrps_admin[0x4];
7411
Matan Barakb4ff3a32016-02-09 14:57:42 +02007412 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007413 u8 wrps_status[0x4];
7414
Matan Barakb4ff3a32016-02-09 14:57:42 +02007415 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007416 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007417 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007418 u8 down_threshold[0x8];
7419
Matan Barakb4ff3a32016-02-09 14:57:42 +02007420 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007421
Matan Barakb4ff3a32016-02-09 14:57:42 +02007422 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007423 u8 srps_admin[0x4];
7424
Matan Barakb4ff3a32016-02-09 14:57:42 +02007425 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007426 u8 srps_status[0x4];
7427
Matan Barakb4ff3a32016-02-09 14:57:42 +02007428 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007429};
7430
7431struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007432 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007433 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007434 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007435
Matan Barakb4ff3a32016-02-09 14:57:42 +02007436 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007437 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007438 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007439 u8 lb_en[0x8];
7440};
7441
7442struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007443 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007444 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007445 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007446
Matan Barakb4ff3a32016-02-09 14:57:42 +02007447 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007448
7449 u8 port_profile_mode[0x8];
7450 u8 static_port_profile[0x8];
7451 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007452 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007453
7454 u8 retransmission_active[0x8];
7455 u8 fec_mode_active[0x18];
7456
Matan Barakb4ff3a32016-02-09 14:57:42 +02007457 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007458};
7459
7460struct mlx5_ifc_ppcnt_reg_bits {
7461 u8 swid[0x8];
7462 u8 local_port[0x8];
7463 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007464 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007465 u8 grp[0x6];
7466
7467 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469 u8 prio_tc[0x3];
7470
7471 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7472};
7473
Gal Pressman8ed1a632016-11-17 13:46:01 +02007474struct mlx5_ifc_mpcnt_reg_bits {
7475 u8 reserved_at_0[0x8];
7476 u8 pcie_index[0x8];
7477 u8 reserved_at_10[0xa];
7478 u8 grp[0x6];
7479
7480 u8 clr[0x1];
7481 u8 reserved_at_21[0x1f];
7482
7483 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7484};
7485
Saeed Mahameede2816822015-05-28 22:28:40 +03007486struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007487 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007488 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007489 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007490 u8 local_port[0x8];
7491 u8 mac_47_32[0x10];
7492
7493 u8 mac_31_0[0x20];
7494
Matan Barakb4ff3a32016-02-09 14:57:42 +02007495 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007496};
7497
7498struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007499 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007500 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007501 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007502
7503 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007504 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505
7506 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508
7509 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511};
7512
7513struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007514 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007515 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007516 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007517
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519 u8 attenuation_5g[0x8];
7520
Matan Barakb4ff3a32016-02-09 14:57:42 +02007521 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007522 u8 attenuation_7g[0x8];
7523
Matan Barakb4ff3a32016-02-09 14:57:42 +02007524 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007525 u8 attenuation_12g[0x8];
7526};
7527
7528struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007529 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007530 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007531 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007532 u8 module_status[0x4];
7533
Matan Barakb4ff3a32016-02-09 14:57:42 +02007534 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007535};
7536
7537struct mlx5_ifc_pmpc_reg_bits {
7538 u8 module_state_updated[32][0x8];
7539};
7540
7541struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007542 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007543 u8 mlpn_status[0x4];
7544 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007545 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007546
7547 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549};
7550
7551struct mlx5_ifc_pmlp_reg_bits {
7552 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007553 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007554 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007555 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007556 u8 width[0x8];
7557
7558 u8 lane0_module_mapping[0x20];
7559
7560 u8 lane1_module_mapping[0x20];
7561
7562 u8 lane2_module_mapping[0x20];
7563
7564 u8 lane3_module_mapping[0x20];
7565
Matan Barakb4ff3a32016-02-09 14:57:42 +02007566 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007567};
7568
7569struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007570 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007571 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007572 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007573 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575 u8 oper_status[0x4];
7576
7577 u8 ase[0x1];
7578 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007579 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007580 u8 e[0x2];
7581
Matan Barakb4ff3a32016-02-09 14:57:42 +02007582 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007583};
7584
7585struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007586 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007587 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007588 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007589 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007590 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007591
Matan Barakb4ff3a32016-02-09 14:57:42 +02007592 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007593 u8 lane_speed[0x10];
7594
Matan Barakb4ff3a32016-02-09 14:57:42 +02007595 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007596 u8 lpbf[0x1];
7597 u8 fec_mode_policy[0x8];
7598
7599 u8 retransmission_capability[0x8];
7600 u8 fec_mode_capability[0x18];
7601
7602 u8 retransmission_support_admin[0x8];
7603 u8 fec_mode_support_admin[0x18];
7604
7605 u8 retransmission_request_admin[0x8];
7606 u8 fec_mode_request_admin[0x18];
7607
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609};
7610
7611struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007612 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007613 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007614 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007615 u8 ib_port[0x8];
7616
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618};
7619
7620struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007623 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007624 u8 lbf_mode[0x3];
7625
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627};
7628
7629struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007630 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007631 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007632 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007633
7634 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007635 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007636 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638};
7639
7640struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007643 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007644
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646
7647 u8 port_filter[8][0x20];
7648
7649 u8 port_filter_update_en[8][0x20];
7650};
7651
7652struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007653 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007654 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656
7657 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661 u8 prio_mask_rx[0x8];
7662
7663 u8 pptx[0x1];
7664 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007667 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007668
7669 u8 pprx[0x1];
7670 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007671 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007672 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007673 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007674
Matan Barakb4ff3a32016-02-09 14:57:42 +02007675 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007676};
7677
7678struct mlx5_ifc_pelc_reg_bits {
7679 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683
7684 u8 op_admin[0x8];
7685 u8 op_capability[0x8];
7686 u8 op_request[0x8];
7687 u8 op_active[0x8];
7688
7689 u8 admin[0x40];
7690
7691 u8 capability[0x40];
7692
7693 u8 request[0x40];
7694
7695 u8 active[0x40];
7696
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698};
7699
7700struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007701 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007702 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007703 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007704
Matan Barakb4ff3a32016-02-09 14:57:42 +02007705 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007706 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007707 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007708
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007711 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007712 u8 error_type[0x8];
7713};
7714
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007715struct mlx5_ifc_pcam_enhanced_features_bits {
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007716 u8 reserved_at_0[0x7c];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007717
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007718 u8 ptys_connector_type[0x1];
7719 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007720 u8 ppcnt_discard_group[0x1];
7721 u8 ppcnt_statistical_group[0x1];
7722};
7723
7724struct mlx5_ifc_pcam_reg_bits {
7725 u8 reserved_at_0[0x8];
7726 u8 feature_group[0x8];
7727 u8 reserved_at_10[0x8];
7728 u8 access_reg_group[0x8];
7729
7730 u8 reserved_at_20[0x20];
7731
7732 union {
7733 u8 reserved_at_0[0x80];
7734 } port_access_reg_cap_mask;
7735
7736 u8 reserved_at_c0[0x80];
7737
7738 union {
7739 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7740 u8 reserved_at_0[0x80];
7741 } feature_cap_mask;
7742
7743 u8 reserved_at_1c0[0xc0];
7744};
7745
7746struct mlx5_ifc_mcam_enhanced_features_bits {
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007747 u8 reserved_at_0[0x7d];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007748
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007749 u8 mtpps_enh_out_per_adj[0x1];
7750 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007751 u8 pcie_performance_group[0x1];
7752};
7753
Or Gerlitz0ab87742017-06-11 15:25:38 +03007754struct mlx5_ifc_mcam_access_reg_bits {
7755 u8 reserved_at_0[0x1c];
7756 u8 mcda[0x1];
7757 u8 mcc[0x1];
7758 u8 mcqi[0x1];
7759 u8 reserved_at_1f[0x1];
7760
7761 u8 regs_95_to_64[0x20];
7762 u8 regs_63_to_32[0x20];
7763 u8 regs_31_to_0[0x20];
7764};
7765
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007766struct mlx5_ifc_mcam_reg_bits {
7767 u8 reserved_at_0[0x8];
7768 u8 feature_group[0x8];
7769 u8 reserved_at_10[0x8];
7770 u8 access_reg_group[0x8];
7771
7772 u8 reserved_at_20[0x20];
7773
7774 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007775 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007776 u8 reserved_at_0[0x80];
7777 } mng_access_reg_cap_mask;
7778
7779 u8 reserved_at_c0[0x80];
7780
7781 union {
7782 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7783 u8 reserved_at_0[0x80];
7784 } mng_feature_cap_mask;
7785
7786 u8 reserved_at_1c0[0x80];
7787};
7788
Saeed Mahameede2816822015-05-28 22:28:40 +03007789struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007790 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007791 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007792 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007793
7794 u8 port_capability_mask[4][0x20];
7795};
7796
7797struct mlx5_ifc_paos_reg_bits {
7798 u8 swid[0x8];
7799 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007800 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007801 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007802 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007803 u8 oper_status[0x4];
7804
7805 u8 ase[0x1];
7806 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007807 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007808 u8 e[0x2];
7809
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811};
7812
7813struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817 u8 opamp_group_type[0x4];
7818
7819 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007820 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007821 u8 num_of_indices[0xc];
7822
7823 u8 index_data[18][0x10];
7824};
7825
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007826struct mlx5_ifc_pcmr_reg_bits {
7827 u8 reserved_at_0[0x8];
7828 u8 local_port[0x8];
7829 u8 reserved_at_10[0x2e];
7830 u8 fcs_cap[0x1];
7831 u8 reserved_at_3f[0x1f];
7832 u8 fcs_chk[0x1];
7833 u8 reserved_at_5f[0x1];
7834};
7835
Saeed Mahameede2816822015-05-28 22:28:40 +03007836struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007837 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007838 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007839 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007840 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007841 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007842 u8 module[0x8];
7843};
7844
7845struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847 u8 lossy[0x1];
7848 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007849 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007850 u8 size[0xc];
7851
7852 u8 xoff_threshold[0x10];
7853 u8 xon_threshold[0x10];
7854};
7855
7856struct mlx5_ifc_set_node_in_bits {
7857 u8 node_description[64][0x8];
7858};
7859
7860struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007861 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007862 u8 power_settings_level[0x8];
7863
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865};
7866
7867struct mlx5_ifc_register_host_endianness_bits {
7868 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007869 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007870
Matan Barakb4ff3a32016-02-09 14:57:42 +02007871 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007872};
7873
7874struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007875 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007876
7877 u8 mkey[0x20];
7878
7879 u8 addressh_63_32[0x20];
7880
7881 u8 addressl_31_0[0x20];
7882};
7883
7884struct mlx5_ifc_ud_adrs_vector_bits {
7885 u8 dc_key[0x40];
7886
7887 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007888 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007889 u8 destination_qp_dct[0x18];
7890
7891 u8 static_rate[0x4];
7892 u8 sl_eth_prio[0x4];
7893 u8 fl[0x1];
7894 u8 mlid[0x7];
7895 u8 rlid_udp_sport[0x10];
7896
Matan Barakb4ff3a32016-02-09 14:57:42 +02007897 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007898
7899 u8 rmac_47_16[0x20];
7900
7901 u8 rmac_15_0[0x10];
7902 u8 tclass[0x8];
7903 u8 hop_limit[0x8];
7904
Matan Barakb4ff3a32016-02-09 14:57:42 +02007905 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007906 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007907 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007908 u8 src_addr_index[0x8];
7909 u8 flow_label[0x14];
7910
7911 u8 rgid_rip[16][0x8];
7912};
7913
7914struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007915 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007916 u8 function_id[0x10];
7917
7918 u8 num_pages[0x20];
7919
Matan Barakb4ff3a32016-02-09 14:57:42 +02007920 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007921};
7922
7923struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007924 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007925 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007926 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007927 u8 event_sub_type[0x8];
7928
Matan Barakb4ff3a32016-02-09 14:57:42 +02007929 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007930
7931 union mlx5_ifc_event_auto_bits event_data;
7932
Matan Barakb4ff3a32016-02-09 14:57:42 +02007933 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007934 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007935 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007936 u8 owner[0x1];
7937};
7938
7939enum {
7940 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7941};
7942
7943struct mlx5_ifc_cmd_queue_entry_bits {
7944 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007945 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007946
7947 u8 input_length[0x20];
7948
7949 u8 input_mailbox_pointer_63_32[0x20];
7950
7951 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007952 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007953
7954 u8 command_input_inline_data[16][0x8];
7955
7956 u8 command_output_inline_data[16][0x8];
7957
7958 u8 output_mailbox_pointer_63_32[0x20];
7959
7960 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007961 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007962
7963 u8 output_length[0x20];
7964
7965 u8 token[0x8];
7966 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007967 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007968 u8 status[0x7];
7969 u8 ownership[0x1];
7970};
7971
7972struct mlx5_ifc_cmd_out_bits {
7973 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007974 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007975
7976 u8 syndrome[0x20];
7977
7978 u8 command_output[0x20];
7979};
7980
7981struct mlx5_ifc_cmd_in_bits {
7982 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007983 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007984
Matan Barakb4ff3a32016-02-09 14:57:42 +02007985 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007986 u8 op_mod[0x10];
7987
7988 u8 command[0][0x20];
7989};
7990
7991struct mlx5_ifc_cmd_if_box_bits {
7992 u8 mailbox_data[512][0x8];
7993
Matan Barakb4ff3a32016-02-09 14:57:42 +02007994 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007995
7996 u8 next_pointer_63_32[0x20];
7997
7998 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007999 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008000
8001 u8 block_number[0x20];
8002
Matan Barakb4ff3a32016-02-09 14:57:42 +02008003 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008004 u8 token[0x8];
8005 u8 ctrl_signature[0x8];
8006 u8 signature[0x8];
8007};
8008
8009struct mlx5_ifc_mtt_bits {
8010 u8 ptag_63_32[0x20];
8011
8012 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008013 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008014 u8 wr_en[0x1];
8015 u8 rd_en[0x1];
8016};
8017
Tariq Toukan928cfe82016-02-22 18:17:29 +02008018struct mlx5_ifc_query_wol_rol_out_bits {
8019 u8 status[0x8];
8020 u8 reserved_at_8[0x18];
8021
8022 u8 syndrome[0x20];
8023
8024 u8 reserved_at_40[0x10];
8025 u8 rol_mode[0x8];
8026 u8 wol_mode[0x8];
8027
8028 u8 reserved_at_60[0x20];
8029};
8030
8031struct mlx5_ifc_query_wol_rol_in_bits {
8032 u8 opcode[0x10];
8033 u8 reserved_at_10[0x10];
8034
8035 u8 reserved_at_20[0x10];
8036 u8 op_mod[0x10];
8037
8038 u8 reserved_at_40[0x40];
8039};
8040
8041struct mlx5_ifc_set_wol_rol_out_bits {
8042 u8 status[0x8];
8043 u8 reserved_at_8[0x18];
8044
8045 u8 syndrome[0x20];
8046
8047 u8 reserved_at_40[0x40];
8048};
8049
8050struct mlx5_ifc_set_wol_rol_in_bits {
8051 u8 opcode[0x10];
8052 u8 reserved_at_10[0x10];
8053
8054 u8 reserved_at_20[0x10];
8055 u8 op_mod[0x10];
8056
8057 u8 rol_mode_valid[0x1];
8058 u8 wol_mode_valid[0x1];
8059 u8 reserved_at_42[0xe];
8060 u8 rol_mode[0x8];
8061 u8 wol_mode[0x8];
8062
8063 u8 reserved_at_60[0x20];
8064};
8065
Saeed Mahameede2816822015-05-28 22:28:40 +03008066enum {
8067 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8068 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8069 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8070};
8071
8072enum {
8073 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8074 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8075 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8076};
8077
8078enum {
8079 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8080 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8081 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8082 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8083 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8084 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8085 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8086 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8087 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8088 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8089 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8090};
8091
8092struct mlx5_ifc_initial_seg_bits {
8093 u8 fw_rev_minor[0x10];
8094 u8 fw_rev_major[0x10];
8095
8096 u8 cmd_interface_rev[0x10];
8097 u8 fw_rev_subminor[0x10];
8098
Matan Barakb4ff3a32016-02-09 14:57:42 +02008099 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008100
8101 u8 cmdq_phy_addr_63_32[0x20];
8102
8103 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008104 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008105 u8 nic_interface[0x2];
8106 u8 log_cmdq_size[0x4];
8107 u8 log_cmdq_stride[0x4];
8108
8109 u8 command_doorbell_vector[0x20];
8110
Matan Barakb4ff3a32016-02-09 14:57:42 +02008111 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008112
8113 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008114 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008115 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008116 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008117
8118 struct mlx5_ifc_health_buffer_bits health_buffer;
8119
8120 u8 no_dram_nic_offset[0x20];
8121
Matan Barakb4ff3a32016-02-09 14:57:42 +02008122 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008123
Matan Barakb4ff3a32016-02-09 14:57:42 +02008124 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008125 u8 clear_int[0x1];
8126
8127 u8 health_syndrome[0x8];
8128 u8 health_counter[0x18];
8129
Matan Barakb4ff3a32016-02-09 14:57:42 +02008130 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008131};
8132
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008133struct mlx5_ifc_mtpps_reg_bits {
8134 u8 reserved_at_0[0xc];
8135 u8 cap_number_of_pps_pins[0x4];
8136 u8 reserved_at_10[0x4];
8137 u8 cap_max_num_of_pps_in_pins[0x4];
8138 u8 reserved_at_18[0x4];
8139 u8 cap_max_num_of_pps_out_pins[0x4];
8140
8141 u8 reserved_at_20[0x24];
8142 u8 cap_pin_3_mode[0x4];
8143 u8 reserved_at_48[0x4];
8144 u8 cap_pin_2_mode[0x4];
8145 u8 reserved_at_50[0x4];
8146 u8 cap_pin_1_mode[0x4];
8147 u8 reserved_at_58[0x4];
8148 u8 cap_pin_0_mode[0x4];
8149
8150 u8 reserved_at_60[0x4];
8151 u8 cap_pin_7_mode[0x4];
8152 u8 reserved_at_68[0x4];
8153 u8 cap_pin_6_mode[0x4];
8154 u8 reserved_at_70[0x4];
8155 u8 cap_pin_5_mode[0x4];
8156 u8 reserved_at_78[0x4];
8157 u8 cap_pin_4_mode[0x4];
8158
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008159 u8 field_select[0x20];
8160 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008161
8162 u8 enable[0x1];
8163 u8 reserved_at_101[0xb];
8164 u8 pattern[0x4];
8165 u8 reserved_at_110[0x4];
8166 u8 pin_mode[0x4];
8167 u8 pin[0x8];
8168
8169 u8 reserved_at_120[0x20];
8170
8171 u8 time_stamp[0x40];
8172
8173 u8 out_pulse_duration[0x10];
8174 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008175 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008176
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008177 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008178};
8179
8180struct mlx5_ifc_mtppse_reg_bits {
8181 u8 reserved_at_0[0x18];
8182 u8 pin[0x8];
8183 u8 event_arm[0x1];
8184 u8 reserved_at_21[0x1b];
8185 u8 event_generation_mode[0x4];
8186 u8 reserved_at_40[0x40];
8187};
8188
Or Gerlitz47176282017-04-18 13:35:39 +03008189struct mlx5_ifc_mcqi_cap_bits {
8190 u8 supported_info_bitmask[0x20];
8191
8192 u8 component_size[0x20];
8193
8194 u8 max_component_size[0x20];
8195
8196 u8 log_mcda_word_size[0x4];
8197 u8 reserved_at_64[0xc];
8198 u8 mcda_max_write_size[0x10];
8199
8200 u8 rd_en[0x1];
8201 u8 reserved_at_81[0x1];
8202 u8 match_chip_id[0x1];
8203 u8 match_psid[0x1];
8204 u8 check_user_timestamp[0x1];
8205 u8 match_base_guid_mac[0x1];
8206 u8 reserved_at_86[0x1a];
8207};
8208
8209struct mlx5_ifc_mcqi_reg_bits {
8210 u8 read_pending_component[0x1];
8211 u8 reserved_at_1[0xf];
8212 u8 component_index[0x10];
8213
8214 u8 reserved_at_20[0x20];
8215
8216 u8 reserved_at_40[0x1b];
8217 u8 info_type[0x5];
8218
8219 u8 info_size[0x20];
8220
8221 u8 offset[0x20];
8222
8223 u8 reserved_at_a0[0x10];
8224 u8 data_size[0x10];
8225
8226 u8 data[0][0x20];
8227};
8228
8229struct mlx5_ifc_mcc_reg_bits {
8230 u8 reserved_at_0[0x4];
8231 u8 time_elapsed_since_last_cmd[0xc];
8232 u8 reserved_at_10[0x8];
8233 u8 instruction[0x8];
8234
8235 u8 reserved_at_20[0x10];
8236 u8 component_index[0x10];
8237
8238 u8 reserved_at_40[0x8];
8239 u8 update_handle[0x18];
8240
8241 u8 handle_owner_type[0x4];
8242 u8 handle_owner_host_id[0x4];
8243 u8 reserved_at_68[0x1];
8244 u8 control_progress[0x7];
8245 u8 error_code[0x8];
8246 u8 reserved_at_78[0x4];
8247 u8 control_state[0x4];
8248
8249 u8 component_size[0x20];
8250
8251 u8 reserved_at_a0[0x60];
8252};
8253
8254struct mlx5_ifc_mcda_reg_bits {
8255 u8 reserved_at_0[0x8];
8256 u8 update_handle[0x18];
8257
8258 u8 offset[0x20];
8259
8260 u8 reserved_at_40[0x10];
8261 u8 size[0x10];
8262
8263 u8 reserved_at_60[0x20];
8264
8265 u8 data[0][0x20];
8266};
8267
Saeed Mahameede2816822015-05-28 22:28:40 +03008268union mlx5_ifc_ports_control_registers_document_bits {
8269 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8270 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8271 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8272 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8273 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8274 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8275 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8276 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8277 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8278 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8279 struct mlx5_ifc_paos_reg_bits paos_reg;
8280 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8281 struct mlx5_ifc_peir_reg_bits peir_reg;
8282 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8283 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008284 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008285 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8286 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8287 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8288 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8289 struct mlx5_ifc_plib_reg_bits plib_reg;
8290 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8291 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8292 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8293 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8294 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8295 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8296 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8297 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8298 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8299 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008300 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008301 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8302 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8303 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8304 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8305 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8306 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8307 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008308 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008309 struct mlx5_ifc_pude_reg_bits pude_reg;
8310 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8311 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8312 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008313 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8314 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008315 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008316 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8317 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008318 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8319 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8320 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008321 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008322};
8323
8324union mlx5_ifc_debug_enhancements_document_bits {
8325 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008326 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008327};
8328
8329union mlx5_ifc_uplink_pci_interface_document_bits {
8330 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008331 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008332};
8333
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008334struct mlx5_ifc_set_flow_table_root_out_bits {
8335 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008336 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008337
8338 u8 syndrome[0x20];
8339
Matan Barakb4ff3a32016-02-09 14:57:42 +02008340 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008341};
8342
8343struct mlx5_ifc_set_flow_table_root_in_bits {
8344 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008345 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008346
Matan Barakb4ff3a32016-02-09 14:57:42 +02008347 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008348 u8 op_mod[0x10];
8349
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008350 u8 other_vport[0x1];
8351 u8 reserved_at_41[0xf];
8352 u8 vport_number[0x10];
8353
8354 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008355
8356 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008357 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008358
Matan Barakb4ff3a32016-02-09 14:57:42 +02008359 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008360 u8 table_id[0x18];
8361
Erez Shitrit500a3d02017-04-13 06:36:51 +03008362 u8 reserved_at_c0[0x8];
8363 u8 underlay_qpn[0x18];
8364 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008365};
8366
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008367enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008368 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8369 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008370};
8371
8372struct mlx5_ifc_modify_flow_table_out_bits {
8373 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008374 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008375
8376 u8 syndrome[0x20];
8377
Matan Barakb4ff3a32016-02-09 14:57:42 +02008378 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008379};
8380
8381struct mlx5_ifc_modify_flow_table_in_bits {
8382 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008383 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008384
Matan Barakb4ff3a32016-02-09 14:57:42 +02008385 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008386 u8 op_mod[0x10];
8387
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008388 u8 other_vport[0x1];
8389 u8 reserved_at_41[0xf];
8390 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008391
Matan Barakb4ff3a32016-02-09 14:57:42 +02008392 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008393 u8 modify_field_select[0x10];
8394
8395 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008396 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008397
Matan Barakb4ff3a32016-02-09 14:57:42 +02008398 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008399 u8 table_id[0x18];
8400
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008401 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008402};
8403
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008404struct mlx5_ifc_ets_tcn_config_reg_bits {
8405 u8 g[0x1];
8406 u8 b[0x1];
8407 u8 r[0x1];
8408 u8 reserved_at_3[0x9];
8409 u8 group[0x4];
8410 u8 reserved_at_10[0x9];
8411 u8 bw_allocation[0x7];
8412
8413 u8 reserved_at_20[0xc];
8414 u8 max_bw_units[0x4];
8415 u8 reserved_at_30[0x8];
8416 u8 max_bw_value[0x8];
8417};
8418
8419struct mlx5_ifc_ets_global_config_reg_bits {
8420 u8 reserved_at_0[0x2];
8421 u8 r[0x1];
8422 u8 reserved_at_3[0x1d];
8423
8424 u8 reserved_at_20[0xc];
8425 u8 max_bw_units[0x4];
8426 u8 reserved_at_30[0x8];
8427 u8 max_bw_value[0x8];
8428};
8429
8430struct mlx5_ifc_qetc_reg_bits {
8431 u8 reserved_at_0[0x8];
8432 u8 port_number[0x8];
8433 u8 reserved_at_10[0x30];
8434
8435 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8436 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8437};
8438
8439struct mlx5_ifc_qtct_reg_bits {
8440 u8 reserved_at_0[0x8];
8441 u8 port_number[0x8];
8442 u8 reserved_at_10[0xd];
8443 u8 prio[0x3];
8444
8445 u8 reserved_at_20[0x1d];
8446 u8 tclass[0x3];
8447};
8448
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008449struct mlx5_ifc_mcia_reg_bits {
8450 u8 l[0x1];
8451 u8 reserved_at_1[0x7];
8452 u8 module[0x8];
8453 u8 reserved_at_10[0x8];
8454 u8 status[0x8];
8455
8456 u8 i2c_device_address[0x8];
8457 u8 page_number[0x8];
8458 u8 device_address[0x10];
8459
8460 u8 reserved_at_40[0x10];
8461 u8 size[0x10];
8462
8463 u8 reserved_at_60[0x20];
8464
8465 u8 dword_0[0x20];
8466 u8 dword_1[0x20];
8467 u8 dword_2[0x20];
8468 u8 dword_3[0x20];
8469 u8 dword_4[0x20];
8470 u8 dword_5[0x20];
8471 u8 dword_6[0x20];
8472 u8 dword_7[0x20];
8473 u8 dword_8[0x20];
8474 u8 dword_9[0x20];
8475 u8 dword_10[0x20];
8476 u8 dword_11[0x20];
8477};
8478
Saeed Mahameed74862162016-06-09 15:11:34 +03008479struct mlx5_ifc_dcbx_param_bits {
8480 u8 dcbx_cee_cap[0x1];
8481 u8 dcbx_ieee_cap[0x1];
8482 u8 dcbx_standby_cap[0x1];
8483 u8 reserved_at_0[0x5];
8484 u8 port_number[0x8];
8485 u8 reserved_at_10[0xa];
8486 u8 max_application_table_size[6];
8487 u8 reserved_at_20[0x15];
8488 u8 version_oper[0x3];
8489 u8 reserved_at_38[5];
8490 u8 version_admin[0x3];
8491 u8 willing_admin[0x1];
8492 u8 reserved_at_41[0x3];
8493 u8 pfc_cap_oper[0x4];
8494 u8 reserved_at_48[0x4];
8495 u8 pfc_cap_admin[0x4];
8496 u8 reserved_at_50[0x4];
8497 u8 num_of_tc_oper[0x4];
8498 u8 reserved_at_58[0x4];
8499 u8 num_of_tc_admin[0x4];
8500 u8 remote_willing[0x1];
8501 u8 reserved_at_61[3];
8502 u8 remote_pfc_cap[4];
8503 u8 reserved_at_68[0x14];
8504 u8 remote_num_of_tc[0x4];
8505 u8 reserved_at_80[0x18];
8506 u8 error[0x8];
8507 u8 reserved_at_a0[0x160];
8508};
Aviv Heller84df61e2016-05-10 13:47:50 +03008509
8510struct mlx5_ifc_lagc_bits {
8511 u8 reserved_at_0[0x1d];
8512 u8 lag_state[0x3];
8513
8514 u8 reserved_at_20[0x14];
8515 u8 tx_remap_affinity_2[0x4];
8516 u8 reserved_at_38[0x4];
8517 u8 tx_remap_affinity_1[0x4];
8518};
8519
8520struct mlx5_ifc_create_lag_out_bits {
8521 u8 status[0x8];
8522 u8 reserved_at_8[0x18];
8523
8524 u8 syndrome[0x20];
8525
8526 u8 reserved_at_40[0x40];
8527};
8528
8529struct mlx5_ifc_create_lag_in_bits {
8530 u8 opcode[0x10];
8531 u8 reserved_at_10[0x10];
8532
8533 u8 reserved_at_20[0x10];
8534 u8 op_mod[0x10];
8535
8536 struct mlx5_ifc_lagc_bits ctx;
8537};
8538
8539struct mlx5_ifc_modify_lag_out_bits {
8540 u8 status[0x8];
8541 u8 reserved_at_8[0x18];
8542
8543 u8 syndrome[0x20];
8544
8545 u8 reserved_at_40[0x40];
8546};
8547
8548struct mlx5_ifc_modify_lag_in_bits {
8549 u8 opcode[0x10];
8550 u8 reserved_at_10[0x10];
8551
8552 u8 reserved_at_20[0x10];
8553 u8 op_mod[0x10];
8554
8555 u8 reserved_at_40[0x20];
8556 u8 field_select[0x20];
8557
8558 struct mlx5_ifc_lagc_bits ctx;
8559};
8560
8561struct mlx5_ifc_query_lag_out_bits {
8562 u8 status[0x8];
8563 u8 reserved_at_8[0x18];
8564
8565 u8 syndrome[0x20];
8566
8567 u8 reserved_at_40[0x40];
8568
8569 struct mlx5_ifc_lagc_bits ctx;
8570};
8571
8572struct mlx5_ifc_query_lag_in_bits {
8573 u8 opcode[0x10];
8574 u8 reserved_at_10[0x10];
8575
8576 u8 reserved_at_20[0x10];
8577 u8 op_mod[0x10];
8578
8579 u8 reserved_at_40[0x40];
8580};
8581
8582struct mlx5_ifc_destroy_lag_out_bits {
8583 u8 status[0x8];
8584 u8 reserved_at_8[0x18];
8585
8586 u8 syndrome[0x20];
8587
8588 u8 reserved_at_40[0x40];
8589};
8590
8591struct mlx5_ifc_destroy_lag_in_bits {
8592 u8 opcode[0x10];
8593 u8 reserved_at_10[0x10];
8594
8595 u8 reserved_at_20[0x10];
8596 u8 op_mod[0x10];
8597
8598 u8 reserved_at_40[0x40];
8599};
8600
8601struct mlx5_ifc_create_vport_lag_out_bits {
8602 u8 status[0x8];
8603 u8 reserved_at_8[0x18];
8604
8605 u8 syndrome[0x20];
8606
8607 u8 reserved_at_40[0x40];
8608};
8609
8610struct mlx5_ifc_create_vport_lag_in_bits {
8611 u8 opcode[0x10];
8612 u8 reserved_at_10[0x10];
8613
8614 u8 reserved_at_20[0x10];
8615 u8 op_mod[0x10];
8616
8617 u8 reserved_at_40[0x40];
8618};
8619
8620struct mlx5_ifc_destroy_vport_lag_out_bits {
8621 u8 status[0x8];
8622 u8 reserved_at_8[0x18];
8623
8624 u8 syndrome[0x20];
8625
8626 u8 reserved_at_40[0x40];
8627};
8628
8629struct mlx5_ifc_destroy_vport_lag_in_bits {
8630 u8 opcode[0x10];
8631 u8 reserved_at_10[0x10];
8632
8633 u8 reserved_at_20[0x10];
8634 u8 op_mod[0x10];
8635
8636 u8 reserved_at_40[0x40];
8637};
8638
Eli Cohend29b7962014-10-02 12:19:43 +03008639#endif /* MLX5_IFC_H */