blob: 14df8cf49146f8ac2fe95f3f3d7ac84435c0da18 [file] [log] [blame]
Michael-Luke Jones0f185972006-12-16 23:04:05 +01001/*
2 * arch/arm/mach-ixp4xx/avila-pci.c
3 *
4 * Gateworks Avila board-level PCI initialization
5 *
6 * Author: Michael-Luke Jones <mlj28@cam.ac.uk>
7 *
8 * Based on ixdp-pci.c
9 * Copyright (C) 2002 Intel Corporation.
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
11 *
12 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/init.h>
23#include <linux/irq.h>
24#include <linux/delay.h>
Michael-Luke Jones0f185972006-12-16 23:04:05 +010025#include <asm/mach/pci.h>
26#include <asm/irq.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/hardware.h>
Michael-Luke Jones0f185972006-12-16 23:04:05 +010028#include <asm/mach-types.h>
29
Krzysztof HaƂasaec669692009-11-16 15:39:11 +010030#define AVILA_PCI_MAX_DEV 4
31#define LOFT_PCI_MAX_DEV 6
32#define AVILA_PCI_IRQ_LINES 4
33
34/* PCI controller GPIO to IRQ pin mappings */
35#define AVILA_PCI_INTA_PIN 11
36#define AVILA_PCI_INTB_PIN 10
37#define AVILA_PCI_INTC_PIN 9
38#define AVILA_PCI_INTD_PIN 8
39
40#define IRQ_AVILA_PCI_INTA IRQ_IXP4XX_GPIO11
41#define IRQ_AVILA_PCI_INTB IRQ_IXP4XX_GPIO10
42#define IRQ_AVILA_PCI_INTC IRQ_IXP4XX_GPIO9
43#define IRQ_AVILA_PCI_INTD IRQ_IXP4XX_GPIO8
44
Michael-Luke Jones0f185972006-12-16 23:04:05 +010045void __init avila_pci_preinit(void)
46{
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +010047 set_irq_type(IRQ_AVILA_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
48 set_irq_type(IRQ_AVILA_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
49 set_irq_type(IRQ_AVILA_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
50 set_irq_type(IRQ_AVILA_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
Michael-Luke Jones0f185972006-12-16 23:04:05 +010051
52 ixp4xx_pci_preinit();
53}
54
55static int __init avila_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
56{
57 static int pci_irq_table[AVILA_PCI_IRQ_LINES] = {
58 IRQ_AVILA_PCI_INTA,
59 IRQ_AVILA_PCI_INTB,
60 IRQ_AVILA_PCI_INTC,
61 IRQ_AVILA_PCI_INTD
62 };
63
64 int irq = -1;
65
66 if (slot >= 1 &&
67 slot <= (machine_is_loft() ? LOFT_PCI_MAX_DEV : AVILA_PCI_MAX_DEV) &&
68 pin >= 1 && pin <= AVILA_PCI_IRQ_LINES) {
69 irq = pci_irq_table[(slot + pin - 2) % 4];
70 }
71
72 return irq;
73}
74
75struct hw_pci avila_pci __initdata = {
76 .nr_controllers = 1,
77 .preinit = avila_pci_preinit,
78 .swizzle = pci_std_swizzle,
79 .setup = ixp4xx_setup,
80 .scan = ixp4xx_scan_bus,
81 .map_irq = avila_map_irq,
82};
83
84int __init avila_pci_init(void)
85{
86 if (machine_is_avila() || machine_is_loft())
87 pci_common_init(&avila_pci);
88 return 0;
89}
90
91subsys_initcall(avila_pci_init);
92