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Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +01001/*
2 * Copyright (C) 2013 STMicroelectronics (R&D) Limited
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/ {
9 clocks {
10 /*
11 * Fixed 30MHz oscillator input to SoC
12 */
Gabriel FERNANDEZed3593f2014-05-20 15:22:00 +020013 clk_sysin: clk-sysin {
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +010014 #clock-cells = <0>;
15 compatible = "fixed-clock";
16 clock-frequency = <30000000>;
17 };
18
19 /*
20 * ARM Peripheral clock for timers
21 */
22 arm_periph_clk: arm_periph_clk {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <500000000>;
26 };
27
28 /*
29 * Bootloader initialized system infrastructure clock for
30 * serial devices.
31 */
32 CLKS_ICN_REG_0: CLKS_ICN_REG_0 {
33 #clock-cells = <0>;
34 compatible = "fixed-clock";
35 clock-frequency = <100000000>;
36 };
Srinivas Kandagatlac80fe3352014-01-29 16:19:44 +000037
38 CLKS_GMAC0_PHY: clockgenA1@7 {
39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <25000000>;
42 clock-output-names = "CLKS_GMAC0_PHY";
43 };
44
45 CLKS_ETH1_PHY: clockgenA0@7 {
46 #clock-cells = <0>;
47 compatible = "fixed-clock";
48 clock-frequency = <25000000>;
49 clock-output-names = "CLKS_ETH1_PHY";
50 };
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +010051 };
52};