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R Sricharan6b5de092012-05-10 19:46:00 +05301/*
Sricharan Rfa63d032013-06-07 18:52:47 +05302 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
R Sricharan6b5de092012-05-10 19:46:00 +05303 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
Florian Vaussard98ef79572013-05-31 14:32:55 +020010#include "omap5.dtsi"
R Sricharan6b5de092012-05-10 19:46:00 +053011
12/ {
Sricharan Rfa63d032013-06-07 18:52:47 +053013 model = "TI OMAP5 uEVM board";
14 compatible = "ti,omap5-uevm", "ti,omap5";
R Sricharan6b5de092012-05-10 19:46:00 +053015
16 memory {
17 device_type = "memory";
Santosh Shilimkar03178c62013-01-18 11:43:16 +053018 reg = <0x80000000 0x7F000000>; /* 2032 MB */
R Sricharan6b5de092012-05-10 19:46:00 +053019 };
Balaji T K5dd18b02012-08-07 12:48:21 +053020
21 vmmcsd_fixed: fixedregulator-mmcsd {
22 compatible = "regulator-fixed";
23 regulator-name = "vmmcsd_fixed";
24 regulator-min-microvolt = <3000000>;
25 regulator-max-microvolt = <3000000>;
26 };
Sourav Poddar5449fbc2012-07-25 11:03:27 +053027
Roger Quadrosed7f8e82013-06-07 18:52:48 +053028 /* HS USB Port 2 RESET */
29 hsusb2_reset: hsusb2_reset_reg {
30 compatible = "regulator-fixed";
31 regulator-name = "hsusb2_reset";
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
34 gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
35 startup-delay-us = <70000>;
36 enable-active-high;
37 };
38
39 /* HS USB Host PHY on PORT 2 */
40 hsusb2_phy: hsusb2_phy {
41 compatible = "usb-nop-xceiv";
42 reset-supply = <&hsusb2_reset>;
43 };
44
45 /* HS USB Port 3 RESET */
46 hsusb3_reset: hsusb3_reset_reg {
47 compatible = "regulator-fixed";
48 regulator-name = "hsusb3_reset";
49 regulator-min-microvolt = <3300000>;
50 regulator-max-microvolt = <3300000>;
51 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
52 startup-delay-us = <70000>;
53 enable-active-high;
54 };
55
56 /* HS USB Host PHY on PORT 3 */
57 hsusb3_phy: hsusb3_phy {
58 compatible = "usb-nop-xceiv";
59 reset-supply = <&hsusb3_reset>;
60 };
61
Balaji T K5dd18b02012-08-07 12:48:21 +053062};
63
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030064&omap5_pmx_core {
65 pinctrl-names = "default";
66 pinctrl-0 = <
67 &twl6040_pins
68 &mcpdm_pins
69 &dmic_pins
70 &mcbsp1_pins
71 &mcbsp2_pins
Roger Quadrosed7f8e82013-06-07 18:52:48 +053072 &usbhost_pins
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030073 >;
74
75 twl6040_pins: pinmux_twl6040_pins {
76 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020077 0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030078 >;
79 };
80
81 mcpdm_pins: pinmux_mcpdm_pins {
82 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020083 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
84 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
85 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
86 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
87 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030088 >;
89 };
90
91 dmic_pins: pinmux_dmic_pins {
92 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020093 0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */
94 0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */
95 0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */
96 0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030097 >;
98 };
99
100 mcbsp1_pins: pinmux_mcbsp1_pins {
101 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200102 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
103 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
104 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
105 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300106 >;
107 };
108
109 mcbsp2_pins: pinmux_mcbsp2_pins {
110 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200111 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
112 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
113 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
114 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300115 >;
116 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530117
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200118 i2c1_pins: pinmux_i2c1_pins {
119 pinctrl-single,pins = <
120 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
121 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
122 >;
123 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530124
Sourav Poddar9be495c2013-02-13 14:58:22 +0530125 i2c5_pins: pinmux_i2c5_pins {
126 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200127 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
128 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
Sourav Poddar9be495c2013-02-13 14:58:22 +0530129 >;
130 };
Sourav Poddar392adaf2013-02-13 14:58:44 +0530131
132 mcspi2_pins: pinmux_mcspi2_pins {
133 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200134 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
135 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
136 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
137 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530138 >;
139 };
140
141 mcspi3_pins: pinmux_mcspi3_pins {
142 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200143 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
144 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
145 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
146 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530147 >;
148 };
149
150 mcspi4_pins: pinmux_mcspi4_pins {
151 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200152 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
153 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
154 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
155 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530156 >;
157 };
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530158
159 usbhost_pins: pinmux_usbhost_pins {
160 pinctrl-single,pins = <
161 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
162 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
163
164 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
165 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
166
167 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
168 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
169 >;
170 };
171};
172
173&omap5_pmx_wkup {
174 pinctrl-names = "default";
175 pinctrl-0 = <
176 &usbhost_wkup_pins
177 >;
178
179 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
180 pinctrl-single,pins = <
181 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
182 >;
183 };
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300184};
185
Balaji T K5dd18b02012-08-07 12:48:21 +0530186&mmc1 {
187 vmmc-supply = <&vmmcsd_fixed>;
188 bus-width = <4>;
189};
190
191&mmc2 {
192 vmmc-supply = <&vmmcsd_fixed>;
193 bus-width = <8>;
194 ti,non-removable;
195};
196
197&mmc3 {
198 bus-width = <4>;
199 ti,non-removable;
200};
201
202&mmc4 {
203 status = "disabled";
204};
205
206&mmc5 {
207 status = "disabled";
R Sricharan6b5de092012-05-10 19:46:00 +0530208};
Sourav Poddar08f3e212012-07-25 11:02:43 +0530209
Sourav Poddar9be495c2013-02-13 14:58:22 +0530210&i2c1 {
211 pinctrl-names = "default";
212 pinctrl-0 = <&i2c1_pins>;
213
214 clock-frequency = <400000>;
215};
216
Sourav Poddar9be495c2013-02-13 14:58:22 +0530217&i2c5 {
218 pinctrl-names = "default";
219 pinctrl-0 = <&i2c5_pins>;
220
221 clock-frequency = <400000>;
222};
223
Peter Ujfalusi42601d52012-10-04 14:57:24 +0300224&mcbsp3 {
225 status = "disabled";
226};
Lokesh Vutla4d2750f2012-11-05 18:22:52 +0530227
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530228&usbhshost {
229 port2-mode = "ehci-hsic";
230 port3-mode = "ehci-hsic";
231};
232
233&usbhsehci {
234 phys = <0 &hsusb2_phy &hsusb3_phy>;
235};
236
Sourav Poddar392adaf2013-02-13 14:58:44 +0530237&mcspi1 {
238
239};
240
241&mcspi2 {
242 pinctrl-names = "default";
243 pinctrl-0 = <&mcspi2_pins>;
244};
245
246&mcspi3 {
247 pinctrl-names = "default";
248 pinctrl-0 = <&mcspi3_pins>;
249};
250
251&mcspi4 {
252 pinctrl-names = "default";
253 pinctrl-0 = <&mcspi4_pins>;
254};