blob: 9b950699e63d9d5fcf057d9f499071afa3d4b9ba [file] [log] [blame]
Len Brown103a8fe2010-10-22 23:53:03 -04001.TH TURBOSTAT 8
2.SH NAME
3turbostat \- Report processor frequency and idle statistics
4.SH SYNOPSIS
5.ft B
6.B turbostat
Len Brown8e180f32012-09-22 01:25:08 -04007.RB [ Options ]
Len Brown103a8fe2010-10-22 23:53:03 -04008.RB command
9.br
10.B turbostat
Len Brown8e180f32012-09-22 01:25:08 -040011.RB [ Options ]
Len Brown103a8fe2010-10-22 23:53:03 -040012.RB [ "\-i interval_sec" ]
13.SH DESCRIPTION
Len Brown889facb2012-11-08 00:48:57 -050014\fBturbostat \fP reports processor topology, frequency,
Len Browna7296172015-01-23 01:33:58 -050015idle power-state statistics, temperature and power on X86 processors.
16There are two ways to invoke turbostat.
17The first method is to supply a
18\fBcommand\fP, which is forked and statistics are printed
19upon its completion.
20The second method is to omit the command,
21and turbodstat will print statistics every 5 seconds.
22The 5-second interval can changed using the -i option.
Len Brown103a8fe2010-10-22 23:53:03 -040023
Len Browna7296172015-01-23 01:33:58 -050024Some information is not availalbe on older processors.
Len Brown103a8fe2010-10-22 23:53:03 -040025.SS Options
Len Brownf9240812012-10-06 15:26:31 -040026The \fB-p\fP option limits output to the 1st thread in 1st core of each package.
Len Brownc98d5d92012-06-04 00:56:40 -040027.PP
Len Brownf9240812012-10-06 15:26:31 -040028The \fB-P\fP option limits output to the 1st thread in each Package.
Len Brownc98d5d92012-06-04 00:56:40 -040029.PP
Len Brownf9240812012-10-06 15:26:31 -040030The \fB-S\fP option limits output to a 1-line System Summary for each interval.
Len Browne23da032012-02-06 18:37:16 -050031.PP
Len Brown103a8fe2010-10-22 23:53:03 -040032The \fB-v\fP option increases verbosity.
33.PP
Len Brownf9240812012-10-06 15:26:31 -040034The \fB-c MSR#\fP option includes the delta of the specified 32-bit MSR counter.
35.PP
36The \fB-C MSR#\fP option includes the delta of the specified 64-bit MSR counter.
Len Brown8e180f32012-09-22 01:25:08 -040037.PP
38The \fB-m MSR#\fP option includes the the specified 32-bit MSR value.
39.PP
40The \fB-M MSR#\fP option includes the the specified 64-bit MSR value.
Len Brown103a8fe2010-10-22 23:53:03 -040041.PP
42The \fB-i interval_sec\fP option prints statistics every \fiinterval_sec\fP seconds.
43The default is 5 seconds.
44.PP
45The \fBcommand\fP parameter forks \fBcommand\fP and upon its exit,
46displays the statistics gathered since it was forked.
47.PP
48.SH FIELD DESCRIPTIONS
49.nf
Len Brownfc04cc62014-02-06 00:55:19 -050050\fBPackage\fP processor package number.
51\fBCore\fP processor core number.
Len Brown103a8fe2010-10-22 23:53:03 -040052\fBCPU\fP Linux CPU (logical processor) number.
Len Browne23da032012-02-06 18:37:16 -050053Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology.
Len Brownfc04cc62014-02-06 00:55:19 -050054\fBAVG_MHz\fP number of cycles executed divided by time elapsed.
55\fB%Buzy\fP percent of the interval that the CPU retired instructions, aka. % of time in "C0" state.
56\fBBzy_MHz\fP average clock rate while the CPU was busy (in "c0" state).
57\fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
58\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states.
59\fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor.
60\fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor.
61\fBPkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7\fP percentage residency in hardware package idle states.
62\fBPkgWatt\fP Watts consumed by the whole package.
63\fBCorWatt\fP Watts consumed by the core part of the package.
64\fBGFXWatt\fP Watts consumed by the Graphics part of the package -- available only on client processors.
65\fBRAMWatt\fP Watts consumed by the DRAM DIMMS -- available only on server processors.
Len Brown889facb2012-11-08 00:48:57 -050066\fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package.
67\fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM.
Len Brown103a8fe2010-10-22 23:53:03 -040068.fi
69.PP
70.SH EXAMPLE
71Without any parameters, turbostat prints out counters ever 5 seconds.
72(override interval with "-i sec" option, or specify a command
73for turbostat to fork).
74
Len Browne23da032012-02-06 18:37:16 -050075The first row of statistics is a summary for the entire system.
Len Brown889facb2012-11-08 00:48:57 -050076For residency % columns, the summary is a weighted average.
77For Temperature columns, the summary is the column maximum.
78For Watts columns, the summary is a system total.
Len Brown103a8fe2010-10-22 23:53:03 -040079Subsequent rows show per-CPU statistics.
80
81.nf
Len Brownfc04cc62014-02-06 00:55:19 -050082[root@ivy]# ./turbostat
83 Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
84 - - 6 0.36 1596 3492 0 0.59 0.01 99.04 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
85 0 0 9 0.58 1596 3492 0 0.28 0.01 99.13 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
86 0 4 1 0.07 1596 3492 0 0.79
87 1 1 10 0.65 1596 3492 0 0.59 0.00 98.76 0.00 23
88 1 5 5 0.28 1596 3492 0 0.95
89 2 2 10 0.66 1596 3492 0 0.41 0.01 98.92 0.00 23
90 2 6 2 0.10 1597 3492 0 0.97
91 3 3 3 0.20 1596 3492 0 0.44 0.00 99.37 0.00 23
92 3 7 5 0.31 1596 3492 0 0.33
Len Brown103a8fe2010-10-22 23:53:03 -040093.fi
94.SH VERBOSE EXAMPLE
95The "-v" option adds verbosity to the output:
96
97.nf
Len Brown889facb2012-11-08 00:48:57 -050098[root@ivy]# turbostat -v
99turbostat v3.0 November 23, 2012 - Len Brown <lenb@kernel.org>
100CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3a:9 (6:58:9)
101CPUID(6): APERF, DTS, PTM, EPB
102RAPL: 851 sec. Joule Counter Range
103cpu0: MSR_NHM_PLATFORM_INFO: 0x81010f0012300
10416 * 100 = 1600 MHz max efficiency
10535 * 100 = 3500 MHz TSC frequency
106cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008402 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, locked: pkg-cstate-limit=2: pc6-noret)
107cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727
10837 * 100 = 3700 MHz max turbo 4 active cores
10938 * 100 = 3800 MHz max turbo 3 active cores
11039 * 100 = 3900 MHz max turbo 2 active cores
11139 * 100 = 3900 MHz max turbo 1 active cores
112cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced)
113cpu0: MSR_RAPL_POWER_UNIT: 0x000a1003 (0.125000 Watts, 0.000015 Joules, 0.000977 sec.)
114cpu0: MSR_PKG_POWER_INFO: 0x01e00268 (77 W TDP, RAPL 60 - 0 W, 0.000000 sec.)
115cpu0: MSR_PKG_POWER_LIMIT: 0x830000148268 (UNlocked)
116cpu0: PKG Limit #1: ENabled (77.000000 Watts, 1.000000 sec, clamp DISabled)
117cpu0: PKG Limit #2: ENabled (96.000000 Watts, 0.000977* sec, clamp DISabled)
118cpu0: MSR_PP0_POLICY: 0
119cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked)
120cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
121cpu0: MSR_PP1_POLICY: 0
122cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked)
123cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
124cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00691400 (105 C)
125cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884e0000 (27 C)
126cpu0: MSR_IA32_THERM_STATUS: 0x88560000 (19 C +/- 1)
127cpu1: MSR_IA32_THERM_STATUS: 0x88560000 (19 C +/- 1)
128cpu2: MSR_IA32_THERM_STATUS: 0x88540000 (21 C +/- 1)
129cpu3: MSR_IA32_THERM_STATUS: 0x884e0000 (27 C +/- 1)
130 ...
Len Brown103a8fe2010-10-22 23:53:03 -0400131.fi
132The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
Len Browna7296172015-01-23 01:33:58 -0500133available at the minimum package voltage. The \fBTSC frequency\fP is the base
134frequency of the processor -- this should match the brand string
135in /proc/cpuinfo. This base frequency
Len Brown103a8fe2010-10-22 23:53:03 -0400136should be sustainable on all CPUs indefinitely, given nominal power and cooling.
137The remaining rows show what maximum turbo frequency is possible
Len Browna7296172015-01-23 01:33:58 -0500138depending on the number of idle cores. Note that not all information is
139available on all processors.
Len Brown103a8fe2010-10-22 23:53:03 -0400140.SH FORK EXAMPLE
141If turbostat is invoked with a command, it will fork that command
142and output the statistics gathered when the command exits.
143eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
144until ^C while the other CPUs are mostly idle:
145
146.nf
Len Brownfc04cc62014-02-06 00:55:19 -0500147root@ivy: turbostat cat /dev/zero > /dev/null
Len Browne23da032012-02-06 18:37:16 -0500148^C
Len Brownfc04cc62014-02-06 00:55:19 -0500149 Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
150 - - 496 12.75 3886 3492 0 13.16 0.04 74.04 0.00 36 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
151 0 0 22 0.57 3830 3492 0 0.83 0.02 98.59 0.00 27 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
152 0 4 9 0.24 3829 3492 0 1.15
153 1 1 4 0.09 3783 3492 0 99.91 0.00 0.00 0.00 36
154 1 5 3880 99.82 3888 3492 0 0.18
155 2 2 17 0.44 3813 3492 0 0.77 0.04 98.75 0.00 28
156 2 6 12 0.32 3823 3492 0 0.89
157 3 3 16 0.43 3844 3492 0 0.63 0.11 98.84 0.00 30
158 3 7 4 0.11 3827 3492 0 0.94
15930.372243 sec
160
Len Brown103a8fe2010-10-22 23:53:03 -0400161.fi
Len Brownfc04cc62014-02-06 00:55:19 -0500162Above the cycle soaker drives cpu5 up its 3.8 GHz turbo limit
Len Brown103a8fe2010-10-22 23:53:03 -0400163while the other processors are generally in various states of idle.
164
Len Brownfc04cc62014-02-06 00:55:19 -0500165Note that cpu1 and cpu5 are HT siblings within core1.
166As cpu5 is very busy, it prevents its sibling, cpu1,
Len Brownc98d5d92012-06-04 00:56:40 -0400167from entering a c-state deeper than c1.
Len Brown103a8fe2010-10-22 23:53:03 -0400168
Len Brownfc04cc62014-02-06 00:55:19 -0500169Note that the Avg_MHz column reflects the total number of cycles executed
170divided by the measurement interval. If the %Busy column is 100%,
171then the processor was running at that speed the entire interval.
172The Avg_MHz multiplied by the %Busy results in the Bzy_MHz --
173which is the average frequency while the processor was executing --
174not including any non-busy idle time.
175
Len Brown103a8fe2010-10-22 23:53:03 -0400176.SH NOTES
177
178.B "turbostat "
179must be run as root.
Len Browna7296172015-01-23 01:33:58 -0500180Alternatively, non-root users can be enabled to run turbostat this way:
181
182# setcap cap_sys_rawio=ep ./turbostat
183
184# chmod +r /dev/cpu/*/msr
Len Brown103a8fe2010-10-22 23:53:03 -0400185
186.B "turbostat "
187reads hardware counters, but doesn't write them.
188So it will not interfere with the OS or other programs, including
189multiple invocations of itself.
190
191\fBturbostat \fP
192may work poorly on Linux-2.6.20 through 2.6.29,
Len Browna7296172015-01-23 01:33:58 -0500193as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF MSRs
Len Brown103a8fe2010-10-22 23:53:03 -0400194in those kernels.
195
Len Browna7296172015-01-23 01:33:58 -0500196AVG_MHz = APERF_delta/measurement_interval. This is the actual
197number of elapsed cycles divided by the entire sample interval --
198including idle time. Note that this calculation is resiliant
199to systems lacking a non-stop TSC.
200
201TSC_MHz = TSC_delta/measurement_interval.
202On a system with an invariant TSC, this value will be constant
203and will closely match the base frequency value shown
204in the brand string in /proc/cpuinfo. On a system where
205the TSC stops in idle, TSC_MHz will drop
206below the processor's base frequency.
207
208%Busy = MPERF_delta/TSC_delta
209
210Bzy_MHz = TSC_delta/APERF_delta/MPERF_delta/measurement_interval
211
212Note that these calculations depend on TSC_delta, so they
213are not reliable during intervals when TSC_MHz is not running at the base frequency.
214
215Turbostat data collection is not atomic.
216Extremely short measurement intervals (much less than 1 second),
217or system activity that prevents turbostat from being able
218to run on all CPUS to quickly collect data, will result in
219inconsistent results.
Len Brown2f32edf2012-09-21 23:45:46 -0400220
Len Brown103a8fe2010-10-22 23:53:03 -0400221The APERF, MPERF MSRs are defined to count non-halted cycles.
222Although it is not guaranteed by the architecture, turbostat assumes
223that they count at TSC rate, which is true on all processors tested to date.
224
225.SH REFERENCES
226"Intel® Turbo Boost Technology
227in Intel® Core™ Microarchitecture (Nehalem) Based Processors"
228http://download.intel.com/design/processor/applnots/320354.pdf
229
230"Intel® 64 and IA-32 Architectures Software Developer's Manual
231Volume 3B: System Programming Guide"
232http://www.intel.com/products/processor/manuals/
233
234.SH FILES
235.ta
236.nf
237/dev/cpu/*/msr
238.fi
239
240.SH "SEE ALSO"
241msr(4), vmstat(8)
242.PP
Len Browne23da032012-02-06 18:37:16 -0500243.SH AUTHOR
Len Brown103a8fe2010-10-22 23:53:03 -0400244.nf
245Written by Len Brown <len.brown@intel.com>