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Johannes Berg8ca151b2013-01-24 14:25:36 +01001/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +02008 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Avraham Sternee9219b2015-03-23 15:09:27 +02009 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
Johannes Berg8ca151b2013-01-24 14:25:36 +010010 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
Emmanuel Grumbach410dc5a2013-02-18 09:22:28 +020026 * in the file called COPYING.
Johannes Berg8ca151b2013-01-24 14:25:36 +010027 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +020034 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Avraham Sternee9219b2015-03-23 15:09:27 +020035 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
Johannes Berg8ca151b2013-01-24 14:25:36 +010036 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
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46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
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50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65
66#ifndef __fw_api_h__
67#define __fw_api_h__
68
69#include "fw-api-rs.h"
70#include "fw-api-tx.h"
71#include "fw-api-sta.h"
72#include "fw-api-mac.h"
73#include "fw-api-power.h"
74#include "fw-api-d3.h"
Emmanuel Grumbach5b7ff612014-03-11 19:27:45 +020075#include "fw-api-coex.h"
Haim Dreyfusse820c2d2014-04-06 11:19:09 +030076#include "fw-api-scan.h"
Johannes Bergd19ac582015-01-14 15:54:18 +010077#include "fw-api-stats.h"
Johannes Berg8ca151b2013-01-24 14:25:36 +010078
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020079/* Tx queue numbers */
Johannes Berg8ca151b2013-01-24 14:25:36 +010080enum {
81 IWL_MVM_OFFCHANNEL_QUEUE = 8,
82 IWL_MVM_CMD_QUEUE = 9,
Johannes Berg8ca151b2013-01-24 14:25:36 +010083};
84
Johannes Bergb2d81db2014-08-01 20:48:25 +020085enum iwl_mvm_tx_fifo {
86 IWL_MVM_TX_FIFO_BK = 0,
87 IWL_MVM_TX_FIFO_BE,
88 IWL_MVM_TX_FIFO_VI,
89 IWL_MVM_TX_FIFO_VO,
90 IWL_MVM_TX_FIFO_MCAST = 5,
91 IWL_MVM_TX_FIFO_CMD = 7,
92};
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020093
Johannes Berg8ca151b2013-01-24 14:25:36 +010094#define IWL_MVM_STATION_COUNT 16
95
Arik Nemtsovcf7b4912014-05-15 11:44:40 +030096#define IWL_MVM_TDLS_STA_COUNT 4
97
Johannes Berg8ca151b2013-01-24 14:25:36 +010098/* commands */
99enum {
100 MVM_ALIVE = 0x1,
101 REPLY_ERROR = 0x2,
102
103 INIT_COMPLETE_NOTIF = 0x4,
104
105 /* PHY context commands */
106 PHY_CONTEXT_CMD = 0x8,
107 DBG_CFG = 0x9,
Emmanuel Grumbachb9fae2d2014-02-17 11:24:10 +0200108 ANTENNA_COUPLING_NOTIFICATION = 0xa,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100109
David Spinadeld2496222014-05-20 12:46:37 +0300110 /* UMAC scan commands */
Avraham Sternee9219b2015-03-23 15:09:27 +0200111 SCAN_ITERATION_COMPLETE_UMAC = 0xb5,
David Spinadeld2496222014-05-20 12:46:37 +0300112 SCAN_CFG_CMD = 0xc,
113 SCAN_REQ_UMAC = 0xd,
114 SCAN_ABORT_UMAC = 0xe,
115 SCAN_COMPLETE_UMAC = 0xf,
116
Johannes Berg8ca151b2013-01-24 14:25:36 +0100117 /* station table */
Max Stepanov5a258aa2013-04-07 09:11:21 +0300118 ADD_STA_KEY = 0x17,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100119 ADD_STA = 0x18,
120 REMOVE_STA = 0x19,
121
122 /* TX */
123 TX_CMD = 0x1c,
124 TXPATH_FLUSH = 0x1e,
125 MGMT_MCAST_KEY = 0x1f,
126
Avri Altman3edf8ff2014-07-30 11:41:01 +0300127 /* scheduler config */
128 SCD_QUEUE_CFG = 0x1d,
129
Johannes Berg8ca151b2013-01-24 14:25:36 +0100130 /* global key */
131 WEP_KEY = 0x20,
132
Liad Kaufman04fd2c22014-12-15 17:54:16 +0200133 /* Memory */
134 SHARED_MEM_CFG = 0x25,
135
Arik Nemtsov77c5d7e2014-09-11 13:10:08 +0300136 /* TDLS */
137 TDLS_CHANNEL_SWITCH_CMD = 0x27,
138 TDLS_CHANNEL_SWITCH_NOTIFICATION = 0xaa,
Arik Nemtsov307e4722014-09-15 18:48:59 +0300139 TDLS_CONFIG_CMD = 0xa7,
Arik Nemtsov77c5d7e2014-09-11 13:10:08 +0300140
Johannes Berg8ca151b2013-01-24 14:25:36 +0100141 /* MAC and Binding commands */
142 MAC_CONTEXT_CMD = 0x28,
143 TIME_EVENT_CMD = 0x29, /* both CMD and response */
144 TIME_EVENT_NOTIFICATION = 0x2a,
145 BINDING_CONTEXT_CMD = 0x2b,
146 TIME_QUOTA_CMD = 0x2c,
Johannes Berg4ac6cb52013-08-08 09:30:13 +0200147 NON_QOS_TX_COUNTER_CMD = 0x2d,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100148
149 LQ_CMD = 0x4e,
150
Johannes Berg8ca151b2013-01-24 14:25:36 +0100151 /* Scan offload */
152 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
153 SCAN_OFFLOAD_ABORT_CMD = 0x52,
Ariej Marjieh720befbf2014-07-07 09:04:58 +0300154 HOT_SPOT_CMD = 0x53,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100155 SCAN_OFFLOAD_COMPLETE = 0x6D,
156 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
157 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
David Spinadel35a000b2013-08-28 09:29:43 +0300158 MATCH_FOUND_NOTIFICATION = 0xd9,
David Spinadelfb98be52014-05-04 12:51:10 +0300159 SCAN_ITERATION_COMPLETE = 0xe7,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100160
161 /* Phy */
162 PHY_CONFIGURATION_CMD = 0x6a,
163 CALIB_RES_NOTIF_PHY_DB = 0x6b,
164 /* PHY_DB_CMD = 0x6c, */
165
Alexander Bondare811ada2013-03-10 15:29:44 +0200166 /* Power - legacy power table command */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100167 POWER_TABLE_CMD = 0x77,
Alexander Bondar175a70b2013-04-14 20:59:37 +0300168 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
Emmanuel Grumbach9180ac52014-09-23 23:02:41 +0300169 LTR_CONFIG = 0xee,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100170
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +0300171 /* Thermal Throttling*/
172 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
173
Johannes Berg8ca151b2013-01-24 14:25:36 +0100174 /* Scanning */
175 SCAN_REQUEST_CMD = 0x80,
176 SCAN_ABORT_CMD = 0x81,
177 SCAN_START_NOTIFICATION = 0x82,
178 SCAN_RESULTS_NOTIFICATION = 0x83,
179 SCAN_COMPLETE_NOTIFICATION = 0x84,
180
181 /* NVM */
182 NVM_ACCESS_CMD = 0x88,
183
184 SET_CALIB_DEFAULT_CMD = 0x8e,
185
Ilan Peer571765c2013-03-05 15:26:03 +0200186 BEACON_NOTIFICATION = 0x90,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100187 BEACON_TEMPLATE_CMD = 0x91,
188 TX_ANT_CONFIGURATION_CMD = 0x98,
Johannes Berg91a8bcd2015-01-14 18:12:41 +0100189 STATISTICS_CMD = 0x9c,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100190 STATISTICS_NOTIFICATION = 0x9d,
Johannes Berg3e56ead2013-02-15 22:23:18 +0100191 EOSP_NOTIFICATION = 0x9e,
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300192 REDUCE_TX_POWER_CMD = 0x9f,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100193
194 /* RF-KILL commands and notifications */
195 CARD_STATE_CMD = 0xa0,
196 CARD_STATE_NOTIFICATION = 0xa1,
197
Hila Gonend64048e2013-03-13 18:00:03 +0200198 MISSED_BEACONS_NOTIFICATION = 0xa2,
199
Alexander Bondare811ada2013-03-10 15:29:44 +0200200 /* Power - new power table command */
201 MAC_PM_POWER_TABLE = 0xa9,
202
Chaya Rachel Ivgy30269c12014-11-15 21:08:29 +0200203 MFUART_LOAD_NOTIFICATION = 0xb1,
204
Johannes Berg8ca151b2013-01-24 14:25:36 +0100205 REPLY_RX_PHY_CMD = 0xc0,
206 REPLY_RX_MPDU_CMD = 0xc1,
207 BA_NOTIF = 0xc5,
208
Arik Nemtsovdcaf9f52014-03-04 19:54:12 +0200209 /* Location Aware Regulatory */
210 MCC_UPDATE_CMD = 0xc8,
Arik Nemtsov88931cc2014-03-05 12:26:15 +0200211 MCC_CHUB_UPDATE_CMD = 0xc9,
Arik Nemtsovdcaf9f52014-03-04 19:54:12 +0200212
Matti Gottlieba2d79c52014-08-25 14:41:23 +0300213 MARKER_CMD = 0xcb,
214
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200215 /* BT Coex */
216 BT_COEX_PRIO_TABLE = 0xcc,
217 BT_COEX_PROT_ENV = 0xcd,
218 BT_PROFILE_NOTIFICATION = 0xce,
Emmanuel Grumbach430a3bb2014-04-02 09:55:16 +0300219 BT_CONFIG = 0x9b,
220 BT_COEX_UPDATE_SW_BOOST = 0x5a,
221 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
222 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
Emmanuel Grumbachdac94da2013-06-18 07:35:27 +0300223 BT_COEX_CI = 0x5d,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200224
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +0200225 REPLY_SF_CFG_CMD = 0xd1,
Hila Gonen7df15b12012-12-12 11:16:19 +0200226 REPLY_BEACON_FILTERING_CMD = 0xd2,
227
Luciano Coelhoa0a09242014-09-04 12:29:15 +0300228 /* DTS measurements */
229 CMD_DTS_MEASUREMENT_TRIGGER = 0xdc,
230 DTS_MEASUREMENT_NOTIFICATION = 0xdd,
231
Johannes Berg8ca151b2013-01-24 14:25:36 +0100232 REPLY_DEBUG_CMD = 0xf0,
233 DEBUG_LOG_MSG = 0xf7,
234
Eliad Pellerc87163b2014-01-08 10:11:11 +0200235 BCAST_FILTER_CMD = 0xcf,
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +0300236 MCAST_FILTER_CMD = 0xd0,
237
Johannes Berg8ca151b2013-01-24 14:25:36 +0100238 /* D3 commands/notifications */
239 D3_CONFIG_CMD = 0xd3,
240 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
241 OFFLOADS_QUERY_CMD = 0xd5,
242 REMOTE_WAKE_CONFIG_CMD = 0xd6,
Arik Nemtsov98ee7782013-10-02 16:58:09 +0300243 D0I3_END_CMD = 0xed,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100244
245 /* for WoWLAN in particular */
246 WOWLAN_PATTERNS = 0xe0,
247 WOWLAN_CONFIGURATION = 0xe1,
248 WOWLAN_TSC_RSC_PARAM = 0xe2,
249 WOWLAN_TKIP_PARAM = 0xe3,
250 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
251 WOWLAN_GET_STATUSES = 0xe5,
252 WOWLAN_TX_POWER_PER_DB = 0xe6,
253
254 /* and for NetDetect */
Luciano Coelhob04998f2014-11-20 15:58:34 +0200255 SCAN_OFFLOAD_PROFILES_QUERY_CMD = 0x56,
256 SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD = 0x58,
257 SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD = 0x59,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100258
259 REPLY_MAX = 0xff,
260};
261
262/**
263 * struct iwl_cmd_response - generic response struct for most commands
264 * @status: status of the command asked, changes for each one
265 */
266struct iwl_cmd_response {
267 __le32 status;
268};
269
270/*
271 * struct iwl_tx_ant_cfg_cmd
272 * @valid: valid antenna configuration
273 */
274struct iwl_tx_ant_cfg_cmd {
275 __le32 valid;
276} __packed;
277
278/*
279 * Calibration control struct.
280 * Sent as part of the phy configuration command.
281 * @flow_trigger: bitmap for which calibrations to perform according to
282 * flow triggers.
283 * @event_trigger: bitmap for which calibrations to perform according to
284 * event triggers.
285 */
286struct iwl_calib_ctrl {
287 __le32 flow_trigger;
288 __le32 event_trigger;
289} __packed;
290
291/* This enum defines the bitmap of various calibrations to enable in both
292 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
293 */
294enum iwl_calib_cfg {
295 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
296 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
297 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
298 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
299 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
300 IWL_CALIB_CFG_DC_IDX = BIT(5),
301 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
302 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
303 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
304 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
305 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
306 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
307 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
308 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
309 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
310 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
311 IWL_CALIB_CFG_DAC_IDX = BIT(16),
312 IWL_CALIB_CFG_ABS_IDX = BIT(17),
313 IWL_CALIB_CFG_AGC_IDX = BIT(18),
314};
315
316/*
317 * Phy configuration command.
318 */
319struct iwl_phy_cfg_cmd {
320 __le32 phy_cfg;
321 struct iwl_calib_ctrl calib_control;
322} __packed;
323
324#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
325#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
326#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
327#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
328#define PHY_CFG_TX_CHAIN_A BIT(8)
329#define PHY_CFG_TX_CHAIN_B BIT(9)
330#define PHY_CFG_TX_CHAIN_C BIT(10)
331#define PHY_CFG_RX_CHAIN_A BIT(12)
332#define PHY_CFG_RX_CHAIN_B BIT(13)
333#define PHY_CFG_RX_CHAIN_C BIT(14)
334
335
336/* Target of the NVM_ACCESS_CMD */
337enum {
338 NVM_ACCESS_TARGET_CACHE = 0,
339 NVM_ACCESS_TARGET_OTP = 1,
340 NVM_ACCESS_TARGET_EEPROM = 2,
341};
342
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200343/* Section types for NVM_ACCESS_CMD */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100344enum {
Eran Hararyae2b21b2014-01-09 08:08:24 +0200345 NVM_SECTION_TYPE_SW = 1,
Eran Harary77db0a32014-02-04 14:21:38 +0200346 NVM_SECTION_TYPE_REGULATORY = 3,
Eran Hararyae2b21b2014-01-09 08:08:24 +0200347 NVM_SECTION_TYPE_CALIBRATION = 4,
348 NVM_SECTION_TYPE_PRODUCTION = 5,
Eran Harary77db0a32014-02-04 14:21:38 +0200349 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
Eran Hararyce500072014-12-01 17:53:53 +0200350 NVM_SECTION_TYPE_PHY_SKU = 12,
351 NVM_MAX_NUM_SECTIONS = 13,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100352};
353
354/**
355 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
356 * @op_code: 0 - read, 1 - write
357 * @target: NVM_ACCESS_TARGET_*
358 * @type: NVM_SECTION_TYPE_*
359 * @offset: offset in bytes into the section
360 * @length: in bytes, to read/write
361 * @data: if write operation, the data to write. On read its empty
362 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200363struct iwl_nvm_access_cmd {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100364 u8 op_code;
365 u8 target;
366 __le16 type;
367 __le16 offset;
368 __le16 length;
369 u8 data[];
370} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
371
372/**
373 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
374 * @offset: offset in bytes into the section
375 * @length: in bytes, either how much was written or read
376 * @type: NVM_SECTION_TYPE_*
377 * @status: 0 for success, fail otherwise
378 * @data: if read operation, the data returned. Empty on write.
379 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200380struct iwl_nvm_access_resp {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100381 __le16 offset;
382 __le16 length;
383 __le16 type;
384 __le16 status;
385 u8 data[];
386} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
387
388/* MVM_ALIVE 0x1 */
389
390/* alive response is_valid values */
391#define ALIVE_RESP_UCODE_OK BIT(0)
392#define ALIVE_RESP_RFKILL BIT(1)
393
394/* alive response ver_type values */
395enum {
396 FW_TYPE_HW = 0,
397 FW_TYPE_PROT = 1,
398 FW_TYPE_AP = 2,
399 FW_TYPE_WOWLAN = 3,
400 FW_TYPE_TIMING = 4,
401 FW_TYPE_WIPAN = 5
402};
403
404/* alive response ver_subtype values */
405enum {
406 FW_SUBTYPE_FULL_FEATURE = 0,
407 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
408 FW_SUBTYPE_REDUCED = 2,
409 FW_SUBTYPE_ALIVE_ONLY = 3,
410 FW_SUBTYPE_WOWLAN = 4,
411 FW_SUBTYPE_AP_SUBTYPE = 5,
412 FW_SUBTYPE_WIPAN = 6,
413 FW_SUBTYPE_INITIALIZE = 9
414};
415
416#define IWL_ALIVE_STATUS_ERR 0xDEAD
417#define IWL_ALIVE_STATUS_OK 0xCAFE
418
419#define IWL_ALIVE_FLG_RFKILL BIT(0)
420
Emmanuel Grumbach7e1223b2015-02-03 20:11:48 +0200421struct mvm_alive_resp_ver1 {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100422 __le16 status;
423 __le16 flags;
424 u8 ucode_minor;
425 u8 ucode_major;
426 __le16 id;
427 u8 api_minor;
428 u8 api_major;
429 u8 ver_subtype;
430 u8 ver_type;
431 u8 mac;
432 u8 opt;
433 __le16 reserved2;
434 __le32 timestamp;
435 __le32 error_event_table_ptr; /* SRAM address for error log */
436 __le32 log_event_table_ptr; /* SRAM address for event log */
437 __le32 cpu_register_ptr;
438 __le32 dbgm_config_ptr;
439 __le32 alive_counter_ptr;
440 __le32 scd_base_ptr; /* SRAM address for SCD */
441} __packed; /* ALIVE_RES_API_S_VER_1 */
442
Eran Harary01a9ca52014-02-03 09:29:57 +0200443struct mvm_alive_resp_ver2 {
444 __le16 status;
445 __le16 flags;
446 u8 ucode_minor;
447 u8 ucode_major;
448 __le16 id;
449 u8 api_minor;
450 u8 api_major;
451 u8 ver_subtype;
452 u8 ver_type;
453 u8 mac;
454 u8 opt;
455 __le16 reserved2;
456 __le32 timestamp;
457 __le32 error_event_table_ptr; /* SRAM address for error log */
458 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
459 __le32 cpu_register_ptr;
460 __le32 dbgm_config_ptr;
461 __le32 alive_counter_ptr;
462 __le32 scd_base_ptr; /* SRAM address for SCD */
463 __le32 st_fwrd_addr; /* pointer to Store and forward */
464 __le32 st_fwrd_size;
465 u8 umac_minor; /* UMAC version: minor */
466 u8 umac_major; /* UMAC version: major */
467 __le16 umac_id; /* UMAC version: id */
468 __le32 error_info_addr; /* SRAM address for UMAC error log */
469 __le32 dbg_print_buff_addr;
470} __packed; /* ALIVE_RES_API_S_VER_2 */
471
Emmanuel Grumbach7e1223b2015-02-03 20:11:48 +0200472struct mvm_alive_resp {
473 __le16 status;
474 __le16 flags;
475 __le32 ucode_minor;
476 __le32 ucode_major;
477 u8 ver_subtype;
478 u8 ver_type;
479 u8 mac;
480 u8 opt;
481 __le32 timestamp;
482 __le32 error_event_table_ptr; /* SRAM address for error log */
483 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
484 __le32 cpu_register_ptr;
485 __le32 dbgm_config_ptr;
486 __le32 alive_counter_ptr;
487 __le32 scd_base_ptr; /* SRAM address for SCD */
488 __le32 st_fwrd_addr; /* pointer to Store and forward */
489 __le32 st_fwrd_size;
490 __le32 umac_minor; /* UMAC version: minor */
491 __le32 umac_major; /* UMAC version: major */
492 __le32 error_info_addr; /* SRAM address for UMAC error log */
493 __le32 dbg_print_buff_addr;
494} __packed; /* ALIVE_RES_API_S_VER_3 */
495
Johannes Berg8ca151b2013-01-24 14:25:36 +0100496/* Error response/notification */
497enum {
498 FW_ERR_UNKNOWN_CMD = 0x0,
499 FW_ERR_INVALID_CMD_PARAM = 0x1,
500 FW_ERR_SERVICE = 0x2,
501 FW_ERR_ARC_MEMORY = 0x3,
502 FW_ERR_ARC_CODE = 0x4,
503 FW_ERR_WATCH_DOG = 0x5,
504 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
505 FW_ERR_WEP_KEY_SIZE = 0x11,
506 FW_ERR_OBSOLETE_FUNC = 0x12,
507 FW_ERR_UNEXPECTED = 0xFE,
508 FW_ERR_FATAL = 0xFF
509};
510
511/**
512 * struct iwl_error_resp - FW error indication
513 * ( REPLY_ERROR = 0x2 )
514 * @error_type: one of FW_ERR_*
515 * @cmd_id: the command ID for which the error occured
516 * @bad_cmd_seq_num: sequence number of the erroneous command
517 * @error_service: which service created the error, applicable only if
518 * error_type = 2, otherwise 0
519 * @timestamp: TSF in usecs.
520 */
521struct iwl_error_resp {
522 __le32 error_type;
523 u8 cmd_id;
524 u8 reserved1;
525 __le16 bad_cmd_seq_num;
526 __le32 error_service;
527 __le64 timestamp;
528} __packed;
529
530
531/* Common PHY, MAC and Bindings definitions */
532
533#define MAX_MACS_IN_BINDING (3)
534#define MAX_BINDINGS (4)
535#define AUX_BINDING_INDEX (3)
536#define MAX_PHYS (4)
537
538/* Used to extract ID and color from the context dword */
539#define FW_CTXT_ID_POS (0)
540#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
541#define FW_CTXT_COLOR_POS (8)
542#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
543#define FW_CTXT_INVALID (0xffffffff)
544
545#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
546 (_color << FW_CTXT_COLOR_POS))
547
548/* Possible actions on PHYs, MACs and Bindings */
549enum {
550 FW_CTXT_ACTION_STUB = 0,
551 FW_CTXT_ACTION_ADD,
552 FW_CTXT_ACTION_MODIFY,
553 FW_CTXT_ACTION_REMOVE,
554 FW_CTXT_ACTION_NUM
555}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
556
557/* Time Events */
558
559/* Time Event types, according to MAC type */
560enum iwl_time_event_type {
561 /* BSS Station Events */
562 TE_BSS_STA_AGGRESSIVE_ASSOC,
563 TE_BSS_STA_ASSOC,
564 TE_BSS_EAP_DHCP_PROT,
565 TE_BSS_QUIET_PERIOD,
566
567 /* P2P Device Events */
568 TE_P2P_DEVICE_DISCOVERABLE,
569 TE_P2P_DEVICE_LISTEN,
570 TE_P2P_DEVICE_ACTION_SCAN,
571 TE_P2P_DEVICE_FULL_SCAN,
572
573 /* P2P Client Events */
574 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
575 TE_P2P_CLIENT_ASSOC,
576 TE_P2P_CLIENT_QUIET_PERIOD,
577
578 /* P2P GO Events */
579 TE_P2P_GO_ASSOC_PROT,
580 TE_P2P_GO_REPETITIVE_NOA,
581 TE_P2P_GO_CT_WINDOW,
582
583 /* WiDi Sync Events */
584 TE_WIDI_TX_SYNC,
585
Andrei Otcheretianski7f0a7c62014-05-04 11:48:12 +0300586 /* Channel Switch NoA */
Luciano Coelhof991e172014-08-26 16:14:10 +0300587 TE_CHANNEL_SWITCH_PERIOD,
Andrei Otcheretianski7f0a7c62014-05-04 11:48:12 +0300588
Johannes Berg8ca151b2013-01-24 14:25:36 +0100589 TE_MAX
590}; /* MAC_EVENT_TYPE_API_E_VER_1 */
591
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300592
593
594/* Time event - defines for command API v1 */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100595
596/*
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300597 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
598 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
599 * the first fragment is scheduled.
600 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
601 * the first 2 fragments are scheduled.
602 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
603 * number of fragments are valid.
Johannes Berg8ca151b2013-01-24 14:25:36 +0100604 *
605 * Other than the constant defined above, specifying a fragmentation value 'x'
606 * means that the event can be fragmented but only the first 'x' will be
607 * scheduled.
608 */
609enum {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300610 TE_V1_FRAG_NONE = 0,
611 TE_V1_FRAG_SINGLE = 1,
612 TE_V1_FRAG_DUAL = 2,
613 TE_V1_FRAG_ENDLESS = 0xffffffff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100614};
615
Johannes Berg8ca151b2013-01-24 14:25:36 +0100616/* If a Time Event can be fragmented, this is the max number of fragments */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300617#define TE_V1_FRAG_MAX_MSK 0x0fffffff
618/* Repeat the time event endlessly (until removed) */
619#define TE_V1_REPEAT_ENDLESS 0xffffffff
620/* If a Time Event has bounded repetitions, this is the maximal value */
621#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
622
623/* Time Event dependencies: none, on another TE, or in a specific time */
624enum {
625 TE_V1_INDEPENDENT = 0,
626 TE_V1_DEP_OTHER = BIT(0),
627 TE_V1_DEP_TSF = BIT(1),
628 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
629}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
630
631/*
632 * @TE_V1_NOTIF_NONE: no notifications
633 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
634 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
635 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
636 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
637 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
638 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
639 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
640 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
641 *
642 * Supported Time event notifications configuration.
643 * A notification (both event and fragment) includes a status indicating weather
644 * the FW was able to schedule the event or not. For fragment start/end
645 * notification the status is always success. There is no start/end fragment
646 * notification for monolithic events.
647 */
648enum {
649 TE_V1_NOTIF_NONE = 0,
650 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
651 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
652 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
653 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
654 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
655 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
656 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
657 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
658}; /* MAC_EVENT_ACTION_API_E_VER_2 */
659
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300660/* Time event - defines for command API */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300661
662/*
663 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
664 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
665 * the first fragment is scheduled.
666 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
667 * the first 2 fragments are scheduled.
668 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
669 * number of fragments are valid.
670 *
671 * Other than the constant defined above, specifying a fragmentation value 'x'
672 * means that the event can be fragmented but only the first 'x' will be
673 * scheduled.
674 */
675enum {
676 TE_V2_FRAG_NONE = 0,
677 TE_V2_FRAG_SINGLE = 1,
678 TE_V2_FRAG_DUAL = 2,
679 TE_V2_FRAG_MAX = 0xfe,
680 TE_V2_FRAG_ENDLESS = 0xff
681};
682
683/* Repeat the time event endlessly (until removed) */
684#define TE_V2_REPEAT_ENDLESS 0xff
685/* If a Time Event has bounded repetitions, this is the maximal value */
686#define TE_V2_REPEAT_MAX 0xfe
687
688#define TE_V2_PLACEMENT_POS 12
689#define TE_V2_ABSENCE_POS 15
690
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300691/* Time event policy values
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300692 * A notification (both event and fragment) includes a status indicating weather
693 * the FW was able to schedule the event or not. For fragment start/end
694 * notification the status is always success. There is no start/end fragment
695 * notification for monolithic events.
696 *
697 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
698 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
699 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
700 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
701 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
702 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
703 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
704 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
705 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
706 * @TE_V2_DEP_OTHER: depends on another time event
707 * @TE_V2_DEP_TSF: depends on a specific time
708 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
709 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
710 */
711enum {
712 TE_V2_DEFAULT_POLICY = 0x0,
713
714 /* notifications (event start/stop, fragment start/stop) */
715 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
716 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
717 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
718 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
719
720 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
721 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
722 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
723 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
Emmanuel Grumbach1f6bf072014-02-16 15:36:00 +0200724 T2_V2_START_IMMEDIATELY = BIT(11),
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300725
726 TE_V2_NOTIF_MSK = 0xff,
727
728 /* placement characteristics */
729 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
730 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
731 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
732
733 /* are we present or absent during the Time Event. */
734 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
735};
736
737/**
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300738 * struct iwl_time_event_cmd_api - configuring Time Events
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300739 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
740 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
741 * ( TIME_EVENT_CMD = 0x29 )
742 * @id_and_color: ID and color of the relevant MAC
743 * @action: action to perform, one of FW_CTXT_ACTION_*
744 * @id: this field has two meanings, depending on the action:
745 * If the action is ADD, then it means the type of event to add.
746 * For all other actions it is the unique event ID assigned when the
747 * event was added by the FW.
748 * @apply_time: When to start the Time Event (in GP2)
749 * @max_delay: maximum delay to event's start (apply time), in TU
750 * @depends_on: the unique ID of the event we depend on (if any)
751 * @interval: interval between repetitions, in TU
752 * @duration: duration of event in TU
753 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
754 * @max_frags: maximal number of fragments the Time Event can be divided to
755 * @policy: defines whether uCode shall notify the host or other uCode modules
756 * on event and/or fragment start and/or end
757 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
758 * TE_EVENT_SOCIOPATHIC
759 * using TE_ABSENCE and using TE_NOTIF_*
760 */
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300761struct iwl_time_event_cmd {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300762 /* COMMON_INDEX_HDR_API_S_VER_1 */
763 __le32 id_and_color;
764 __le32 action;
765 __le32 id;
766 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
767 __le32 apply_time;
768 __le32 max_delay;
769 __le32 depends_on;
770 __le32 interval;
771 __le32 duration;
772 u8 repeat;
773 u8 max_frags;
774 __le16 policy;
775} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
776
Johannes Berg8ca151b2013-01-24 14:25:36 +0100777/**
778 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
779 * @status: bit 0 indicates success, all others specify errors
780 * @id: the Time Event type
781 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
782 * @id_and_color: ID and color of the relevant MAC
783 */
784struct iwl_time_event_resp {
785 __le32 status;
786 __le32 id;
787 __le32 unique_id;
788 __le32 id_and_color;
789} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
790
791/**
792 * struct iwl_time_event_notif - notifications of time event start/stop
793 * ( TIME_EVENT_NOTIFICATION = 0x2a )
794 * @timestamp: action timestamp in GP2
795 * @session_id: session's unique id
796 * @unique_id: unique id of the Time Event itself
797 * @id_and_color: ID and color of the relevant MAC
798 * @action: one of TE_NOTIF_START or TE_NOTIF_END
799 * @status: true if scheduled, false otherwise (not executed)
800 */
801struct iwl_time_event_notif {
802 __le32 timestamp;
803 __le32 session_id;
804 __le32 unique_id;
805 __le32 id_and_color;
806 __le32 action;
807 __le32 status;
808} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
809
810
811/* Bindings and Time Quota */
812
813/**
814 * struct iwl_binding_cmd - configuring bindings
815 * ( BINDING_CONTEXT_CMD = 0x2b )
816 * @id_and_color: ID and color of the relevant Binding
817 * @action: action to perform, one of FW_CTXT_ACTION_*
818 * @macs: array of MAC id and colors which belong to the binding
819 * @phy: PHY id and color which belongs to the binding
820 */
821struct iwl_binding_cmd {
822 /* COMMON_INDEX_HDR_API_S_VER_1 */
823 __le32 id_and_color;
824 __le32 action;
825 /* BINDING_DATA_API_S_VER_1 */
826 __le32 macs[MAX_MACS_IN_BINDING];
827 __le32 phy;
828} __packed; /* BINDING_CMD_API_S_VER_1 */
829
Ilan Peer35adfd62013-02-04 13:16:24 +0200830/* The maximal number of fragments in the FW's schedule session */
831#define IWL_MVM_MAX_QUOTA 128
832
Johannes Berg8ca151b2013-01-24 14:25:36 +0100833/**
834 * struct iwl_time_quota_data - configuration of time quota per binding
835 * @id_and_color: ID and color of the relevant Binding
836 * @quota: absolute time quota in TU. The scheduler will try to divide the
837 * remainig quota (after Time Events) according to this quota.
838 * @max_duration: max uninterrupted context duration in TU
839 */
840struct iwl_time_quota_data {
841 __le32 id_and_color;
842 __le32 quota;
843 __le32 max_duration;
844} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
845
846/**
847 * struct iwl_time_quota_cmd - configuration of time quota between bindings
848 * ( TIME_QUOTA_CMD = 0x2c )
849 * @quotas: allocations per binding
850 */
851struct iwl_time_quota_cmd {
852 struct iwl_time_quota_data quotas[MAX_BINDINGS];
853} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
854
855
856/* PHY context */
857
858/* Supported bands */
859#define PHY_BAND_5 (0)
860#define PHY_BAND_24 (1)
861
862/* Supported channel width, vary if there is VHT support */
863#define PHY_VHT_CHANNEL_MODE20 (0x0)
864#define PHY_VHT_CHANNEL_MODE40 (0x1)
865#define PHY_VHT_CHANNEL_MODE80 (0x2)
866#define PHY_VHT_CHANNEL_MODE160 (0x3)
867
868/*
869 * Control channel position:
870 * For legacy set bit means upper channel, otherwise lower.
871 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
872 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
873 * center_freq
874 * |
875 * 40Mhz |_______|_______|
876 * 80Mhz |_______|_______|_______|_______|
877 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
878 * code 011 010 001 000 | 100 101 110 111
879 */
880#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
881#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
882#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
883#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
884#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
885#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
886#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
887#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
888
889/*
890 * @band: PHY_BAND_*
891 * @channel: channel number
892 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
893 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
894 */
895struct iwl_fw_channel_info {
896 u8 band;
897 u8 channel;
898 u8 width;
899 u8 ctrl_pos;
900} __packed;
901
902#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
903#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
904 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
905#define PHY_RX_CHAIN_VALID_POS (1)
906#define PHY_RX_CHAIN_VALID_MSK \
907 (0x7 << PHY_RX_CHAIN_VALID_POS)
908#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
909#define PHY_RX_CHAIN_FORCE_SEL_MSK \
910 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
911#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
912#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
913 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
914#define PHY_RX_CHAIN_CNT_POS (10)
915#define PHY_RX_CHAIN_CNT_MSK \
916 (0x3 << PHY_RX_CHAIN_CNT_POS)
917#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
918#define PHY_RX_CHAIN_MIMO_CNT_MSK \
919 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
920#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
921#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
922 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
923
924/* TODO: fix the value, make it depend on firmware at runtime? */
925#define NUM_PHY_CTX 3
926
927/* TODO: complete missing documentation */
928/**
929 * struct iwl_phy_context_cmd - config of the PHY context
930 * ( PHY_CONTEXT_CMD = 0x8 )
931 * @id_and_color: ID and color of the relevant Binding
932 * @action: action to perform, one of FW_CTXT_ACTION_*
933 * @apply_time: 0 means immediate apply and context switch.
934 * other value means apply new params after X usecs
935 * @tx_param_color: ???
936 * @channel_info:
937 * @txchain_info: ???
938 * @rxchain_info: ???
939 * @acquisition_data: ???
940 * @dsp_cfg_flags: set to 0
941 */
942struct iwl_phy_context_cmd {
943 /* COMMON_INDEX_HDR_API_S_VER_1 */
944 __le32 id_and_color;
945 __le32 action;
946 /* PHY_CONTEXT_DATA_API_S_VER_1 */
947 __le32 apply_time;
948 __le32 tx_param_color;
949 struct iwl_fw_channel_info ci;
950 __le32 txchain_info;
951 __le32 rxchain_info;
952 __le32 acquisition_data;
953 __le32 dsp_cfg_flags;
954} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
955
Ariej Marjieh720befbf2014-07-07 09:04:58 +0300956/*
957 * Aux ROC command
958 *
959 * Command requests the firmware to create a time event for a certain duration
960 * and remain on the given channel. This is done by using the Aux framework in
961 * the FW.
962 * The command was first used for Hot Spot issues - but can be used regardless
963 * to Hot Spot.
964 *
965 * ( HOT_SPOT_CMD 0x53 )
966 *
967 * @id_and_color: ID and color of the MAC
968 * @action: action to perform, one of FW_CTXT_ACTION_*
969 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
970 * event_unique_id should be the id of the time event assigned by ucode.
971 * Otherwise ignore the event_unique_id.
972 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
973 * activity.
974 * @channel_info: channel info
975 * @node_addr: Our MAC Address
976 * @reserved: reserved for alignment
977 * @apply_time: GP2 value to start (should always be the current GP2 value)
978 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
979 * time by which start of the event is allowed to be postponed.
980 * @duration: event duration in TU To calculate event duration:
981 * timeEventDuration = min(duration, remainingQuota)
982 */
983struct iwl_hs20_roc_req {
984 /* COMMON_INDEX_HDR_API_S_VER_1 hdr */
985 __le32 id_and_color;
986 __le32 action;
987 __le32 event_unique_id;
988 __le32 sta_id_and_color;
989 struct iwl_fw_channel_info channel_info;
990 u8 node_addr[ETH_ALEN];
991 __le16 reserved;
992 __le32 apply_time;
993 __le32 apply_time_max_delay;
994 __le32 duration;
995} __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
996
997/*
998 * values for AUX ROC result values
999 */
1000enum iwl_mvm_hot_spot {
1001 HOT_SPOT_RSP_STATUS_OK,
1002 HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
1003 HOT_SPOT_MAX_NUM_OF_SESSIONS,
1004};
1005
1006/*
1007 * Aux ROC command response
1008 *
1009 * In response to iwl_hs20_roc_req the FW sends this command to notify the
1010 * driver the uid of the timevent.
1011 *
1012 * ( HOT_SPOT_CMD 0x53 )
1013 *
1014 * @event_unique_id: Unique ID of time event assigned by ucode
1015 * @status: Return status 0 is success, all the rest used for specific errors
1016 */
1017struct iwl_hs20_roc_res {
1018 __le32 event_unique_id;
1019 __le32 status;
1020} __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
1021
Johannes Berg8ca151b2013-01-24 14:25:36 +01001022#define IWL_RX_INFO_PHY_CNT 8
Avri Altmana2d7b872013-07-09 01:42:17 +03001023#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
1024#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
1025#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
1026#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
1027#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
1028#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
1029#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
1030
Johannes Berg8ca151b2013-01-24 14:25:36 +01001031#define IWL_RX_INFO_AGC_IDX 1
1032#define IWL_RX_INFO_RSSI_AB_IDX 2
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +02001033#define IWL_OFDM_AGC_A_MSK 0x0000007f
1034#define IWL_OFDM_AGC_A_POS 0
1035#define IWL_OFDM_AGC_B_MSK 0x00003f80
1036#define IWL_OFDM_AGC_B_POS 7
1037#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
1038#define IWL_OFDM_AGC_CODE_POS 20
Johannes Berg8ca151b2013-01-24 14:25:36 +01001039#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
Johannes Berg8ca151b2013-01-24 14:25:36 +01001040#define IWL_OFDM_RSSI_A_POS 0
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +02001041#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
1042#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
Johannes Berg8ca151b2013-01-24 14:25:36 +01001043#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
Johannes Berg8ca151b2013-01-24 14:25:36 +01001044#define IWL_OFDM_RSSI_B_POS 16
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +02001045#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
1046#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
Johannes Berg8ca151b2013-01-24 14:25:36 +01001047
1048/**
1049 * struct iwl_rx_phy_info - phy info
1050 * (REPLY_RX_PHY_CMD = 0xc0)
1051 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
1052 * @cfg_phy_cnt: configurable DSP phy data byte count
1053 * @stat_id: configurable DSP phy data set ID
1054 * @reserved1:
1055 * @system_timestamp: GP2 at on air rise
1056 * @timestamp: TSF at on air rise
1057 * @beacon_time_stamp: beacon at on-air rise
1058 * @phy_flags: general phy flags: band, modulation, ...
1059 * @channel: channel number
1060 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
1061 * @rate_n_flags: RATE_MCS_*
1062 * @byte_count: frame's byte-count
1063 * @frame_time: frame's time on the air, based on byte count and frame rate
1064 * calculation
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +02001065 * @mac_active_msk: what MACs were active when the frame was received
Johannes Berg8ca151b2013-01-24 14:25:36 +01001066 *
1067 * Before each Rx, the device sends this data. It contains PHY information
1068 * about the reception of the packet.
1069 */
1070struct iwl_rx_phy_info {
1071 u8 non_cfg_phy_cnt;
1072 u8 cfg_phy_cnt;
1073 u8 stat_id;
1074 u8 reserved1;
1075 __le32 system_timestamp;
1076 __le64 timestamp;
1077 __le32 beacon_time_stamp;
1078 __le16 phy_flags;
1079 __le16 channel;
1080 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
1081 __le32 rate_n_flags;
1082 __le32 byte_count;
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +02001083 __le16 mac_active_msk;
Johannes Berg8ca151b2013-01-24 14:25:36 +01001084 __le16 frame_time;
1085} __packed;
1086
1087struct iwl_rx_mpdu_res_start {
1088 __le16 byte_count;
1089 __le16 reserved;
1090} __packed;
1091
1092/**
1093 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
1094 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
1095 * @RX_RES_PHY_FLAGS_MOD_CCK:
1096 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
1097 * @RX_RES_PHY_FLAGS_NARROW_BAND:
1098 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
1099 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
1100 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
1101 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
1102 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
1103 */
1104enum iwl_rx_phy_flags {
1105 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
1106 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
1107 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
1108 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1109 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1110 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1111 RX_RES_PHY_FLAGS_AGG = BIT(7),
1112 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1113 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1114 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1115};
1116
1117/**
1118 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1119 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1120 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1121 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1122 * @RX_MPDU_RES_STATUS_KEY_VALID:
1123 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1124 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1125 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1126 * in the driver.
1127 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1128 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1129 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1130 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1131 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1132 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1133 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1134 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1135 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1136 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1137 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1138 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1139 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1140 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1141 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1142 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1143 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1144 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1145 * @RX_MPDU_RES_STATUS_RRF_KILL:
1146 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1147 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1148 */
1149enum iwl_mvm_rx_status {
1150 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1151 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1152 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1153 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1154 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1155 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1156 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1157 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1158 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1159 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1160 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1161 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1162 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
Max Stepanove36e5432013-08-27 19:56:13 +03001163 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
Johannes Berg8ca151b2013-01-24 14:25:36 +01001164 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1165 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1166 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1167 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1168 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1169 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1170 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1171 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1172 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1173 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1174 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1175 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1176 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1177};
1178
1179/**
1180 * struct iwl_radio_version_notif - information on the radio version
1181 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1182 * @radio_flavor:
1183 * @radio_step:
1184 * @radio_dash:
1185 */
1186struct iwl_radio_version_notif {
1187 __le32 radio_flavor;
1188 __le32 radio_step;
1189 __le32 radio_dash;
1190} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1191
1192enum iwl_card_state_flags {
1193 CARD_ENABLED = 0x00,
1194 HW_CARD_DISABLED = 0x01,
1195 SW_CARD_DISABLED = 0x02,
1196 CT_KILL_CARD_DISABLED = 0x04,
1197 HALT_CARD_DISABLED = 0x08,
1198 CARD_DISABLED_MSK = 0x0f,
1199 CARD_IS_RX_ON = 0x10,
1200};
1201
1202/**
1203 * struct iwl_radio_version_notif - information on the radio version
1204 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1205 * @flags: %iwl_card_state_flags
1206 */
1207struct iwl_card_state_notif {
1208 __le32 flags;
1209} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1210
1211/**
Hila Gonend64048e2013-03-13 18:00:03 +02001212 * struct iwl_missed_beacons_notif - information on missed beacons
1213 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1214 * @mac_id: interface ID
1215 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1216 * beacons since last RX.
1217 * @consec_missed_beacons: number of consecutive missed beacons
1218 * @num_expected_beacons:
1219 * @num_recvd_beacons:
1220 */
1221struct iwl_missed_beacons_notif {
1222 __le32 mac_id;
1223 __le32 consec_missed_beacons_since_last_rx;
1224 __le32 consec_missed_beacons;
1225 __le32 num_expected_beacons;
1226 __le32 num_recvd_beacons;
1227} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1228
1229/**
Chaya Rachel Ivgy30269c12014-11-15 21:08:29 +02001230 * struct iwl_mfuart_load_notif - mfuart image version & status
1231 * ( MFUART_LOAD_NOTIFICATION = 0xb1 )
1232 * @installed_ver: installed image version
1233 * @external_ver: external image version
1234 * @status: MFUART loading status
1235 * @duration: MFUART loading time
1236*/
1237struct iwl_mfuart_load_notif {
1238 __le32 installed_ver;
1239 __le32 external_ver;
1240 __le32 status;
1241 __le32 duration;
1242} __packed; /*MFU_LOADER_NTFY_API_S_VER_1*/
1243
1244/**
Johannes Berg8ca151b2013-01-24 14:25:36 +01001245 * struct iwl_set_calib_default_cmd - set default value for calibration.
1246 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1247 * @calib_index: the calibration to set value for
1248 * @length: of data
1249 * @data: the value to set for the calibration result
1250 */
1251struct iwl_set_calib_default_cmd {
1252 __le16 calib_index;
1253 __le16 length;
1254 u8 data[0];
1255} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1256
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001257#define MAX_PORT_ID_NUM 2
Eliad Pellere59647e2013-11-28 14:08:50 +02001258#define MAX_MCAST_FILTERING_ADDRESSES 256
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001259
1260/**
1261 * struct iwl_mcast_filter_cmd - configure multicast filter.
1262 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1263 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1264 * to identify network interface adopted in host-device IF.
1265 * It is used by FW as index in array of addresses. This array has
1266 * MAX_PORT_ID_NUM members.
1267 * @count: Number of MAC addresses in the array
1268 * @pass_all: Set 1 to pass all multicast packets.
1269 * @bssid: current association BSSID.
1270 * @addr_list: Place holder for array of MAC addresses.
1271 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1272 */
1273struct iwl_mcast_filter_cmd {
1274 u8 filter_own;
1275 u8 port_id;
1276 u8 count;
1277 u8 pass_all;
1278 u8 bssid[6];
1279 u8 reserved[2];
1280 u8 addr_list[0];
1281} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1282
Eliad Pellerc87163b2014-01-08 10:11:11 +02001283#define MAX_BCAST_FILTERS 8
1284#define MAX_BCAST_FILTER_ATTRS 2
1285
1286/**
1287 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1288 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1289 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1290 * start of ip payload).
1291 */
1292enum iwl_mvm_bcast_filter_attr_offset {
1293 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1294 BCAST_FILTER_OFFSET_IP_END = 1,
1295};
1296
1297/**
1298 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1299 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1300 * @offset: starting offset of this pattern.
1301 * @val: value to match - big endian (MSB is the first
1302 * byte to match from offset pos).
1303 * @mask: mask to match (big endian).
1304 */
1305struct iwl_fw_bcast_filter_attr {
1306 u8 offset_type;
1307 u8 offset;
1308 __le16 reserved1;
1309 __be32 val;
1310 __be32 mask;
1311} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1312
1313/**
1314 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1315 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1316 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1317 */
1318enum iwl_mvm_bcast_filter_frame_type {
1319 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1320 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1321};
1322
1323/**
1324 * struct iwl_fw_bcast_filter - broadcast filter
1325 * @discard: discard frame (1) or let it pass (0).
1326 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1327 * @num_attrs: number of valid attributes in this filter.
1328 * @attrs: attributes of this filter. a filter is considered matched
1329 * only when all its attributes are matched (i.e. AND relationship)
1330 */
1331struct iwl_fw_bcast_filter {
1332 u8 discard;
1333 u8 frame_type;
1334 u8 num_attrs;
1335 u8 reserved1;
1336 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1337} __packed; /* BCAST_FILTER_S_VER_1 */
1338
1339/**
1340 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1341 * @default_discard: default action for this mac (discard (1) / pass (0)).
1342 * @attached_filters: bitmap of relevant filters for this mac.
1343 */
1344struct iwl_fw_bcast_mac {
1345 u8 default_discard;
1346 u8 reserved1;
1347 __le16 attached_filters;
1348} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1349
1350/**
1351 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1352 * @disable: enable (0) / disable (1)
1353 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1354 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1355 * @filters: broadcast filters
1356 * @macs: broadcast filtering configuration per-mac
1357 */
1358struct iwl_bcast_filter_cmd {
1359 u8 disable;
1360 u8 max_bcast_filters;
1361 u8 max_macs;
1362 u8 reserved1;
1363 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1364 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1365} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1366
Matti Gottlieba2d79c52014-08-25 14:41:23 +03001367/*
1368 * enum iwl_mvm_marker_id - maker ids
1369 *
1370 * The ids for different type of markers to insert into the usniffer logs
1371 */
1372enum iwl_mvm_marker_id {
1373 MARKER_ID_TX_FRAME_LATENCY = 1,
1374}; /* MARKER_ID_API_E_VER_1 */
1375
1376/**
1377 * struct iwl_mvm_marker - mark info into the usniffer logs
1378 *
1379 * (MARKER_CMD = 0xcb)
1380 *
1381 * Mark the UTC time stamp into the usniffer logs together with additional
1382 * metadata, so the usniffer output can be parsed.
1383 * In the command response the ucode will return the GP2 time.
1384 *
1385 * @dw_len: The amount of dwords following this byte including this byte.
1386 * @marker_id: A unique marker id (iwl_mvm_marker_id).
1387 * @reserved: reserved.
1388 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC
1389 * @metadata: additional meta data that will be written to the unsiffer log
1390 */
1391struct iwl_mvm_marker {
1392 u8 dwLen;
1393 u8 markerId;
1394 __le16 reserved;
1395 __le64 timestamp;
1396 __le32 metadata[0];
1397} __packed; /* MARKER_API_S_VER_1 */
1398
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001399/***********************************
1400 * Smart Fifo API
1401 ***********************************/
1402/* Smart Fifo state */
1403enum iwl_sf_state {
1404 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1405 SF_FULL_ON,
1406 SF_UNINIT,
1407 SF_INIT_OFF,
1408 SF_HW_NUM_STATES
1409};
1410
1411/* Smart Fifo possible scenario */
1412enum iwl_sf_scenario {
1413 SF_SCENARIO_SINGLE_UNICAST,
1414 SF_SCENARIO_AGG_UNICAST,
1415 SF_SCENARIO_MULTICAST,
1416 SF_SCENARIO_BA_RESP,
1417 SF_SCENARIO_TX_RESP,
1418 SF_NUM_SCENARIO
1419};
1420
1421#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1422#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1423
1424/* smart FIFO default values */
Emmanuel Grumbachb4c82ad2014-12-01 16:44:09 +02001425#define SF_W_MARK_SISO 6144
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001426#define SF_W_MARK_MIMO2 8192
1427#define SF_W_MARK_MIMO3 6144
1428#define SF_W_MARK_LEGACY 4096
1429#define SF_W_MARK_SCAN 4096
1430
Eran Hararyf4a3ee42015-02-08 13:58:50 +02001431/* SF Scenarios timers for default configuration (aligned to 32 uSec) */
1432#define SF_SINGLE_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */
1433#define SF_SINGLE_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1434#define SF_AGG_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */
1435#define SF_AGG_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1436#define SF_MCAST_IDLE_TIMER_DEF 160 /* 150 mSec */
1437#define SF_MCAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1438#define SF_BA_IDLE_TIMER_DEF 160 /* 150 uSec */
1439#define SF_BA_AGING_TIMER_DEF 400 /* 0.4 mSec */
1440#define SF_TX_RE_IDLE_TIMER_DEF 160 /* 150 uSec */
1441#define SF_TX_RE_AGING_TIMER_DEF 400 /* 0.4 mSec */
1442
1443/* SF Scenarios timers for BSS MAC configuration (aligned to 32 uSec) */
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001444#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1445#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1446#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1447#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1448#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1449#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1450#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1451#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1452#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1453#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1454
1455#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1456
Eran Harary161bdb72014-07-27 08:03:06 +03001457#define SF_CFG_DUMMY_NOTIF_OFF BIT(16)
1458
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001459/**
1460 * Smart Fifo configuration command.
Emmanuel Grumbach86974bf2014-07-31 14:32:37 +03001461 * @state: smart fifo state, types listed in enum %iwl_sf_sate.
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001462 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1463 * @long_delay_timeouts: aging and idle timer values for each scenario
1464 * in long delay state.
1465 * @full_on_timeouts: timer values for each scenario in full on state.
1466 */
1467struct iwl_sf_cfg_cmd {
Emmanuel Grumbach86974bf2014-07-31 14:32:37 +03001468 __le32 state;
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001469 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1470 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1471 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1472} __packed; /* SF_CFG_API_S_VER_2 */
1473
Eran Harary8ba2d7a2015-02-08 11:41:43 +02001474/***********************************
1475 * Location Aware Regulatory (LAR) API - MCC updates
1476 ***********************************/
1477
1478/**
1479 * struct iwl_mcc_update_cmd - Request the device to update geographic
1480 * regulatory profile according to the given MCC (Mobile Country Code).
1481 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1482 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1483 * MCC in the cmd response will be the relevant MCC in the NVM.
1484 * @mcc: given mobile country code
1485 * @source_id: the source from where we got the MCC, see iwl_mcc_source
1486 * @reserved: reserved for alignment
1487 */
1488struct iwl_mcc_update_cmd {
1489 __le16 mcc;
1490 u8 source_id;
1491 u8 reserved;
1492} __packed; /* LAR_UPDATE_MCC_CMD_API_S */
1493
1494/**
1495 * iwl_mcc_update_resp - response to MCC_UPDATE_CMD.
1496 * Contains the new channel control profile map, if changed, and the new MCC
1497 * (mobile country code).
1498 * The new MCC may be different than what was requested in MCC_UPDATE_CMD.
Jonathan Doron47c8b152014-11-27 16:55:25 +02001499 * @status: see &enum iwl_mcc_update_status
Eran Harary8ba2d7a2015-02-08 11:41:43 +02001500 * @mcc: the new applied MCC
1501 * @cap: capabilities for all channels which matches the MCC
1502 * @source_id: the MCC source, see iwl_mcc_source
1503 * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
1504 * channels, depending on platform)
1505 * @channels: channel control data map, DWORD for each channel. Only the first
1506 * 16bits are used.
1507 */
1508struct iwl_mcc_update_resp {
1509 __le32 status;
1510 __le16 mcc;
1511 u8 cap;
1512 u8 source_id;
1513 __le32 n_channels;
1514 __le32 channels[0];
1515} __packed; /* LAR_UPDATE_MCC_CMD_RESP_S */
1516
1517/**
1518 * struct iwl_mcc_chub_notif - chub notifies of mcc change
1519 * (MCC_CHUB_UPDATE_CMD = 0xc9)
1520 * The Chub (Communication Hub, CommsHUB) is a HW component that connects to
1521 * the cellular and connectivity cores that gets updates of the mcc, and
1522 * notifies the ucode directly of any mcc change.
1523 * The ucode requests the driver to request the device to update geographic
1524 * regulatory profile according to the given MCC (Mobile Country Code).
1525 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1526 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1527 * MCC in the cmd response will be the relevant MCC in the NVM.
1528 * @mcc: given mobile country code
1529 * @source_id: identity of the change originator, see iwl_mcc_source
1530 * @reserved1: reserved for alignment
1531 */
1532struct iwl_mcc_chub_notif {
1533 u16 mcc;
1534 u8 source_id;
1535 u8 reserved1;
1536} __packed; /* LAR_MCC_NOTIFY_S */
1537
1538enum iwl_mcc_update_status {
1539 MCC_RESP_NEW_CHAN_PROFILE,
1540 MCC_RESP_SAME_CHAN_PROFILE,
1541 MCC_RESP_INVALID,
1542 MCC_RESP_NVM_DISABLED,
1543 MCC_RESP_ILLEGAL,
1544 MCC_RESP_LOW_PRIORITY,
1545};
1546
1547enum iwl_mcc_source {
1548 MCC_SOURCE_OLD_FW = 0,
1549 MCC_SOURCE_ME = 1,
1550 MCC_SOURCE_BIOS = 2,
1551 MCC_SOURCE_3G_LTE_HOST = 3,
1552 MCC_SOURCE_3G_LTE_DEVICE = 4,
1553 MCC_SOURCE_WIFI = 5,
1554 MCC_SOURCE_RESERVED = 6,
1555 MCC_SOURCE_DEFAULT = 7,
1556 MCC_SOURCE_UNINITIALIZED = 8,
1557 MCC_SOURCE_GET_CURRENT = 0x10
1558};
1559
Luciano Coelhoa0a09242014-09-04 12:29:15 +03001560/* DTS measurements */
1561
1562enum iwl_dts_measurement_flags {
1563 DTS_TRIGGER_CMD_FLAGS_TEMP = BIT(0),
1564 DTS_TRIGGER_CMD_FLAGS_VOLT = BIT(1),
1565};
1566
1567/**
1568 * iwl_dts_measurement_cmd - request DTS temperature and/or voltage measurements
1569 *
1570 * @flags: indicates which measurements we want as specified in &enum
1571 * iwl_dts_measurement_flags
1572 */
1573struct iwl_dts_measurement_cmd {
1574 __le32 flags;
1575} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */
1576
1577/**
1578 * iwl_dts_measurement_notif - notification received with the measurements
1579 *
1580 * @temp: the measured temperature
1581 * @voltage: the measured voltage
1582 */
1583struct iwl_dts_measurement_notif {
1584 __le32 temp;
1585 __le32 voltage;
1586} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S */
1587
Arik Nemtsov77c5d7e2014-09-11 13:10:08 +03001588/***********************************
1589 * TDLS API
1590 ***********************************/
1591
1592/* Type of TDLS request */
1593enum iwl_tdls_channel_switch_type {
1594 TDLS_SEND_CHAN_SW_REQ = 0,
1595 TDLS_SEND_CHAN_SW_RESP_AND_MOVE_CH,
1596 TDLS_MOVE_CH,
1597}; /* TDLS_STA_CHANNEL_SWITCH_CMD_TYPE_API_E_VER_1 */
1598
1599/**
1600 * Switch timing sub-element in a TDLS channel-switch command
1601 * @frame_timestamp: GP2 timestamp of channel-switch request/response packet
1602 * received from peer
1603 * @max_offchan_duration: What amount of microseconds out of a DTIM is given
1604 * to the TDLS off-channel communication. For instance if the DTIM is
1605 * 200TU and the TDLS peer is to be given 25% of the time, the value
1606 * given will be 50TU, or 50 * 1024 if translated into microseconds.
1607 * @switch_time: switch time the peer sent in its channel switch timing IE
1608 * @switch_timout: switch timeout the peer sent in its channel switch timing IE
1609 */
1610struct iwl_tdls_channel_switch_timing {
1611 __le32 frame_timestamp; /* GP2 time of peer packet Rx */
1612 __le32 max_offchan_duration; /* given in micro-seconds */
1613 __le32 switch_time; /* given in micro-seconds */
1614 __le32 switch_timeout; /* given in micro-seconds */
1615} __packed; /* TDLS_STA_CHANNEL_SWITCH_TIMING_DATA_API_S_VER_1 */
1616
1617#define IWL_TDLS_CH_SW_FRAME_MAX_SIZE 200
1618
1619/**
1620 * TDLS channel switch frame template
1621 *
1622 * A template representing a TDLS channel-switch request or response frame
1623 *
1624 * @switch_time_offset: offset to the channel switch timing IE in the template
1625 * @tx_cmd: Tx parameters for the frame
1626 * @data: frame data
1627 */
1628struct iwl_tdls_channel_switch_frame {
1629 __le32 switch_time_offset;
1630 struct iwl_tx_cmd tx_cmd;
1631 u8 data[IWL_TDLS_CH_SW_FRAME_MAX_SIZE];
1632} __packed; /* TDLS_STA_CHANNEL_SWITCH_FRAME_API_S_VER_1 */
1633
1634/**
1635 * TDLS channel switch command
1636 *
1637 * The command is sent to initiate a channel switch and also in response to
1638 * incoming TDLS channel-switch request/response packets from remote peers.
1639 *
1640 * @switch_type: see &enum iwl_tdls_channel_switch_type
1641 * @peer_sta_id: station id of TDLS peer
1642 * @ci: channel we switch to
1643 * @timing: timing related data for command
1644 * @frame: channel-switch request/response template, depending to switch_type
1645 */
1646struct iwl_tdls_channel_switch_cmd {
1647 u8 switch_type;
1648 __le32 peer_sta_id;
1649 struct iwl_fw_channel_info ci;
1650 struct iwl_tdls_channel_switch_timing timing;
1651 struct iwl_tdls_channel_switch_frame frame;
1652} __packed; /* TDLS_STA_CHANNEL_SWITCH_CMD_API_S_VER_1 */
1653
1654/**
1655 * TDLS channel switch start notification
1656 *
1657 * @status: non-zero on success
1658 * @offchannel_duration: duration given in microseconds
1659 * @sta_id: peer currently performing the channel-switch with
1660 */
1661struct iwl_tdls_channel_switch_notif {
1662 __le32 status;
1663 __le32 offchannel_duration;
1664 __le32 sta_id;
1665} __packed; /* TDLS_STA_CHANNEL_SWITCH_NTFY_API_S_VER_1 */
1666
Arik Nemtsov307e4722014-09-15 18:48:59 +03001667/**
1668 * TDLS station info
1669 *
1670 * @sta_id: station id of the TDLS peer
1671 * @tx_to_peer_tid: TID reserved vs. the peer for FW based Tx
1672 * @tx_to_peer_ssn: initial SSN the FW should use for Tx on its TID vs the peer
1673 * @is_initiator: 1 if the peer is the TDLS link initiator, 0 otherwise
1674 */
1675struct iwl_tdls_sta_info {
1676 u8 sta_id;
1677 u8 tx_to_peer_tid;
1678 __le16 tx_to_peer_ssn;
1679 __le32 is_initiator;
1680} __packed; /* TDLS_STA_INFO_VER_1 */
1681
1682/**
1683 * TDLS basic config command
1684 *
1685 * @id_and_color: MAC id and color being configured
1686 * @tdls_peer_count: amount of currently connected TDLS peers
1687 * @tx_to_ap_tid: TID reverved vs. the AP for FW based Tx
1688 * @tx_to_ap_ssn: initial SSN the FW should use for Tx on its TID vs. the AP
1689 * @sta_info: per-station info. Only the first tdls_peer_count entries are set
1690 * @pti_req_data_offset: offset of network-level data for the PTI template
1691 * @pti_req_tx_cmd: Tx parameters for PTI request template
1692 * @pti_req_template: PTI request template data
1693 */
1694struct iwl_tdls_config_cmd {
1695 __le32 id_and_color; /* mac id and color */
1696 u8 tdls_peer_count;
1697 u8 tx_to_ap_tid;
1698 __le16 tx_to_ap_ssn;
1699 struct iwl_tdls_sta_info sta_info[IWL_MVM_TDLS_STA_COUNT];
1700
1701 __le32 pti_req_data_offset;
1702 struct iwl_tx_cmd pti_req_tx_cmd;
1703 u8 pti_req_template[0];
1704} __packed; /* TDLS_CONFIG_CMD_API_S_VER_1 */
1705
1706/**
1707 * TDLS per-station config information from FW
1708 *
1709 * @sta_id: station id of the TDLS peer
1710 * @tx_to_peer_last_seq: last sequence number used by FW during FW-based Tx to
1711 * the peer
1712 */
1713struct iwl_tdls_config_sta_info_res {
1714 __le16 sta_id;
1715 __le16 tx_to_peer_last_seq;
1716} __packed; /* TDLS_STA_INFO_RSP_VER_1 */
1717
1718/**
1719 * TDLS config information from FW
1720 *
1721 * @tx_to_ap_last_seq: last sequence number used by FW during FW-based Tx to AP
1722 * @sta_info: per-station TDLS config information
1723 */
1724struct iwl_tdls_config_res {
1725 __le32 tx_to_ap_last_seq;
1726 struct iwl_tdls_config_sta_info_res sta_info[IWL_MVM_TDLS_STA_COUNT];
1727} __packed; /* TDLS_CONFIG_RSP_API_S_VER_1 */
1728
Liad Kaufman04fd2c22014-12-15 17:54:16 +02001729#define TX_FIFO_MAX_NUM 8
1730#define RX_FIFO_MAX_NUM 2
1731
1732/**
1733 * Shared memory configuration information from the FW
1734 *
1735 * @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not
1736 * accessible)
1737 * @shared_mem_size: shared memory size
1738 * @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to
1739 * 0x0 as accessible only via DBGM RDAT)
1740 * @sample_buff_size: internal sample buff size
1741 * @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre
1742 * 8000 HW set to 0x0 as not accessible)
1743 * @txfifo_size: size of TXF0 ... TXF7
1744 * @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0
1745 * @page_buff_addr: used by UMAC and performance debug (page miss analysis),
1746 * when paging is not supported this should be 0
1747 * @page_buff_size: size of %page_buff_addr
1748 */
1749struct iwl_shared_mem_cfg {
1750 __le32 shared_mem_addr;
1751 __le32 shared_mem_size;
1752 __le32 sample_buff_addr;
1753 __le32 sample_buff_size;
1754 __le32 txfifo_addr;
1755 __le32 txfifo_size[TX_FIFO_MAX_NUM];
1756 __le32 rxfifo_size[RX_FIFO_MAX_NUM];
1757 __le32 page_buff_addr;
1758 __le32 page_buff_size;
1759} __packed; /* SHARED_MEM_ALLOC_API_S_VER_1 */
1760
Johannes Berg8ca151b2013-01-24 14:25:36 +01001761#endif /* __fw_api_h__ */