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Dinh Nguyen66314222012-07-18 16:07:18 -06001/*
Dinh Nguyen56c5c132013-04-11 10:55:26 -05002 * Copyright 2011-2012 Calxeda, Inc.
3 * Copyright (C) 2012-2013 Altera Corporation <www.altera.com>
Dinh Nguyen66314222012-07-18 16:07:18 -06004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
Dinh Nguyen56c5c132013-04-11 10:55:26 -050015 * Based from clk-highbank.c
16 *
Dinh Nguyen66314222012-07-18 16:07:18 -060017 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20#include <linux/clk.h>
21#include <linux/clkdev.h>
22#include <linux/clk-provider.h>
Dinh Nguyen56c5c132013-04-11 10:55:26 -050023#include <linux/io.h>
24#include <linux/of.h>
Dinh Nguyen6a7e7122013-12-09 17:16:38 -060025#include <linux/of_address.h>
Dinh Nguyen66314222012-07-18 16:07:18 -060026
Steffen Trumtrar97259e92014-01-06 10:27:37 -060027#include "clk.h"
Dinh Nguyen56c5c132013-04-11 10:55:26 -050028
Steffen Trumtrar97259e92014-01-06 10:27:37 -060029void __iomem *clk_mgr_base_addr;
Dinh Nguyen6a7e7122013-12-09 17:16:38 -060030
Dinh Nguyen95bb9f52014-03-13 16:08:01 -050031static const struct of_device_id socfpga_child_clocks[] __initconst = {
Dinh Nguyen6a7e7122013-12-09 17:16:38 -060032 { .compatible = "altr,socfpga-pll-clock", socfpga_pll_init, },
33 { .compatible = "altr,socfpga-perip-clk", socfpga_periph_init, },
34 { .compatible = "altr,socfpga-gate-clk", socfpga_gate_init, },
35 {},
36};
37
38static void __init socfpga_clkmgr_init(struct device_node *node)
39{
40 clk_mgr_base_addr = of_iomap(node, 0);
41 of_clk_init(socfpga_child_clocks);
42}
43CLK_OF_DECLARE(socfpga_mgr, "altr,clk-mgr", socfpga_clkmgr_init);
Dinh Nguyen825f0c22013-06-05 10:02:55 -050044