Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 1 | /* linux/arch/arm/plat-s3c/pm.c |
| 2 | * |
| 3 | * Copyright 2008 Openmoko, Inc. |
| 4 | * Copyright 2004,2006,2008 Simtec Electronics |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * http://armlinux.simtec.co.uk/ |
| 7 | * |
| 8 | * S3C common power management (suspend to ram) support. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/suspend.h> |
| 17 | #include <linux/errno.h> |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 18 | #include <linux/delay.h> |
| 19 | #include <linux/serial_core.h> |
Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 20 | #include <linux/io.h> |
| 21 | |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 22 | #include <asm/cacheflush.h> |
| 23 | #include <mach/hardware.h> |
| 24 | |
| 25 | #include <plat/regs-serial.h> |
| 26 | #include <mach/regs-clock.h> |
| 27 | #include <mach/regs-gpio.h> |
| 28 | #include <mach/regs-mem.h> |
| 29 | #include <mach/regs-irq.h> |
Ben Dooks | 56b3442 | 2008-12-12 00:24:12 +0000 | [diff] [blame] | 30 | #include <asm/irq.h> |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 31 | |
Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 32 | #include <plat/pm.h> |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 33 | #include <plat/pm-core.h> |
Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 34 | |
| 35 | /* for external use */ |
| 36 | |
| 37 | unsigned long s3c_pm_flags; |
| 38 | |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 39 | /* Debug code: |
| 40 | * |
| 41 | * This code supports debug output to the low level UARTs for use on |
| 42 | * resume before the console layer is available. |
| 43 | */ |
| 44 | |
Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 45 | #ifdef CONFIG_S3C2410_PM_DEBUG |
| 46 | extern void printascii(const char *); |
| 47 | |
| 48 | void s3c_pm_dbg(const char *fmt, ...) |
| 49 | { |
| 50 | va_list va; |
| 51 | char buff[256]; |
| 52 | |
| 53 | va_start(va, fmt); |
| 54 | vsprintf(buff, fmt, va); |
| 55 | va_end(va); |
| 56 | |
| 57 | printascii(buff); |
| 58 | } |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 59 | |
| 60 | static inline void s3c_pm_debug_init(void) |
| 61 | { |
| 62 | /* restart uart clocks so we can use them to output */ |
| 63 | s3c_pm_debug_init_uart(); |
| 64 | } |
| 65 | |
| 66 | #else |
| 67 | #define s3c_pm_debug_init() do { } while(0) |
| 68 | |
Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 69 | #endif /* CONFIG_S3C2410_PM_DEBUG */ |
| 70 | |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 71 | /* Save the UART configurations if we are configured for debug. */ |
| 72 | |
| 73 | #ifdef CONFIG_S3C2410_PM_DEBUG |
| 74 | |
| 75 | #define SAVE_UART(va) \ |
| 76 | SAVE_ITEM((va) + S3C2410_ULCON), \ |
| 77 | SAVE_ITEM((va) + S3C2410_UCON), \ |
| 78 | SAVE_ITEM((va) + S3C2410_UFCON), \ |
| 79 | SAVE_ITEM((va) + S3C2410_UMCON), \ |
| 80 | SAVE_ITEM((va) + S3C2410_UBRDIV) |
| 81 | |
| 82 | static struct sleep_save uart_save[] = { |
| 83 | SAVE_UART(S3C_VA_UART0), |
| 84 | SAVE_UART(S3C_VA_UART1), |
| 85 | #ifndef CONFIG_CPU_S3C2400 |
| 86 | SAVE_UART(S3C_VA_UART2), |
| 87 | #endif |
| 88 | }; |
| 89 | |
| 90 | static void s3c_pm_save_uart(void) |
| 91 | { |
| 92 | s3c_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); |
| 93 | } |
| 94 | |
| 95 | static void s3c_pm_restore_uart(void) |
| 96 | { |
| 97 | s3c_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); |
| 98 | } |
| 99 | #else |
| 100 | static void s3c_pm_save_uart(void) { } |
| 101 | static void s3c_pm_restore_uart(void) { } |
| 102 | #endif |
| 103 | |
Ben Dooks | 56b3442 | 2008-12-12 00:24:12 +0000 | [diff] [blame] | 104 | /* The IRQ ext-int code goes here, it is too small to currently bother |
| 105 | * with its own file. */ |
| 106 | |
| 107 | unsigned long s3c_irqwake_intmask = 0xffffffffL; |
| 108 | unsigned long s3c_irqwake_eintmask = 0xffffffffL; |
| 109 | |
| 110 | int s3c_irqext_wake(unsigned int irqno, unsigned int state) |
| 111 | { |
| 112 | unsigned long bit = 1L << IRQ_EINT_BIT(irqno); |
| 113 | |
| 114 | if (!(s3c_irqwake_eintallow & bit)) |
| 115 | return -ENOENT; |
| 116 | |
| 117 | printk(KERN_INFO "wake %s for irq %d\n", |
| 118 | state ? "enabled" : "disabled", irqno); |
| 119 | |
| 120 | if (!state) |
| 121 | s3c_irqwake_eintmask |= bit; |
| 122 | else |
| 123 | s3c_irqwake_eintmask &= ~bit; |
| 124 | |
| 125 | return 0; |
| 126 | } |
Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 127 | |
| 128 | /* helper functions to save and restore register state */ |
| 129 | |
| 130 | /** |
| 131 | * s3c_pm_do_save() - save a set of registers for restoration on resume. |
| 132 | * @ptr: Pointer to an array of registers. |
| 133 | * @count: Size of the ptr array. |
| 134 | * |
| 135 | * Run through the list of registers given, saving their contents in the |
| 136 | * array for later restoration when we wakeup. |
| 137 | */ |
| 138 | void s3c_pm_do_save(struct sleep_save *ptr, int count) |
| 139 | { |
| 140 | for (; count > 0; count--, ptr++) { |
| 141 | ptr->val = __raw_readl(ptr->reg); |
| 142 | S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val); |
| 143 | } |
| 144 | } |
| 145 | |
| 146 | /** |
| 147 | * s3c_pm_do_restore() - restore register values from the save list. |
| 148 | * @ptr: Pointer to an array of registers. |
| 149 | * @count: Size of the ptr array. |
| 150 | * |
| 151 | * Restore the register values saved from s3c_pm_do_save(). |
| 152 | * |
| 153 | * Note, we do not use S3C_PMDBG() in here, as the system may not have |
| 154 | * restore the UARTs state yet |
| 155 | */ |
| 156 | |
| 157 | void s3c_pm_do_restore(struct sleep_save *ptr, int count) |
| 158 | { |
| 159 | for (; count > 0; count--, ptr++) { |
| 160 | printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n", |
| 161 | ptr->reg, ptr->val, __raw_readl(ptr->reg)); |
| 162 | |
| 163 | __raw_writel(ptr->val, ptr->reg); |
| 164 | } |
| 165 | } |
| 166 | |
| 167 | /** |
| 168 | * s3c_pm_do_restore_core() - early restore register values from save list. |
| 169 | * |
| 170 | * This is similar to s3c_pm_do_restore() except we try and minimise the |
| 171 | * side effects of the function in case registers that hardware might need |
| 172 | * to work has been restored. |
| 173 | * |
| 174 | * WARNING: Do not put any debug in here that may effect memory or use |
| 175 | * peripherals, as things may be changing! |
| 176 | */ |
| 177 | |
| 178 | void s3c_pm_do_restore_core(struct sleep_save *ptr, int count) |
| 179 | { |
| 180 | for (; count > 0; count--, ptr++) |
| 181 | __raw_writel(ptr->val, ptr->reg); |
| 182 | } |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 183 | |
| 184 | /* s3c2410_pm_show_resume_irqs |
| 185 | * |
| 186 | * print any IRQs asserted at resume time (ie, we woke from) |
| 187 | */ |
| 188 | static void s3c_pm_show_resume_irqs(int start, unsigned long which, |
| 189 | unsigned long mask) |
| 190 | { |
| 191 | int i; |
| 192 | |
| 193 | which &= ~mask; |
| 194 | |
| 195 | for (i = 0; i <= 31; i++) { |
| 196 | if (which & (1L<<i)) { |
| 197 | S3C_PMDBG("IRQ %d asserted at resume\n", start+i); |
| 198 | } |
| 199 | } |
| 200 | } |
| 201 | |
| 202 | |
| 203 | void (*pm_cpu_prep)(void); |
| 204 | void (*pm_cpu_sleep)(void); |
| 205 | |
| 206 | #define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) |
| 207 | |
| 208 | /* s3c_pm_enter |
| 209 | * |
| 210 | * central control for sleep/resume process |
| 211 | */ |
| 212 | |
| 213 | static int s3c_pm_enter(suspend_state_t state) |
| 214 | { |
| 215 | unsigned long regs_save[16]; |
| 216 | |
| 217 | /* ensure the debug is initialised (if enabled) */ |
| 218 | |
| 219 | s3c_pm_debug_init(); |
| 220 | |
| 221 | S3C_PMDBG("%s(%d)\n", __func__, state); |
| 222 | |
| 223 | if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { |
| 224 | printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__); |
| 225 | return -EINVAL; |
| 226 | } |
| 227 | |
| 228 | /* check if we have anything to wake-up with... bad things seem |
| 229 | * to happen if you suspend with no wakeup (system will often |
| 230 | * require a full power-cycle) |
| 231 | */ |
| 232 | |
| 233 | if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && |
| 234 | !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { |
| 235 | printk(KERN_ERR "%s: No wake-up sources!\n", __func__); |
| 236 | printk(KERN_ERR "%s: Aborting sleep\n", __func__); |
| 237 | return -EINVAL; |
| 238 | } |
| 239 | |
| 240 | /* prepare check area if configured */ |
| 241 | |
| 242 | s3c_pm_check_prepare(); |
| 243 | |
| 244 | /* store the physical address of the register recovery block */ |
| 245 | |
| 246 | s3c_sleep_save_phys = virt_to_phys(regs_save); |
| 247 | |
| 248 | S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys); |
| 249 | |
| 250 | /* save all necessary core registers not covered by the drivers */ |
| 251 | |
| 252 | s3c_pm_save_gpios(); |
| 253 | s3c_pm_save_uart(); |
| 254 | s3c_pm_save_core(); |
| 255 | |
| 256 | /* set the irq configuration for wake */ |
| 257 | |
| 258 | s3c_pm_configure_extint(); |
| 259 | |
| 260 | S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n", |
| 261 | s3c_irqwake_intmask, s3c_irqwake_eintmask); |
| 262 | |
| 263 | s3c_pm_arch_prepare_irqs(); |
| 264 | |
| 265 | /* call cpu specific preparation */ |
| 266 | |
| 267 | pm_cpu_prep(); |
| 268 | |
| 269 | /* flush cache back to ram */ |
| 270 | |
| 271 | flush_cache_all(); |
| 272 | |
| 273 | s3c_pm_check_store(); |
| 274 | |
| 275 | /* send the cpu to sleep... */ |
| 276 | |
| 277 | s3c_pm_arch_stop_clocks(); |
| 278 | |
| 279 | /* s3c2410_cpu_save will also act as our return point from when |
| 280 | * we resume as it saves its own register state, so use the return |
| 281 | * code to differentiate return from save and return from sleep */ |
| 282 | |
Ben Dooks | ef30e14 | 2008-12-12 00:24:19 +0000 | [diff] [blame^] | 283 | if (s3c_cpu_save(regs_save) == 0) { |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 284 | flush_cache_all(); |
Ben Dooks | ef30e14 | 2008-12-12 00:24:19 +0000 | [diff] [blame^] | 285 | S3C_PMDBG("preparing to sleep\n"); |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 286 | pm_cpu_sleep(); |
| 287 | } |
| 288 | |
| 289 | /* restore the cpu state using the kernel's cpu init code. */ |
| 290 | |
| 291 | cpu_init(); |
| 292 | |
| 293 | /* restore the system state */ |
| 294 | |
| 295 | s3c_pm_restore_core(); |
| 296 | s3c_pm_restore_uart(); |
| 297 | s3c_pm_restore_gpios(); |
| 298 | |
| 299 | s3c_pm_debug_init(); |
| 300 | |
| 301 | /* check what irq (if any) restored the system */ |
| 302 | |
| 303 | s3c_pm_arch_show_resume_irqs(); |
| 304 | |
| 305 | S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); |
| 306 | |
| 307 | s3c_pm_check_restore(); |
| 308 | |
| 309 | /* ok, let's return from sleep */ |
| 310 | |
| 311 | S3C_PMDBG("S3C PM Resume (post-restore)\n"); |
| 312 | return 0; |
| 313 | } |
| 314 | |
| 315 | static struct platform_suspend_ops s3c_pm_ops = { |
| 316 | .enter = s3c_pm_enter, |
| 317 | .valid = suspend_valid_only_mem, |
| 318 | }; |
| 319 | |
Ben Dooks | 4e59c25 | 2008-12-12 00:24:18 +0000 | [diff] [blame] | 320 | /* s3c_pm_init |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 321 | * |
| 322 | * Attach the power management functions. This should be called |
| 323 | * from the board specific initialisation if the board supports |
| 324 | * it. |
| 325 | */ |
| 326 | |
Ben Dooks | 4e59c25 | 2008-12-12 00:24:18 +0000 | [diff] [blame] | 327 | int __init s3c_pm_init(void) |
Ben Dooks | 2261e0e | 2008-12-12 00:24:08 +0000 | [diff] [blame] | 328 | { |
| 329 | printk("S3C Power Management, Copyright 2004 Simtec Electronics\n"); |
| 330 | |
| 331 | suspend_set_ops(&s3c_pm_ops); |
| 332 | return 0; |
| 333 | } |