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Christian Pellegrin1cad1de2008-11-15 08:58:16 +01001/*
2 * uda134x.c -- UDA134X ALSA SoC Codec driver
3 *
4 * Modifications by Christian Pellegrin <chripell@evolware.org>
5 *
6 * Copyright 2007 Dension Audio Systems Ltd.
7 * Author: Zoltan Devai
8 *
9 * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/delay.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090018#include <linux/slab.h>
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010019#include <sound/pcm.h>
20#include <sound/pcm_params.h>
21#include <sound/soc.h>
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010022#include <sound/initval.h>
23
24#include <sound/uda134x.h>
25#include <sound/l3.h>
26
Mark Brown72f2b892008-11-18 12:25:46 +000027#include "uda134x.h"
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010028
29
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010030#define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
31#define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
32 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
33
34struct uda134x_priv {
35 int sysclk;
36 int dai_fmt;
37
38 struct snd_pcm_substream *master_substream;
39 struct snd_pcm_substream *slave_substream;
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +020040
41 struct regmap *regmap;
42 struct uda134x_platform_data *pd;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010043};
44
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +020045static const struct reg_default uda134x_reg_defaults[] = {
46 { UDA134X_EA000, 0x04 },
47 { UDA134X_EA001, 0x04 },
48 { UDA134X_EA010, 0x04 },
49 { UDA134X_EA011, 0x00 },
50 { UDA134X_EA100, 0x00 },
51 { UDA134X_EA101, 0x00 },
52 { UDA134X_EA110, 0x00 },
53 { UDA134X_EA111, 0x00 },
54 { UDA134X_STATUS0, 0x00 },
55 { UDA134X_STATUS1, 0x03 },
56 { UDA134X_DATA000, 0x00 },
57 { UDA134X_DATA001, 0x00 },
58 { UDA134X_DATA010, 0x00 },
59 { UDA134X_DATA011, 0x00 },
60 { UDA134X_DATA1, 0x00 },
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010061};
62
63/*
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010064 * Write to the uda134x registers
65 *
66 */
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +020067static int uda134x_regmap_write(void *context, unsigned int reg,
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010068 unsigned int value)
69{
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +020070 struct uda134x_platform_data *pd = context;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010071 int ret;
72 u8 addr;
73 u8 data = value;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010074
75 switch (reg) {
76 case UDA134X_STATUS0:
77 case UDA134X_STATUS1:
78 addr = UDA134X_STATUS_ADDR;
Lars-Peter Clausen82c7b532015-07-13 12:26:46 +020079 data |= (reg - UDA134X_STATUS0) << 7;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010080 break;
81 case UDA134X_DATA000:
82 case UDA134X_DATA001:
83 case UDA134X_DATA010:
Vladimir Zapolskiyed632ad2010-06-24 15:17:07 +040084 case UDA134X_DATA011:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010085 addr = UDA134X_DATA0_ADDR;
Lars-Peter Clausen82c7b532015-07-13 12:26:46 +020086 data |= (reg - UDA134X_DATA000) << 6;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +010087 break;
88 case UDA134X_DATA1:
89 addr = UDA134X_DATA1_ADDR;
90 break;
91 default:
92 /* It's an extended address register */
93 addr = (reg | UDA134X_EXTADDR_PREFIX);
94
95 ret = l3_write(&pd->l3,
96 UDA134X_DATA0_ADDR, &addr, 1);
97 if (ret != 1)
98 return -EIO;
99
100 addr = UDA134X_DATA0_ADDR;
101 data = (value | UDA134X_EXTDATA_PREFIX);
102 break;
103 }
104
105 ret = l3_write(&pd->l3,
106 addr, &data, 1);
107 if (ret != 1)
108 return -EIO;
109
110 return 0;
111}
112
113static inline void uda134x_reset(struct snd_soc_codec *codec)
114{
Lars-Peter Clausenef3355d2015-07-13 12:26:48 +0200115 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
116 unsigned int mask = 1<<6;
117
118 regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, mask);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100119 msleep(1);
Lars-Peter Clausenef3355d2015-07-13 12:26:48 +0200120 regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, 0);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100121}
122
123static int uda134x_mute(struct snd_soc_dai *dai, int mute)
124{
Lars-Peter Clausenef3355d2015-07-13 12:26:48 +0200125 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(dai->codec);
126 unsigned int mask = 1<<2;
127 unsigned int val;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100128
129 pr_debug("%s mute: %d\n", __func__, mute);
130
131 if (mute)
Lars-Peter Clausenef3355d2015-07-13 12:26:48 +0200132 val = mask;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100133 else
Lars-Peter Clausenef3355d2015-07-13 12:26:48 +0200134 val = 0;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100135
Lars-Peter Clausenef3355d2015-07-13 12:26:48 +0200136 return regmap_update_bits(uda134x->regmap, UDA134X_DATA010, mask, val);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100137}
138
Mark Browndee89c42008-11-18 22:11:38 +0000139static int uda134x_startup(struct snd_pcm_substream *substream,
140 struct snd_soc_dai *dai)
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100141{
Mark Browne6968a12012-04-04 15:58:16 +0100142 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900143 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100144 struct snd_pcm_runtime *master_runtime;
145
146 if (uda134x->master_substream) {
147 master_runtime = uda134x->master_substream->runtime;
148
149 pr_debug("%s constraining to %d bits at %d\n", __func__,
150 master_runtime->sample_bits,
151 master_runtime->rate);
152
153 snd_pcm_hw_constraint_minmax(substream->runtime,
154 SNDRV_PCM_HW_PARAM_RATE,
155 master_runtime->rate,
156 master_runtime->rate);
157
158 snd_pcm_hw_constraint_minmax(substream->runtime,
159 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
160 master_runtime->sample_bits,
161 master_runtime->sample_bits);
162
163 uda134x->slave_substream = substream;
164 } else
165 uda134x->master_substream = substream;
166
167 return 0;
168}
169
Mark Browndee89c42008-11-18 22:11:38 +0000170static void uda134x_shutdown(struct snd_pcm_substream *substream,
171 struct snd_soc_dai *dai)
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100172{
Mark Browne6968a12012-04-04 15:58:16 +0100173 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900174 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100175
176 if (uda134x->master_substream == substream)
177 uda134x->master_substream = uda134x->slave_substream;
178
179 uda134x->slave_substream = NULL;
180}
181
182static int uda134x_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +0000183 struct snd_pcm_hw_params *params,
184 struct snd_soc_dai *dai)
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100185{
Lars-Peter Clausenab642462014-03-13 21:24:54 +0100186 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900187 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Lars-Peter Clausenef3355d2015-07-13 12:26:48 +0200188 unsigned int hw_params = 0;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100189
190 if (substream == uda134x->slave_substream) {
191 pr_debug("%s ignoring hw_params for slave substream\n",
192 __func__);
193 return 0;
194 }
195
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100196 pr_debug("%s sysclk: %d, rate:%d\n", __func__,
197 uda134x->sysclk, params_rate(params));
198
199 /* set SYSCLK / fs ratio */
200 switch (uda134x->sysclk / params_rate(params)) {
201 case 512:
202 break;
203 case 384:
204 hw_params |= (1<<4);
205 break;
206 case 256:
207 hw_params |= (1<<5);
208 break;
209 default:
210 printk(KERN_ERR "%s unsupported fs\n", __func__);
211 return -EINVAL;
212 }
213
214 pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
215 uda134x->dai_fmt, params_format(params));
216
217 /* set DAI format and word length */
218 switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
219 case SND_SOC_DAIFMT_I2S:
220 break;
221 case SND_SOC_DAIFMT_RIGHT_J:
Mark Brownaa9ffad2014-07-31 12:49:26 +0100222 switch (params_width(params)) {
223 case 16:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100224 hw_params |= (1<<1);
225 break;
Mark Brownaa9ffad2014-07-31 12:49:26 +0100226 case 18:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100227 hw_params |= (1<<2);
228 break;
Mark Brownaa9ffad2014-07-31 12:49:26 +0100229 case 20:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100230 hw_params |= ((1<<2) | (1<<1));
231 break;
232 default:
233 printk(KERN_ERR "%s unsupported format (right)\n",
234 __func__);
235 return -EINVAL;
236 }
237 break;
238 case SND_SOC_DAIFMT_LEFT_J:
239 hw_params |= (1<<3);
240 break;
241 default:
242 printk(KERN_ERR "%s unsupported format\n", __func__);
243 return -EINVAL;
244 }
245
Lars-Peter Clausenef3355d2015-07-13 12:26:48 +0200246 return regmap_update_bits(uda134x->regmap, UDA134X_STATUS0,
247 STATUS0_SYSCLK_MASK | STATUS0_DAIFMT_MASK, hw_params);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100248}
249
250static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
251 int clk_id, unsigned int freq, int dir)
252{
253 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900254 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100255
Roel Kluin449bd542009-05-27 17:08:39 -0700256 pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100257 clk_id, freq, dir);
258
259 /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
260 because the codec is slave. Of course limitations of the clock
261 master (the IIS controller) apply.
262 We'll error out on set_hw_params if it's not OK */
263 if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
264 uda134x->sysclk = freq;
265 return 0;
266 }
267
268 printk(KERN_ERR "%s unsupported sysclk\n", __func__);
269 return -EINVAL;
270}
271
272static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
273 unsigned int fmt)
274{
275 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900276 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100277
278 pr_debug("%s fmt: %08X\n", __func__, fmt);
279
280 /* codec supports only full slave mode */
281 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
282 printk(KERN_ERR "%s unsupported slave mode\n", __func__);
283 return -EINVAL;
284 }
285
286 /* no support for clock inversion */
287 if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
288 printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
289 return -EINVAL;
290 }
291
292 /* We can't setup DAI format here as it depends on the word bit num */
293 /* so let's just store the value for later */
294 uda134x->dai_fmt = fmt;
295
296 return 0;
297}
298
299static int uda134x_set_bias_level(struct snd_soc_codec *codec,
300 enum snd_soc_bias_level level)
301{
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200302 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
303 struct uda134x_platform_data *pd = uda134x->pd;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100304 pr_debug("%s bias level %d\n", __func__, level);
305
306 switch (level) {
307 case SND_SOC_BIAS_ON:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100308 break;
309 case SND_SOC_BIAS_PREPARE:
310 /* power on */
311 if (pd->power) {
312 pd->power(1);
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200313 regcache_sync(uda134x->regmap);
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100314 }
315 break;
316 case SND_SOC_BIAS_STANDBY:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100317 break;
318 case SND_SOC_BIAS_OFF:
319 /* power off */
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200320 if (pd->power) {
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100321 pd->power(0);
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200322 regcache_mark_dirty(uda134x->regmap);
323 }
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100324 break;
325 }
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100326 return 0;
327}
328
329static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
330 "Minimum2", "Maximum"};
331static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
332static const char *uda134x_mixmode[] = {"Differential", "Analog1",
333 "Analog2", "Both"};
334
335static const struct soc_enum uda134x_mixer_enum[] = {
336SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
337SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
338SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
339};
340
341static const struct snd_kcontrol_new uda1341_snd_controls[] = {
342SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
343SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
344SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
345SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
346
347SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
348SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
349
350SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
351SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
352
353SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
354SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
355SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
356
357SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
358SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
359SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
360
361SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
362SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
363SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
364SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
365SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
366SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
367};
368
369static const struct snd_kcontrol_new uda1340_snd_controls[] = {
370SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
371
372SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
373SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
374
375SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
376SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
377
378SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
379};
380
Vladimir Zapolskiyb28528a2010-04-26 14:56:57 +0400381static const struct snd_kcontrol_new uda1345_snd_controls[] = {
382SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
383
384SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
385
386SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
387};
388
Russell King113591e2013-07-30 11:18:52 +0100389/* UDA1341 has the DAC/ADC power down in STATUS1 */
390static const struct snd_soc_dapm_widget uda1341_dapm_widgets[] = {
391 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_STATUS1, 0, 0),
392 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_STATUS1, 1, 0),
393};
394
395/* UDA1340/4/5 has the DAC/ADC pwoer down in DATA0 11 */
396static const struct snd_soc_dapm_widget uda1340_dapm_widgets[] = {
397 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_DATA011, 0, 0),
398 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_DATA011, 1, 0),
399};
400
401/* Common DAPM widgets */
402static const struct snd_soc_dapm_widget uda134x_dapm_widgets[] = {
403 SND_SOC_DAPM_INPUT("VINL1"),
404 SND_SOC_DAPM_INPUT("VINR1"),
405 SND_SOC_DAPM_INPUT("VINL2"),
406 SND_SOC_DAPM_INPUT("VINR2"),
407 SND_SOC_DAPM_OUTPUT("VOUTL"),
408 SND_SOC_DAPM_OUTPUT("VOUTR"),
409};
410
411static const struct snd_soc_dapm_route uda134x_dapm_routes[] = {
412 { "ADC", NULL, "VINL1" },
413 { "ADC", NULL, "VINR1" },
414 { "ADC", NULL, "VINL2" },
415 { "ADC", NULL, "VINR2" },
416 { "VOUTL", NULL, "DAC" },
417 { "VOUTR", NULL, "DAC" },
418};
419
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100420static const struct snd_soc_dai_ops uda134x_dai_ops = {
Eric Miao6335d052009-03-03 09:41:00 +0800421 .startup = uda134x_startup,
422 .shutdown = uda134x_shutdown,
423 .hw_params = uda134x_hw_params,
424 .digital_mute = uda134x_mute,
425 .set_sysclk = uda134x_set_dai_sysclk,
426 .set_fmt = uda134x_set_dai_fmt,
427};
428
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000429static struct snd_soc_dai_driver uda134x_dai = {
430 .name = "uda134x-hifi",
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100431 /* playback capabilities */
432 .playback = {
433 .stream_name = "Playback",
434 .channels_min = 1,
435 .channels_max = 2,
436 .rates = UDA134X_RATES,
437 .formats = UDA134X_FORMATS,
438 },
439 /* capture capabilities */
440 .capture = {
441 .stream_name = "Capture",
442 .channels_min = 1,
443 .channels_max = 2,
444 .rates = UDA134X_RATES,
445 .formats = UDA134X_FORMATS,
446 },
447 /* pcm operations */
Eric Miao6335d052009-03-03 09:41:00 +0800448 .ops = &uda134x_dai_ops,
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100449};
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100450
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000451static int uda134x_soc_probe(struct snd_soc_codec *codec)
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100452{
Lars-Peter Clausen81024b12015-05-11 09:42:33 +0200453 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Lars-Peter Clausenf15c4442015-07-13 12:26:45 +0200454 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200455 struct uda134x_platform_data *pd = uda134x->pd;
Russell King113591e2013-07-30 11:18:52 +0100456 const struct snd_soc_dapm_widget *widgets;
457 unsigned num_widgets;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000458 int ret;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100459
460 printk(KERN_INFO "UDA134X SoC Audio Codec\n");
461
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100462 switch (pd->model) {
463 case UDA134X_UDA1340:
464 case UDA134X_UDA1341:
465 case UDA134X_UDA1344:
Vladimir Zapolskiyb28528a2010-04-26 14:56:57 +0400466 case UDA134X_UDA1345:
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100467 break;
468 default:
469 printk(KERN_ERR "UDA134X SoC codec: "
470 "unsupported model %d\n",
471 pd->model);
472 return -EINVAL;
473 }
474
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100475 if (pd->power)
476 pd->power(1);
477
478 uda134x_reset(codec);
479
Russell King113591e2013-07-30 11:18:52 +0100480 if (pd->model == UDA134X_UDA1341) {
481 widgets = uda1341_dapm_widgets;
482 num_widgets = ARRAY_SIZE(uda1341_dapm_widgets);
483 } else {
484 widgets = uda1340_dapm_widgets;
485 num_widgets = ARRAY_SIZE(uda1340_dapm_widgets);
486 }
487
Lars-Peter Clausen81024b12015-05-11 09:42:33 +0200488 ret = snd_soc_dapm_new_controls(dapm, widgets, num_widgets);
Russell King113591e2013-07-30 11:18:52 +0100489 if (ret) {
490 printk(KERN_ERR "%s failed to register dapm controls: %d",
491 __func__, ret);
Russell King113591e2013-07-30 11:18:52 +0100492 return ret;
493 }
494
Ian Molton3e8e1952009-01-09 00:23:21 +0000495 switch (pd->model) {
496 case UDA134X_UDA1340:
497 case UDA134X_UDA1344:
Liam Girdwood022658b2012-02-03 17:43:09 +0000498 ret = snd_soc_add_codec_controls(codec, uda1340_snd_controls,
Ian Molton3e8e1952009-01-09 00:23:21 +0000499 ARRAY_SIZE(uda1340_snd_controls));
500 break;
501 case UDA134X_UDA1341:
Liam Girdwood022658b2012-02-03 17:43:09 +0000502 ret = snd_soc_add_codec_controls(codec, uda1341_snd_controls,
Ian Molton3e8e1952009-01-09 00:23:21 +0000503 ARRAY_SIZE(uda1341_snd_controls));
504 break;
Vladimir Zapolskiyb28528a2010-04-26 14:56:57 +0400505 case UDA134X_UDA1345:
Liam Girdwood022658b2012-02-03 17:43:09 +0000506 ret = snd_soc_add_codec_controls(codec, uda1345_snd_controls,
Vladimir Zapolskiyb28528a2010-04-26 14:56:57 +0400507 ARRAY_SIZE(uda1345_snd_controls));
508 break;
Ian Molton3e8e1952009-01-09 00:23:21 +0000509 default:
André Goddard Rosaaf901ca2009-11-14 13:09:05 -0200510 printk(KERN_ERR "%s unknown codec type: %d",
Ian Molton3e8e1952009-01-09 00:23:21 +0000511 __func__, pd->model);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000512 return -EINVAL;
Ian Molton3e8e1952009-01-09 00:23:21 +0000513 }
514
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100515 if (ret < 0) {
516 printk(KERN_ERR "UDA134X: failed to register controls\n");
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000517 return ret;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100518 }
519
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100520 return 0;
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100521}
522
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000523static struct snd_soc_codec_driver soc_codec_dev_uda134x = {
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100524 .probe = uda134x_soc_probe,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000525 .set_bias_level = uda134x_set_bias_level,
Lars-Peter Clausene03b9752014-11-23 15:04:13 +0100526 .suspend_bias_off = true,
527
Russell King113591e2013-07-30 11:18:52 +0100528 .dapm_widgets = uda134x_dapm_widgets,
529 .num_dapm_widgets = ARRAY_SIZE(uda134x_dapm_widgets),
530 .dapm_routes = uda134x_dapm_routes,
531 .num_dapm_routes = ARRAY_SIZE(uda134x_dapm_routes),
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100532};
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100533
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200534static const struct regmap_config uda134x_regmap_config = {
535 .reg_bits = 8,
536 .val_bits = 8,
537 .max_register = UDA134X_DATA1,
538 .reg_defaults = uda134x_reg_defaults,
539 .num_reg_defaults = ARRAY_SIZE(uda134x_reg_defaults),
540 .cache_type = REGCACHE_RBTREE,
541
542 .reg_write = uda134x_regmap_write,
543};
544
Bill Pemberton7a79e942012-12-07 09:26:37 -0500545static int uda134x_codec_probe(struct platform_device *pdev)
Mark Brown64089b82008-12-08 19:17:58 +0000546{
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200547 struct uda134x_platform_data *pd = pdev->dev.platform_data;
Lars-Peter Clausenf15c4442015-07-13 12:26:45 +0200548 struct uda134x_priv *uda134x;
549
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200550 if (!pd) {
551 dev_err(&pdev->dev, "Missing L3 bitbang function\n");
552 return -ENODEV;
553 }
554
Lars-Peter Clausenf15c4442015-07-13 12:26:45 +0200555 uda134x = devm_kzalloc(&pdev->dev, sizeof(*uda134x), GFP_KERNEL);
556 if (!uda134x)
557 return -ENOMEM;
558
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200559 uda134x->pd = pd;
Lars-Peter Clausenf15c4442015-07-13 12:26:45 +0200560 platform_set_drvdata(pdev, uda134x);
561
Lars-Peter Clausenf33c3402015-07-13 12:26:47 +0200562 uda134x->regmap = devm_regmap_init(&pdev->dev, NULL, pd,
563 &uda134x_regmap_config);
564 if (IS_ERR(uda134x->regmap))
565 return PTR_ERR(uda134x->regmap);
566
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000567 return snd_soc_register_codec(&pdev->dev,
568 &soc_codec_dev_uda134x, &uda134x_dai, 1);
Mark Brown64089b82008-12-08 19:17:58 +0000569}
Mark Brown64089b82008-12-08 19:17:58 +0000570
Bill Pemberton7a79e942012-12-07 09:26:37 -0500571static int uda134x_codec_remove(struct platform_device *pdev)
Mark Brown64089b82008-12-08 19:17:58 +0000572{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000573 snd_soc_unregister_codec(&pdev->dev);
574 return 0;
Mark Brown64089b82008-12-08 19:17:58 +0000575}
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000576
577static struct platform_driver uda134x_codec_driver = {
578 .driver = {
579 .name = "uda134x-codec",
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000580 },
581 .probe = uda134x_codec_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -0500582 .remove = uda134x_codec_remove,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000583};
584
Mark Brown5bbcc3c2011-11-23 22:52:08 +0000585module_platform_driver(uda134x_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +0000586
Christian Pellegrin1cad1de2008-11-15 08:58:16 +0100587MODULE_DESCRIPTION("UDA134X ALSA soc codec driver");
588MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
589MODULE_LICENSE("GPL");