Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of version 2 of the GNU General Public License as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | */ |
| 13 | #include <linux/list_sort.h> |
| 14 | #include <linux/libnvdimm.h> |
| 15 | #include <linux/module.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 16 | #include <linux/mutex.h> |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 17 | #include <linux/ndctl.h> |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 18 | #include <linux/sysfs.h> |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 19 | #include <linux/delay.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 20 | #include <linux/list.h> |
| 21 | #include <linux/acpi.h> |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 22 | #include <linux/sort.h> |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 23 | #include <linux/pmem.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 24 | #include <linux/io.h> |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 25 | #include <linux/nd.h> |
Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 26 | #include <asm/cacheflush.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 27 | #include "nfit.h" |
| 28 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 29 | /* |
| 30 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is |
| 31 | * irrelevant. |
| 32 | */ |
Christoph Hellwig | 2f8e2c8 | 2015-08-28 09:27:14 +0200 | [diff] [blame] | 33 | #include <linux/io-64-nonatomic-hi-lo.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 34 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 35 | static bool force_enable_dimms; |
| 36 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); |
| 37 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); |
| 38 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 39 | static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT; |
| 40 | module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR); |
| 41 | MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds"); |
| 42 | |
| 43 | /* after three payloads of overflow, it's dead jim */ |
| 44 | static unsigned int scrub_overflow_abort = 3; |
| 45 | module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR); |
| 46 | MODULE_PARM_DESC(scrub_overflow_abort, |
| 47 | "Number of times we overflow ARS results before abort"); |
| 48 | |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 49 | static bool disable_vendor_specific; |
| 50 | module_param(disable_vendor_specific, bool, S_IRUGO); |
| 51 | MODULE_PARM_DESC(disable_vendor_specific, |
| 52 | "Limit commands to the publicly specified set\n"); |
| 53 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 54 | LIST_HEAD(acpi_descs); |
| 55 | DEFINE_MUTEX(acpi_desc_lock); |
| 56 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 57 | static struct workqueue_struct *nfit_wq; |
| 58 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 59 | struct nfit_table_prev { |
| 60 | struct list_head spas; |
| 61 | struct list_head memdevs; |
| 62 | struct list_head dcrs; |
| 63 | struct list_head bdws; |
| 64 | struct list_head idts; |
| 65 | struct list_head flushes; |
| 66 | }; |
| 67 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 68 | static u8 nfit_uuid[NFIT_UUID_MAX][16]; |
| 69 | |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 70 | const u8 *to_nfit_uuid(enum nfit_uuids id) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 71 | { |
| 72 | return nfit_uuid[id]; |
| 73 | } |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 74 | EXPORT_SYMBOL(to_nfit_uuid); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 75 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 76 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
| 77 | struct nvdimm_bus_descriptor *nd_desc) |
| 78 | { |
| 79 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); |
| 80 | } |
| 81 | |
| 82 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) |
| 83 | { |
| 84 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 85 | |
| 86 | /* |
| 87 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct |
| 88 | * acpi_device. |
| 89 | */ |
| 90 | if (!nd_desc->provider_name |
| 91 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) |
| 92 | return NULL; |
| 93 | |
| 94 | return to_acpi_device(acpi_desc->dev); |
| 95 | } |
| 96 | |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 97 | static int xlat_status(void *buf, unsigned int cmd, u32 status) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 98 | { |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 99 | struct nd_cmd_clear_error *clear_err; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 100 | struct nd_cmd_ars_status *ars_status; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 101 | u16 flags; |
| 102 | |
| 103 | switch (cmd) { |
| 104 | case ND_CMD_ARS_CAP: |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 105 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 106 | return -ENOTTY; |
| 107 | |
| 108 | /* Command failed */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 109 | if (status & 0xffff) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 110 | return -EIO; |
| 111 | |
| 112 | /* No supported scan types for this range */ |
| 113 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 114 | if ((status >> 16 & flags) == 0) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 115 | return -ENOTTY; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 116 | return 0; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 117 | case ND_CMD_ARS_START: |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 118 | /* ARS is in progress */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 119 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 120 | return -EBUSY; |
| 121 | |
| 122 | /* Command failed */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 123 | if (status & 0xffff) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 124 | return -EIO; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 125 | return 0; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 126 | case ND_CMD_ARS_STATUS: |
| 127 | ars_status = buf; |
| 128 | /* Command failed */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 129 | if (status & 0xffff) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 130 | return -EIO; |
| 131 | /* Check extended status (Upper two bytes) */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 132 | if (status == NFIT_ARS_STATUS_DONE) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 133 | return 0; |
| 134 | |
| 135 | /* ARS is in progress */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 136 | if (status == NFIT_ARS_STATUS_BUSY) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 137 | return -EBUSY; |
| 138 | |
| 139 | /* No ARS performed for the current boot */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 140 | if (status == NFIT_ARS_STATUS_NONE) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 141 | return -EAGAIN; |
| 142 | |
| 143 | /* |
| 144 | * ARS interrupted, either we overflowed or some other |
| 145 | * agent wants the scan to stop. If we didn't overflow |
| 146 | * then just continue with the returned results. |
| 147 | */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 148 | if (status == NFIT_ARS_STATUS_INTR) { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 149 | if (ars_status->flags & NFIT_ARS_F_OVERFLOW) |
| 150 | return -ENOSPC; |
| 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | /* Unknown status */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 155 | if (status >> 16) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 156 | return -EIO; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 157 | return 0; |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 158 | case ND_CMD_CLEAR_ERROR: |
| 159 | clear_err = buf; |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 160 | if (status & 0xffff) |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 161 | return -EIO; |
| 162 | if (!clear_err->cleared) |
| 163 | return -EIO; |
| 164 | if (clear_err->length > clear_err->cleared) |
| 165 | return clear_err->cleared; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 166 | return 0; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 167 | default: |
| 168 | break; |
| 169 | } |
| 170 | |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 171 | /* all other non-zero status results in an error */ |
| 172 | if (status) |
| 173 | return -EIO; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 174 | return 0; |
| 175 | } |
| 176 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 177 | static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, |
| 178 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 179 | unsigned int buf_len, int *cmd_rc) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 180 | { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 181 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 182 | union acpi_object in_obj, in_buf, *out_obj; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 183 | const struct nd_cmd_desc *desc = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 184 | struct device *dev = acpi_desc->dev; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 185 | struct nd_cmd_pkg *call_pkg = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 186 | const char *cmd_name, *dimm_name; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 187 | unsigned long cmd_mask, dsm_mask; |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 188 | u32 offset, fw_status = 0; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 189 | acpi_handle handle; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 190 | unsigned int func; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 191 | const u8 *uuid; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 192 | int rc, i; |
| 193 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 194 | func = cmd; |
| 195 | if (cmd == ND_CMD_CALL) { |
| 196 | call_pkg = buf; |
| 197 | func = call_pkg->nd_command; |
| 198 | } |
| 199 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 200 | if (nvdimm) { |
| 201 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 202 | struct acpi_device *adev = nfit_mem->adev; |
| 203 | |
| 204 | if (!adev) |
| 205 | return -ENOTTY; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 206 | if (call_pkg && nfit_mem->family != call_pkg->nd_family) |
| 207 | return -ENOTTY; |
| 208 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 209 | dimm_name = nvdimm_name(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 210 | cmd_name = nvdimm_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 211 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 212 | dsm_mask = nfit_mem->dsm_mask; |
| 213 | desc = nd_cmd_dimm_desc(cmd); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 214 | uuid = to_nfit_uuid(nfit_mem->family); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 215 | handle = adev->handle; |
| 216 | } else { |
| 217 | struct acpi_device *adev = to_acpi_dev(acpi_desc); |
| 218 | |
| 219 | cmd_name = nvdimm_bus_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 220 | cmd_mask = nd_desc->cmd_mask; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 221 | dsm_mask = cmd_mask; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 222 | desc = nd_cmd_bus_desc(cmd); |
| 223 | uuid = to_nfit_uuid(NFIT_DEV_BUS); |
| 224 | handle = adev->handle; |
| 225 | dimm_name = "bus"; |
| 226 | } |
| 227 | |
| 228 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) |
| 229 | return -ENOTTY; |
| 230 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 231 | if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask)) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 232 | return -ENOTTY; |
| 233 | |
| 234 | in_obj.type = ACPI_TYPE_PACKAGE; |
| 235 | in_obj.package.count = 1; |
| 236 | in_obj.package.elements = &in_buf; |
| 237 | in_buf.type = ACPI_TYPE_BUFFER; |
| 238 | in_buf.buffer.pointer = buf; |
| 239 | in_buf.buffer.length = 0; |
| 240 | |
| 241 | /* libnvdimm has already validated the input envelope */ |
| 242 | for (i = 0; i < desc->in_num; i++) |
| 243 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, |
| 244 | i, buf); |
| 245 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 246 | if (call_pkg) { |
| 247 | /* skip over package wrapper */ |
| 248 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; |
| 249 | in_buf.buffer.length = call_pkg->nd_size_in; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 250 | } |
| 251 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 252 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { |
| 253 | dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n", |
| 254 | __func__, dimm_name, cmd, func, |
| 255 | in_buf.buffer.length); |
| 256 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, |
| 257 | in_buf.buffer.pointer, |
| 258 | min_t(u32, 256, in_buf.buffer.length), true); |
| 259 | } |
| 260 | |
| 261 | out_obj = acpi_evaluate_dsm(handle, uuid, 1, func, &in_obj); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 262 | if (!out_obj) { |
| 263 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, |
| 264 | cmd_name); |
| 265 | return -EINVAL; |
| 266 | } |
| 267 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 268 | if (call_pkg) { |
| 269 | call_pkg->nd_fw_size = out_obj->buffer.length; |
| 270 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, |
| 271 | out_obj->buffer.pointer, |
| 272 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); |
| 273 | |
| 274 | ACPI_FREE(out_obj); |
| 275 | /* |
| 276 | * Need to support FW function w/o known size in advance. |
| 277 | * Caller can determine required size based upon nd_fw_size. |
| 278 | * If we return an error (like elsewhere) then caller wouldn't |
| 279 | * be able to rely upon data returned to make calculation. |
| 280 | */ |
| 281 | return 0; |
| 282 | } |
| 283 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 284 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
| 285 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", |
| 286 | __func__, dimm_name, cmd_name, out_obj->type); |
| 287 | rc = -EINVAL; |
| 288 | goto out; |
| 289 | } |
| 290 | |
| 291 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { |
| 292 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, |
| 293 | dimm_name, cmd_name, out_obj->buffer.length); |
| 294 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, |
| 295 | 4, out_obj->buffer.pointer, min_t(u32, 128, |
| 296 | out_obj->buffer.length), true); |
| 297 | } |
| 298 | |
| 299 | for (i = 0, offset = 0; i < desc->out_num; i++) { |
| 300 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, |
Dan Williams | efda1b5d | 2016-12-06 09:10:12 -0800 | [diff] [blame^] | 301 | (u32 *) out_obj->buffer.pointer, |
| 302 | out_obj->buffer.length - offset); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 303 | |
| 304 | if (offset + out_size > out_obj->buffer.length) { |
| 305 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", |
| 306 | __func__, dimm_name, cmd_name, i); |
| 307 | break; |
| 308 | } |
| 309 | |
| 310 | if (in_buf.buffer.length + offset + out_size > buf_len) { |
| 311 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", |
| 312 | __func__, dimm_name, cmd_name, i); |
| 313 | rc = -ENXIO; |
| 314 | goto out; |
| 315 | } |
| 316 | memcpy(buf + in_buf.buffer.length + offset, |
| 317 | out_obj->buffer.pointer + offset, out_size); |
| 318 | offset += out_size; |
| 319 | } |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 320 | |
| 321 | /* |
| 322 | * Set fw_status for all the commands with a known format to be |
| 323 | * later interpreted by xlat_status(). |
| 324 | */ |
| 325 | if (i >= 1 && ((cmd >= ND_CMD_ARS_CAP && cmd <= ND_CMD_CLEAR_ERROR) |
| 326 | || (cmd >= ND_CMD_SMART && cmd <= ND_CMD_VENDOR))) |
| 327 | fw_status = *(u32 *) out_obj->buffer.pointer; |
| 328 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 329 | if (offset + in_buf.buffer.length < buf_len) { |
| 330 | if (i >= 1) { |
| 331 | /* |
| 332 | * status valid, return the number of bytes left |
| 333 | * unfilled in the output buffer |
| 334 | */ |
| 335 | rc = buf_len - offset - in_buf.buffer.length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 336 | if (cmd_rc) |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 337 | *cmd_rc = xlat_status(buf, cmd, fw_status); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 338 | } else { |
| 339 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", |
| 340 | __func__, dimm_name, cmd_name, buf_len, |
| 341 | offset); |
| 342 | rc = -ENXIO; |
| 343 | } |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 344 | } else { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 345 | rc = 0; |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 346 | if (cmd_rc) |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 347 | *cmd_rc = xlat_status(buf, cmd, fw_status); |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 348 | } |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 349 | |
| 350 | out: |
| 351 | ACPI_FREE(out_obj); |
| 352 | |
| 353 | return rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 354 | } |
| 355 | |
| 356 | static const char *spa_type_name(u16 type) |
| 357 | { |
| 358 | static const char *to_name[] = { |
| 359 | [NFIT_SPA_VOLATILE] = "volatile", |
| 360 | [NFIT_SPA_PM] = "pmem", |
| 361 | [NFIT_SPA_DCR] = "dimm-control-region", |
| 362 | [NFIT_SPA_BDW] = "block-data-window", |
| 363 | [NFIT_SPA_VDISK] = "volatile-disk", |
| 364 | [NFIT_SPA_VCD] = "volatile-cd", |
| 365 | [NFIT_SPA_PDISK] = "persistent-disk", |
| 366 | [NFIT_SPA_PCD] = "persistent-cd", |
| 367 | |
| 368 | }; |
| 369 | |
| 370 | if (type > NFIT_SPA_PCD) |
| 371 | return "unknown"; |
| 372 | |
| 373 | return to_name[type]; |
| 374 | } |
| 375 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 376 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 377 | { |
| 378 | int i; |
| 379 | |
| 380 | for (i = 0; i < NFIT_UUID_MAX; i++) |
| 381 | if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0) |
| 382 | return i; |
| 383 | return -1; |
| 384 | } |
| 385 | |
| 386 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 387 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 388 | struct acpi_nfit_system_address *spa) |
| 389 | { |
| 390 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 391 | struct nfit_spa *nfit_spa; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 392 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 393 | if (spa->header.length != sizeof(*spa)) |
| 394 | return false; |
| 395 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 396 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 397 | if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 398 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
| 399 | return true; |
| 400 | } |
| 401 | } |
| 402 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 403 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa), |
| 404 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 405 | if (!nfit_spa) |
| 406 | return false; |
| 407 | INIT_LIST_HEAD(&nfit_spa->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 408 | memcpy(nfit_spa->spa, spa, sizeof(*spa)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 409 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
| 410 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, |
| 411 | spa->range_index, |
| 412 | spa_type_name(nfit_spa_type(spa))); |
| 413 | return true; |
| 414 | } |
| 415 | |
| 416 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 417 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 418 | struct acpi_nfit_memory_map *memdev) |
| 419 | { |
| 420 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 421 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 422 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 423 | if (memdev->header.length != sizeof(*memdev)) |
| 424 | return false; |
| 425 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 426 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 427 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 428 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 429 | return true; |
| 430 | } |
| 431 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 432 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
| 433 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 434 | if (!nfit_memdev) |
| 435 | return false; |
| 436 | INIT_LIST_HEAD(&nfit_memdev->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 437 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 438 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 439 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n", |
| 440 | __func__, memdev->device_handle, memdev->range_index, |
| 441 | memdev->region_index); |
| 442 | return true; |
| 443 | } |
| 444 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 445 | /* |
| 446 | * An implementation may provide a truncated control region if no block windows |
| 447 | * are defined. |
| 448 | */ |
| 449 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) |
| 450 | { |
| 451 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, |
| 452 | window_size)) |
| 453 | return 0; |
| 454 | if (dcr->windows) |
| 455 | return sizeof(*dcr); |
| 456 | return offsetof(struct acpi_nfit_control_region, window_size); |
| 457 | } |
| 458 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 459 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 460 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 461 | struct acpi_nfit_control_region *dcr) |
| 462 | { |
| 463 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 464 | struct nfit_dcr *nfit_dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 465 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 466 | if (!sizeof_dcr(dcr)) |
| 467 | return false; |
| 468 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 469 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 470 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 471 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 472 | return true; |
| 473 | } |
| 474 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 475 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
| 476 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 477 | if (!nfit_dcr) |
| 478 | return false; |
| 479 | INIT_LIST_HEAD(&nfit_dcr->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 480 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 481 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 482 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, |
| 483 | dcr->region_index, dcr->windows); |
| 484 | return true; |
| 485 | } |
| 486 | |
| 487 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 488 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 489 | struct acpi_nfit_data_region *bdw) |
| 490 | { |
| 491 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 492 | struct nfit_bdw *nfit_bdw; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 493 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 494 | if (bdw->header.length != sizeof(*bdw)) |
| 495 | return false; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 496 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 497 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 498 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 499 | return true; |
| 500 | } |
| 501 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 502 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
| 503 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 504 | if (!nfit_bdw) |
| 505 | return false; |
| 506 | INIT_LIST_HEAD(&nfit_bdw->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 507 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 508 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 509 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, |
| 510 | bdw->region_index, bdw->windows); |
| 511 | return true; |
| 512 | } |
| 513 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 514 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
| 515 | { |
| 516 | if (idt->header.length < sizeof(*idt)) |
| 517 | return 0; |
| 518 | return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1); |
| 519 | } |
| 520 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 521 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 522 | struct nfit_table_prev *prev, |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 523 | struct acpi_nfit_interleave *idt) |
| 524 | { |
| 525 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 526 | struct nfit_idt *nfit_idt; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 527 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 528 | if (!sizeof_idt(idt)) |
| 529 | return false; |
| 530 | |
| 531 | list_for_each_entry(nfit_idt, &prev->idts, list) { |
| 532 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) |
| 533 | continue; |
| 534 | |
| 535 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 536 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
| 537 | return true; |
| 538 | } |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 539 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 540 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 541 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
| 542 | GFP_KERNEL); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 543 | if (!nfit_idt) |
| 544 | return false; |
| 545 | INIT_LIST_HEAD(&nfit_idt->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 546 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 547 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
| 548 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, |
| 549 | idt->interleave_index, idt->line_count); |
| 550 | return true; |
| 551 | } |
| 552 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 553 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
| 554 | { |
| 555 | if (flush->header.length < sizeof(*flush)) |
| 556 | return 0; |
| 557 | return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1); |
| 558 | } |
| 559 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 560 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 561 | struct nfit_table_prev *prev, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 562 | struct acpi_nfit_flush_address *flush) |
| 563 | { |
| 564 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 565 | struct nfit_flush *nfit_flush; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 566 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 567 | if (!sizeof_flush(flush)) |
| 568 | return false; |
| 569 | |
| 570 | list_for_each_entry(nfit_flush, &prev->flushes, list) { |
| 571 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) |
| 572 | continue; |
| 573 | |
| 574 | if (memcmp(nfit_flush->flush, flush, |
| 575 | sizeof_flush(flush)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 576 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 577 | return true; |
| 578 | } |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 579 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 580 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 581 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
| 582 | + sizeof_flush(flush), GFP_KERNEL); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 583 | if (!nfit_flush) |
| 584 | return false; |
| 585 | INIT_LIST_HEAD(&nfit_flush->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 586 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 587 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 588 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, |
| 589 | flush->device_handle, flush->hint_count); |
| 590 | return true; |
| 591 | } |
| 592 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 593 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
| 594 | struct nfit_table_prev *prev, void *table, const void *end) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 595 | { |
| 596 | struct device *dev = acpi_desc->dev; |
| 597 | struct acpi_nfit_header *hdr; |
| 598 | void *err = ERR_PTR(-ENOMEM); |
| 599 | |
| 600 | if (table >= end) |
| 601 | return NULL; |
| 602 | |
| 603 | hdr = table; |
Vishal Verma | 564d501 | 2015-10-27 16:58:26 -0600 | [diff] [blame] | 604 | if (!hdr->length) { |
| 605 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", |
| 606 | hdr->type); |
| 607 | return NULL; |
| 608 | } |
| 609 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 610 | switch (hdr->type) { |
| 611 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 612 | if (!add_spa(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 613 | return err; |
| 614 | break; |
| 615 | case ACPI_NFIT_TYPE_MEMORY_MAP: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 616 | if (!add_memdev(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 617 | return err; |
| 618 | break; |
| 619 | case ACPI_NFIT_TYPE_CONTROL_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 620 | if (!add_dcr(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 621 | return err; |
| 622 | break; |
| 623 | case ACPI_NFIT_TYPE_DATA_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 624 | if (!add_bdw(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 625 | return err; |
| 626 | break; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 627 | case ACPI_NFIT_TYPE_INTERLEAVE: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 628 | if (!add_idt(acpi_desc, prev, table)) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 629 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 630 | break; |
| 631 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 632 | if (!add_flush(acpi_desc, prev, table)) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 633 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 634 | break; |
| 635 | case ACPI_NFIT_TYPE_SMBIOS: |
| 636 | dev_dbg(dev, "%s: smbios\n", __func__); |
| 637 | break; |
| 638 | default: |
| 639 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); |
| 640 | break; |
| 641 | } |
| 642 | |
| 643 | return table + hdr->length; |
| 644 | } |
| 645 | |
| 646 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, |
| 647 | struct nfit_mem *nfit_mem) |
| 648 | { |
| 649 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 650 | u16 dcr = nfit_mem->dcr->region_index; |
| 651 | struct nfit_spa *nfit_spa; |
| 652 | |
| 653 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 654 | u16 range_index = nfit_spa->spa->range_index; |
| 655 | int type = nfit_spa_type(nfit_spa->spa); |
| 656 | struct nfit_memdev *nfit_memdev; |
| 657 | |
| 658 | if (type != NFIT_SPA_BDW) |
| 659 | continue; |
| 660 | |
| 661 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 662 | if (nfit_memdev->memdev->range_index != range_index) |
| 663 | continue; |
| 664 | if (nfit_memdev->memdev->device_handle != device_handle) |
| 665 | continue; |
| 666 | if (nfit_memdev->memdev->region_index != dcr) |
| 667 | continue; |
| 668 | |
| 669 | nfit_mem->spa_bdw = nfit_spa->spa; |
| 670 | return; |
| 671 | } |
| 672 | } |
| 673 | |
| 674 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", |
| 675 | nfit_mem->spa_dcr->range_index); |
| 676 | nfit_mem->bdw = NULL; |
| 677 | } |
| 678 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 679 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 680 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
| 681 | { |
| 682 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 683 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 684 | struct nfit_bdw *nfit_bdw; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 685 | struct nfit_idt *nfit_idt; |
| 686 | u16 idt_idx, range_index; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 687 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 688 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
| 689 | if (nfit_bdw->bdw->region_index != dcr) |
| 690 | continue; |
| 691 | nfit_mem->bdw = nfit_bdw->bdw; |
| 692 | break; |
| 693 | } |
| 694 | |
| 695 | if (!nfit_mem->bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 696 | return; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 697 | |
| 698 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 699 | |
| 700 | if (!nfit_mem->spa_bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 701 | return; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 702 | |
| 703 | range_index = nfit_mem->spa_bdw->range_index; |
| 704 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 705 | if (nfit_memdev->memdev->range_index != range_index || |
| 706 | nfit_memdev->memdev->region_index != dcr) |
| 707 | continue; |
| 708 | nfit_mem->memdev_bdw = nfit_memdev->memdev; |
| 709 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 710 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 711 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 712 | continue; |
| 713 | nfit_mem->idt_bdw = nfit_idt->idt; |
| 714 | break; |
| 715 | } |
| 716 | break; |
| 717 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 718 | } |
| 719 | |
| 720 | static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc, |
| 721 | struct acpi_nfit_system_address *spa) |
| 722 | { |
| 723 | struct nfit_mem *nfit_mem, *found; |
| 724 | struct nfit_memdev *nfit_memdev; |
| 725 | int type = nfit_spa_type(spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 726 | |
| 727 | switch (type) { |
| 728 | case NFIT_SPA_DCR: |
| 729 | case NFIT_SPA_PM: |
| 730 | break; |
| 731 | default: |
| 732 | return 0; |
| 733 | } |
| 734 | |
| 735 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 736 | struct nfit_flush *nfit_flush; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 737 | struct nfit_dcr *nfit_dcr; |
| 738 | u32 device_handle; |
| 739 | u16 dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 740 | |
| 741 | if (nfit_memdev->memdev->range_index != spa->range_index) |
| 742 | continue; |
| 743 | found = NULL; |
| 744 | dcr = nfit_memdev->memdev->region_index; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 745 | device_handle = nfit_memdev->memdev->device_handle; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 746 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 747 | if (__to_nfit_memdev(nfit_mem)->device_handle |
| 748 | == device_handle) { |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 749 | found = nfit_mem; |
| 750 | break; |
| 751 | } |
| 752 | |
| 753 | if (found) |
| 754 | nfit_mem = found; |
| 755 | else { |
| 756 | nfit_mem = devm_kzalloc(acpi_desc->dev, |
| 757 | sizeof(*nfit_mem), GFP_KERNEL); |
| 758 | if (!nfit_mem) |
| 759 | return -ENOMEM; |
| 760 | INIT_LIST_HEAD(&nfit_mem->list); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 761 | nfit_mem->acpi_desc = acpi_desc; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 762 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
| 763 | } |
| 764 | |
| 765 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 766 | if (nfit_dcr->dcr->region_index != dcr) |
| 767 | continue; |
| 768 | /* |
| 769 | * Record the control region for the dimm. For |
| 770 | * the ACPI 6.1 case, where there are separate |
| 771 | * control regions for the pmem vs blk |
| 772 | * interfaces, be sure to record the extended |
| 773 | * blk details. |
| 774 | */ |
| 775 | if (!nfit_mem->dcr) |
| 776 | nfit_mem->dcr = nfit_dcr->dcr; |
| 777 | else if (nfit_mem->dcr->windows == 0 |
| 778 | && nfit_dcr->dcr->windows) |
| 779 | nfit_mem->dcr = nfit_dcr->dcr; |
| 780 | break; |
| 781 | } |
| 782 | |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 783 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 784 | struct acpi_nfit_flush_address *flush; |
| 785 | u16 i; |
| 786 | |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 787 | if (nfit_flush->flush->device_handle != device_handle) |
| 788 | continue; |
| 789 | nfit_mem->nfit_flush = nfit_flush; |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 790 | flush = nfit_flush->flush; |
| 791 | nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev, |
| 792 | flush->hint_count |
| 793 | * sizeof(struct resource), GFP_KERNEL); |
| 794 | if (!nfit_mem->flush_wpq) |
| 795 | return -ENOMEM; |
| 796 | for (i = 0; i < flush->hint_count; i++) { |
| 797 | struct resource *res = &nfit_mem->flush_wpq[i]; |
| 798 | |
| 799 | res->start = flush->hint_address[i]; |
| 800 | res->end = res->start + 8 - 1; |
| 801 | } |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 802 | break; |
| 803 | } |
| 804 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 805 | if (dcr && !nfit_mem->dcr) { |
| 806 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", |
| 807 | spa->range_index, dcr); |
| 808 | return -ENODEV; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 809 | } |
| 810 | |
| 811 | if (type == NFIT_SPA_DCR) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 812 | struct nfit_idt *nfit_idt; |
| 813 | u16 idt_idx; |
| 814 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 815 | /* multiple dimms may share a SPA when interleaved */ |
| 816 | nfit_mem->spa_dcr = spa; |
| 817 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 818 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 819 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 820 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 821 | continue; |
| 822 | nfit_mem->idt_dcr = nfit_idt->idt; |
| 823 | break; |
| 824 | } |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 825 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 826 | } else { |
| 827 | /* |
| 828 | * A single dimm may belong to multiple SPA-PM |
| 829 | * ranges, record at least one in addition to |
| 830 | * any SPA-DCR range. |
| 831 | */ |
| 832 | nfit_mem->memdev_pmem = nfit_memdev->memdev; |
| 833 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 834 | } |
| 835 | |
| 836 | return 0; |
| 837 | } |
| 838 | |
| 839 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) |
| 840 | { |
| 841 | struct nfit_mem *a = container_of(_a, typeof(*a), list); |
| 842 | struct nfit_mem *b = container_of(_b, typeof(*b), list); |
| 843 | u32 handleA, handleB; |
| 844 | |
| 845 | handleA = __to_nfit_memdev(a)->device_handle; |
| 846 | handleB = __to_nfit_memdev(b)->device_handle; |
| 847 | if (handleA < handleB) |
| 848 | return -1; |
| 849 | else if (handleA > handleB) |
| 850 | return 1; |
| 851 | return 0; |
| 852 | } |
| 853 | |
| 854 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) |
| 855 | { |
| 856 | struct nfit_spa *nfit_spa; |
| 857 | |
| 858 | /* |
| 859 | * For each SPA-DCR or SPA-PMEM address range find its |
| 860 | * corresponding MEMDEV(s). From each MEMDEV find the |
| 861 | * corresponding DCR. Then, if we're operating on a SPA-DCR, |
| 862 | * try to find a SPA-BDW and a corresponding BDW that references |
| 863 | * the DCR. Throw it all into an nfit_mem object. Note, that |
| 864 | * BDWs are optional. |
| 865 | */ |
| 866 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 867 | int rc; |
| 868 | |
| 869 | rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa); |
| 870 | if (rc) |
| 871 | return rc; |
| 872 | } |
| 873 | |
| 874 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
| 875 | |
| 876 | return 0; |
| 877 | } |
| 878 | |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 879 | static ssize_t revision_show(struct device *dev, |
| 880 | struct device_attribute *attr, char *buf) |
| 881 | { |
| 882 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 883 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 884 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 885 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 886 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 887 | } |
| 888 | static DEVICE_ATTR_RO(revision); |
| 889 | |
Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 890 | static ssize_t hw_error_scrub_show(struct device *dev, |
| 891 | struct device_attribute *attr, char *buf) |
| 892 | { |
| 893 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 894 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 895 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 896 | |
| 897 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); |
| 898 | } |
| 899 | |
| 900 | /* |
| 901 | * The 'hw_error_scrub' attribute can have the following values written to it: |
| 902 | * '0': Switch to the default mode where an exception will only insert |
| 903 | * the address of the memory error into the poison and badblocks lists. |
| 904 | * '1': Enable a full scrub to happen if an exception for a memory error is |
| 905 | * received. |
| 906 | */ |
| 907 | static ssize_t hw_error_scrub_store(struct device *dev, |
| 908 | struct device_attribute *attr, const char *buf, size_t size) |
| 909 | { |
| 910 | struct nvdimm_bus_descriptor *nd_desc; |
| 911 | ssize_t rc; |
| 912 | long val; |
| 913 | |
| 914 | rc = kstrtol(buf, 0, &val); |
| 915 | if (rc) |
| 916 | return rc; |
| 917 | |
| 918 | device_lock(dev); |
| 919 | nd_desc = dev_get_drvdata(dev); |
| 920 | if (nd_desc) { |
| 921 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 922 | |
| 923 | switch (val) { |
| 924 | case HW_ERROR_SCRUB_ON: |
| 925 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; |
| 926 | break; |
| 927 | case HW_ERROR_SCRUB_OFF: |
| 928 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; |
| 929 | break; |
| 930 | default: |
| 931 | rc = -EINVAL; |
| 932 | break; |
| 933 | } |
| 934 | } |
| 935 | device_unlock(dev); |
| 936 | if (rc) |
| 937 | return rc; |
| 938 | return size; |
| 939 | } |
| 940 | static DEVICE_ATTR_RW(hw_error_scrub); |
| 941 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 942 | /* |
| 943 | * This shows the number of full Address Range Scrubs that have been |
| 944 | * completed since driver load time. Userspace can wait on this using |
| 945 | * select/poll etc. A '+' at the end indicates an ARS is in progress |
| 946 | */ |
| 947 | static ssize_t scrub_show(struct device *dev, |
| 948 | struct device_attribute *attr, char *buf) |
| 949 | { |
| 950 | struct nvdimm_bus_descriptor *nd_desc; |
| 951 | ssize_t rc = -ENXIO; |
| 952 | |
| 953 | device_lock(dev); |
| 954 | nd_desc = dev_get_drvdata(dev); |
| 955 | if (nd_desc) { |
| 956 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 957 | |
| 958 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, |
| 959 | (work_busy(&acpi_desc->work)) ? "+\n" : "\n"); |
| 960 | } |
| 961 | device_unlock(dev); |
| 962 | return rc; |
| 963 | } |
| 964 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 965 | static ssize_t scrub_store(struct device *dev, |
| 966 | struct device_attribute *attr, const char *buf, size_t size) |
| 967 | { |
| 968 | struct nvdimm_bus_descriptor *nd_desc; |
| 969 | ssize_t rc; |
| 970 | long val; |
| 971 | |
| 972 | rc = kstrtol(buf, 0, &val); |
| 973 | if (rc) |
| 974 | return rc; |
| 975 | if (val != 1) |
| 976 | return -EINVAL; |
| 977 | |
| 978 | device_lock(dev); |
| 979 | nd_desc = dev_get_drvdata(dev); |
| 980 | if (nd_desc) { |
| 981 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 982 | |
| 983 | rc = acpi_nfit_ars_rescan(acpi_desc); |
| 984 | } |
| 985 | device_unlock(dev); |
| 986 | if (rc) |
| 987 | return rc; |
| 988 | return size; |
| 989 | } |
| 990 | static DEVICE_ATTR_RW(scrub); |
| 991 | |
| 992 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) |
| 993 | { |
| 994 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 995 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START |
| 996 | | 1 << ND_CMD_ARS_STATUS; |
| 997 | |
| 998 | return (nd_desc->cmd_mask & mask) == mask; |
| 999 | } |
| 1000 | |
| 1001 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) |
| 1002 | { |
| 1003 | struct device *dev = container_of(kobj, struct device, kobj); |
| 1004 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1005 | |
| 1006 | if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus)) |
| 1007 | return 0; |
| 1008 | return a->mode; |
| 1009 | } |
| 1010 | |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1011 | static struct attribute *acpi_nfit_attributes[] = { |
| 1012 | &dev_attr_revision.attr, |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1013 | &dev_attr_scrub.attr, |
Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 1014 | &dev_attr_hw_error_scrub.attr, |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1015 | NULL, |
| 1016 | }; |
| 1017 | |
| 1018 | static struct attribute_group acpi_nfit_attribute_group = { |
| 1019 | .name = "nfit", |
| 1020 | .attrs = acpi_nfit_attributes, |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1021 | .is_visible = nfit_visible, |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1022 | }; |
| 1023 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 1024 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1025 | &nvdimm_bus_attribute_group, |
| 1026 | &acpi_nfit_attribute_group, |
| 1027 | NULL, |
| 1028 | }; |
| 1029 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1030 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
| 1031 | { |
| 1032 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1033 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1034 | |
| 1035 | return __to_nfit_memdev(nfit_mem); |
| 1036 | } |
| 1037 | |
| 1038 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) |
| 1039 | { |
| 1040 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1041 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1042 | |
| 1043 | return nfit_mem->dcr; |
| 1044 | } |
| 1045 | |
| 1046 | static ssize_t handle_show(struct device *dev, |
| 1047 | struct device_attribute *attr, char *buf) |
| 1048 | { |
| 1049 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 1050 | |
| 1051 | return sprintf(buf, "%#x\n", memdev->device_handle); |
| 1052 | } |
| 1053 | static DEVICE_ATTR_RO(handle); |
| 1054 | |
| 1055 | static ssize_t phys_id_show(struct device *dev, |
| 1056 | struct device_attribute *attr, char *buf) |
| 1057 | { |
| 1058 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 1059 | |
| 1060 | return sprintf(buf, "%#x\n", memdev->physical_id); |
| 1061 | } |
| 1062 | static DEVICE_ATTR_RO(phys_id); |
| 1063 | |
| 1064 | static ssize_t vendor_show(struct device *dev, |
| 1065 | struct device_attribute *attr, char *buf) |
| 1066 | { |
| 1067 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1068 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1069 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1070 | } |
| 1071 | static DEVICE_ATTR_RO(vendor); |
| 1072 | |
| 1073 | static ssize_t rev_id_show(struct device *dev, |
| 1074 | struct device_attribute *attr, char *buf) |
| 1075 | { |
| 1076 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1077 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1078 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1079 | } |
| 1080 | static DEVICE_ATTR_RO(rev_id); |
| 1081 | |
| 1082 | static ssize_t device_show(struct device *dev, |
| 1083 | struct device_attribute *attr, char *buf) |
| 1084 | { |
| 1085 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1086 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1087 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1088 | } |
| 1089 | static DEVICE_ATTR_RO(device); |
| 1090 | |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1091 | static ssize_t subsystem_vendor_show(struct device *dev, |
| 1092 | struct device_attribute *attr, char *buf) |
| 1093 | { |
| 1094 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1095 | |
| 1096 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); |
| 1097 | } |
| 1098 | static DEVICE_ATTR_RO(subsystem_vendor); |
| 1099 | |
| 1100 | static ssize_t subsystem_rev_id_show(struct device *dev, |
| 1101 | struct device_attribute *attr, char *buf) |
| 1102 | { |
| 1103 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1104 | |
| 1105 | return sprintf(buf, "0x%04x\n", |
| 1106 | be16_to_cpu(dcr->subsystem_revision_id)); |
| 1107 | } |
| 1108 | static DEVICE_ATTR_RO(subsystem_rev_id); |
| 1109 | |
| 1110 | static ssize_t subsystem_device_show(struct device *dev, |
| 1111 | struct device_attribute *attr, char *buf) |
| 1112 | { |
| 1113 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1114 | |
| 1115 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); |
| 1116 | } |
| 1117 | static DEVICE_ATTR_RO(subsystem_device); |
| 1118 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1119 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
| 1120 | { |
| 1121 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1122 | int formats = 0; |
| 1123 | |
| 1124 | if (nfit_mem->memdev_pmem) |
| 1125 | formats++; |
| 1126 | if (nfit_mem->memdev_bdw) |
| 1127 | formats++; |
| 1128 | return formats; |
| 1129 | } |
| 1130 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1131 | static ssize_t format_show(struct device *dev, |
| 1132 | struct device_attribute *attr, char *buf) |
| 1133 | { |
| 1134 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1135 | |
Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 1136 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1137 | } |
| 1138 | static DEVICE_ATTR_RO(format); |
| 1139 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1140 | static ssize_t format1_show(struct device *dev, |
| 1141 | struct device_attribute *attr, char *buf) |
| 1142 | { |
| 1143 | u32 handle; |
| 1144 | ssize_t rc = -ENXIO; |
| 1145 | struct nfit_mem *nfit_mem; |
| 1146 | struct nfit_memdev *nfit_memdev; |
| 1147 | struct acpi_nfit_desc *acpi_desc; |
| 1148 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1149 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1150 | |
| 1151 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1152 | acpi_desc = nfit_mem->acpi_desc; |
| 1153 | handle = to_nfit_memdev(dev)->device_handle; |
| 1154 | |
| 1155 | /* assumes DIMMs have at most 2 published interface codes */ |
| 1156 | mutex_lock(&acpi_desc->init_mutex); |
| 1157 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 1158 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| 1159 | struct nfit_dcr *nfit_dcr; |
| 1160 | |
| 1161 | if (memdev->device_handle != handle) |
| 1162 | continue; |
| 1163 | |
| 1164 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 1165 | if (nfit_dcr->dcr->region_index != memdev->region_index) |
| 1166 | continue; |
| 1167 | if (nfit_dcr->dcr->code == dcr->code) |
| 1168 | continue; |
Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 1169 | rc = sprintf(buf, "0x%04x\n", |
| 1170 | le16_to_cpu(nfit_dcr->dcr->code)); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1171 | break; |
| 1172 | } |
| 1173 | if (rc != ENXIO) |
| 1174 | break; |
| 1175 | } |
| 1176 | mutex_unlock(&acpi_desc->init_mutex); |
| 1177 | return rc; |
| 1178 | } |
| 1179 | static DEVICE_ATTR_RO(format1); |
| 1180 | |
| 1181 | static ssize_t formats_show(struct device *dev, |
| 1182 | struct device_attribute *attr, char *buf) |
| 1183 | { |
| 1184 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1185 | |
| 1186 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); |
| 1187 | } |
| 1188 | static DEVICE_ATTR_RO(formats); |
| 1189 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1190 | static ssize_t serial_show(struct device *dev, |
| 1191 | struct device_attribute *attr, char *buf) |
| 1192 | { |
| 1193 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1194 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1195 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1196 | } |
| 1197 | static DEVICE_ATTR_RO(serial); |
| 1198 | |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1199 | static ssize_t family_show(struct device *dev, |
| 1200 | struct device_attribute *attr, char *buf) |
| 1201 | { |
| 1202 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1203 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1204 | |
| 1205 | if (nfit_mem->family < 0) |
| 1206 | return -ENXIO; |
| 1207 | return sprintf(buf, "%d\n", nfit_mem->family); |
| 1208 | } |
| 1209 | static DEVICE_ATTR_RO(family); |
| 1210 | |
| 1211 | static ssize_t dsm_mask_show(struct device *dev, |
| 1212 | struct device_attribute *attr, char *buf) |
| 1213 | { |
| 1214 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1215 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1216 | |
| 1217 | if (nfit_mem->family < 0) |
| 1218 | return -ENXIO; |
| 1219 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); |
| 1220 | } |
| 1221 | static DEVICE_ATTR_RO(dsm_mask); |
| 1222 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1223 | static ssize_t flags_show(struct device *dev, |
| 1224 | struct device_attribute *attr, char *buf) |
| 1225 | { |
| 1226 | u16 flags = to_nfit_memdev(dev)->flags; |
| 1227 | |
| 1228 | return sprintf(buf, "%s%s%s%s%s\n", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1229 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
| 1230 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", |
| 1231 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1232 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1233 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1234 | } |
| 1235 | static DEVICE_ATTR_RO(flags); |
| 1236 | |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1237 | static ssize_t id_show(struct device *dev, |
| 1238 | struct device_attribute *attr, char *buf) |
| 1239 | { |
| 1240 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1241 | |
| 1242 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) |
| 1243 | return sprintf(buf, "%04x-%02x-%04x-%08x\n", |
| 1244 | be16_to_cpu(dcr->vendor_id), |
| 1245 | dcr->manufacturing_location, |
| 1246 | be16_to_cpu(dcr->manufacturing_date), |
| 1247 | be32_to_cpu(dcr->serial_number)); |
| 1248 | else |
| 1249 | return sprintf(buf, "%04x-%08x\n", |
| 1250 | be16_to_cpu(dcr->vendor_id), |
| 1251 | be32_to_cpu(dcr->serial_number)); |
| 1252 | } |
| 1253 | static DEVICE_ATTR_RO(id); |
| 1254 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1255 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
| 1256 | &dev_attr_handle.attr, |
| 1257 | &dev_attr_phys_id.attr, |
| 1258 | &dev_attr_vendor.attr, |
| 1259 | &dev_attr_device.attr, |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1260 | &dev_attr_rev_id.attr, |
| 1261 | &dev_attr_subsystem_vendor.attr, |
| 1262 | &dev_attr_subsystem_device.attr, |
| 1263 | &dev_attr_subsystem_rev_id.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1264 | &dev_attr_format.attr, |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1265 | &dev_attr_formats.attr, |
| 1266 | &dev_attr_format1.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1267 | &dev_attr_serial.attr, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1268 | &dev_attr_flags.attr, |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1269 | &dev_attr_id.attr, |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1270 | &dev_attr_family.attr, |
| 1271 | &dev_attr_dsm_mask.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1272 | NULL, |
| 1273 | }; |
| 1274 | |
| 1275 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, |
| 1276 | struct attribute *a, int n) |
| 1277 | { |
| 1278 | struct device *dev = container_of(kobj, struct device, kobj); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1279 | struct nvdimm *nvdimm = to_nvdimm(dev); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1280 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1281 | if (!to_nfit_dcr(dev)) |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1282 | return 0; |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1283 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
| 1284 | return 0; |
| 1285 | return a->mode; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1286 | } |
| 1287 | |
| 1288 | static struct attribute_group acpi_nfit_dimm_attribute_group = { |
| 1289 | .name = "nfit", |
| 1290 | .attrs = acpi_nfit_dimm_attributes, |
| 1291 | .is_visible = acpi_nfit_dimm_attr_visible, |
| 1292 | }; |
| 1293 | |
| 1294 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1295 | &nvdimm_attribute_group, |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1296 | &nd_device_attribute_group, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1297 | &acpi_nfit_dimm_attribute_group, |
| 1298 | NULL, |
| 1299 | }; |
| 1300 | |
| 1301 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, |
| 1302 | u32 device_handle) |
| 1303 | { |
| 1304 | struct nfit_mem *nfit_mem; |
| 1305 | |
| 1306 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
| 1307 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) |
| 1308 | return nfit_mem->nvdimm; |
| 1309 | |
| 1310 | return NULL; |
| 1311 | } |
| 1312 | |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1313 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1314 | { |
| 1315 | struct nfit_mem *nfit_mem; |
| 1316 | struct acpi_nfit_desc *acpi_desc; |
| 1317 | |
| 1318 | dev_dbg(dev->parent, "%s: %s: event: %d\n", dev_name(dev), __func__, |
| 1319 | event); |
| 1320 | |
| 1321 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { |
| 1322 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), |
| 1323 | event); |
| 1324 | return; |
| 1325 | } |
| 1326 | |
| 1327 | acpi_desc = dev_get_drvdata(dev->parent); |
| 1328 | if (!acpi_desc) |
| 1329 | return; |
| 1330 | |
| 1331 | /* |
| 1332 | * If we successfully retrieved acpi_desc, then we know nfit_mem data |
| 1333 | * is still valid. |
| 1334 | */ |
| 1335 | nfit_mem = dev_get_drvdata(dev); |
| 1336 | if (nfit_mem && nfit_mem->flags_attr) |
| 1337 | sysfs_notify_dirent(nfit_mem->flags_attr); |
| 1338 | } |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1339 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1340 | |
| 1341 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) |
| 1342 | { |
| 1343 | struct acpi_device *adev = data; |
| 1344 | struct device *dev = &adev->dev; |
| 1345 | |
| 1346 | device_lock(dev->parent); |
| 1347 | __acpi_nvdimm_notify(dev, event); |
| 1348 | device_unlock(dev->parent); |
| 1349 | } |
| 1350 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1351 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
| 1352 | struct nfit_mem *nfit_mem, u32 device_handle) |
| 1353 | { |
| 1354 | struct acpi_device *adev, *adev_dimm; |
| 1355 | struct device *dev = acpi_desc->dev; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1356 | unsigned long dsm_mask; |
| 1357 | const u8 *uuid; |
Linda Knippers | 60e95f43 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1358 | int i; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1359 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1360 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
| 1361 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1362 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1363 | adev = to_acpi_dev(acpi_desc); |
| 1364 | if (!adev) |
| 1365 | return 0; |
| 1366 | |
| 1367 | adev_dimm = acpi_find_child_device(adev, device_handle, false); |
| 1368 | nfit_mem->adev = adev_dimm; |
| 1369 | if (!adev_dimm) { |
| 1370 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", |
| 1371 | device_handle); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1372 | return force_enable_dimms ? 0 : -ENODEV; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1373 | } |
| 1374 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1375 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
| 1376 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { |
| 1377 | dev_err(dev, "%s: notification registration failed\n", |
| 1378 | dev_name(&adev_dimm->dev)); |
| 1379 | return -ENXIO; |
| 1380 | } |
| 1381 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1382 | /* |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1383 | * Until standardization materializes we need to consider 4 |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1384 | * different command sets. Note, that checking for function0 (bit0) |
| 1385 | * tells us if any commands are reachable through this uuid. |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1386 | */ |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1387 | for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_MSFT; i++) |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1388 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1389 | break; |
| 1390 | |
| 1391 | /* limit the supported commands to those that are publicly documented */ |
| 1392 | nfit_mem->family = i; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1393 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1394 | dsm_mask = 0x3fe; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1395 | if (disable_vendor_specific) |
| 1396 | dsm_mask &= ~(1 << ND_CMD_VENDOR); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1397 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1398 | dsm_mask = 0x1c3c76; |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1399 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1400 | dsm_mask = 0x1fe; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1401 | if (disable_vendor_specific) |
| 1402 | dsm_mask &= ~(1 << 8); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1403 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
| 1404 | dsm_mask = 0xffffffff; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1405 | } else { |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1406 | dev_dbg(dev, "unknown dimm command family\n"); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1407 | nfit_mem->family = -1; |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1408 | /* DSMs are optional, continue loading the driver... */ |
| 1409 | return 0; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1410 | } |
| 1411 | |
| 1412 | uuid = to_nfit_uuid(nfit_mem->family); |
| 1413 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1414 | if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i)) |
| 1415 | set_bit(i, &nfit_mem->dsm_mask); |
| 1416 | |
Linda Knippers | 60e95f43 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1417 | return 0; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1418 | } |
| 1419 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1420 | static void shutdown_dimm_notify(void *data) |
| 1421 | { |
| 1422 | struct acpi_nfit_desc *acpi_desc = data; |
| 1423 | struct nfit_mem *nfit_mem; |
| 1424 | |
| 1425 | mutex_lock(&acpi_desc->init_mutex); |
| 1426 | /* |
| 1427 | * Clear out the nfit_mem->flags_attr and shut down dimm event |
| 1428 | * notifications. |
| 1429 | */ |
| 1430 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1431 | struct acpi_device *adev_dimm = nfit_mem->adev; |
| 1432 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1433 | if (nfit_mem->flags_attr) { |
| 1434 | sysfs_put(nfit_mem->flags_attr); |
| 1435 | nfit_mem->flags_attr = NULL; |
| 1436 | } |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1437 | if (adev_dimm) |
| 1438 | acpi_remove_notify_handler(adev_dimm->handle, |
| 1439 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1440 | } |
| 1441 | mutex_unlock(&acpi_desc->init_mutex); |
| 1442 | } |
| 1443 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1444 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
| 1445 | { |
| 1446 | struct nfit_mem *nfit_mem; |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1447 | int dimm_count = 0, rc; |
| 1448 | struct nvdimm *nvdimm; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1449 | |
| 1450 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1451 | struct acpi_nfit_flush_address *flush; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1452 | unsigned long flags = 0, cmd_mask; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1453 | u32 device_handle; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1454 | u16 mem_flags; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1455 | |
| 1456 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 1457 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); |
| 1458 | if (nvdimm) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1459 | dimm_count++; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1460 | continue; |
| 1461 | } |
| 1462 | |
| 1463 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) |
| 1464 | flags |= NDD_ALIASING; |
| 1465 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1466 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1467 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1468 | flags |= NDD_UNARMED; |
| 1469 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1470 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
| 1471 | if (rc) |
| 1472 | continue; |
| 1473 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1474 | /* |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1475 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
| 1476 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the |
| 1477 | * userspace interface. |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1478 | */ |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1479 | cmd_mask = 1UL << ND_CMD_CALL; |
| 1480 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) |
| 1481 | cmd_mask |= nfit_mem->dsm_mask; |
| 1482 | |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1483 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
| 1484 | : NULL; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1485 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1486 | acpi_nfit_dimm_attribute_groups, |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1487 | flags, cmd_mask, flush ? flush->hint_count : 0, |
| 1488 | nfit_mem->flush_wpq); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1489 | if (!nvdimm) |
| 1490 | return -ENOMEM; |
| 1491 | |
| 1492 | nfit_mem->nvdimm = nvdimm; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1493 | dimm_count++; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1494 | |
| 1495 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) |
| 1496 | continue; |
| 1497 | |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1498 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n", |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1499 | nvdimm_name(nvdimm), |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1500 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
| 1501 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", |
| 1502 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1503 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1504 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1505 | } |
| 1506 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1507 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
| 1508 | if (rc) |
| 1509 | return rc; |
| 1510 | |
| 1511 | /* |
| 1512 | * Now that dimms are successfully registered, and async registration |
| 1513 | * is flushed, attempt to enable event notification. |
| 1514 | */ |
| 1515 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
| 1516 | struct kernfs_node *nfit_kernfs; |
| 1517 | |
| 1518 | nvdimm = nfit_mem->nvdimm; |
| 1519 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); |
| 1520 | if (nfit_kernfs) |
| 1521 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, |
| 1522 | "flags"); |
| 1523 | sysfs_put(nfit_kernfs); |
| 1524 | if (!nfit_mem->flags_attr) |
| 1525 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", |
| 1526 | nvdimm_name(nvdimm)); |
| 1527 | } |
| 1528 | |
| 1529 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, |
| 1530 | acpi_desc); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1531 | } |
| 1532 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1533 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
| 1534 | { |
| 1535 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1536 | const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS); |
| 1537 | struct acpi_device *adev; |
| 1538 | int i; |
| 1539 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1540 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1541 | adev = to_acpi_dev(acpi_desc); |
| 1542 | if (!adev) |
| 1543 | return; |
| 1544 | |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 1545 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1546 | if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i)) |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1547 | set_bit(i, &nd_desc->cmd_mask); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1548 | } |
| 1549 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1550 | static ssize_t range_index_show(struct device *dev, |
| 1551 | struct device_attribute *attr, char *buf) |
| 1552 | { |
| 1553 | struct nd_region *nd_region = to_nd_region(dev); |
| 1554 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); |
| 1555 | |
| 1556 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); |
| 1557 | } |
| 1558 | static DEVICE_ATTR_RO(range_index); |
| 1559 | |
| 1560 | static struct attribute *acpi_nfit_region_attributes[] = { |
| 1561 | &dev_attr_range_index.attr, |
| 1562 | NULL, |
| 1563 | }; |
| 1564 | |
| 1565 | static struct attribute_group acpi_nfit_region_attribute_group = { |
| 1566 | .name = "nfit", |
| 1567 | .attrs = acpi_nfit_region_attributes, |
| 1568 | }; |
| 1569 | |
| 1570 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { |
| 1571 | &nd_region_attribute_group, |
| 1572 | &nd_mapping_attribute_group, |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 1573 | &nd_device_attribute_group, |
Toshi Kani | 74ae66c | 2015-06-19 12:18:34 -0600 | [diff] [blame] | 1574 | &nd_numa_attribute_group, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1575 | &acpi_nfit_region_attribute_group, |
| 1576 | NULL, |
| 1577 | }; |
| 1578 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1579 | /* enough info to uniquely specify an interleave set */ |
| 1580 | struct nfit_set_info { |
| 1581 | struct nfit_set_info_map { |
| 1582 | u64 region_offset; |
| 1583 | u32 serial_number; |
| 1584 | u32 pad; |
| 1585 | } mapping[0]; |
| 1586 | }; |
| 1587 | |
| 1588 | static size_t sizeof_nfit_set_info(int num_mappings) |
| 1589 | { |
| 1590 | return sizeof(struct nfit_set_info) |
| 1591 | + num_mappings * sizeof(struct nfit_set_info_map); |
| 1592 | } |
| 1593 | |
| 1594 | static int cmp_map(const void *m0, const void *m1) |
| 1595 | { |
| 1596 | const struct nfit_set_info_map *map0 = m0; |
| 1597 | const struct nfit_set_info_map *map1 = m1; |
| 1598 | |
| 1599 | return memcmp(&map0->region_offset, &map1->region_offset, |
| 1600 | sizeof(u64)); |
| 1601 | } |
| 1602 | |
| 1603 | /* Retrieve the nth entry referencing this spa */ |
| 1604 | static struct acpi_nfit_memory_map *memdev_from_spa( |
| 1605 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) |
| 1606 | { |
| 1607 | struct nfit_memdev *nfit_memdev; |
| 1608 | |
| 1609 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) |
| 1610 | if (nfit_memdev->memdev->range_index == range_index) |
| 1611 | if (n-- == 0) |
| 1612 | return nfit_memdev->memdev; |
| 1613 | return NULL; |
| 1614 | } |
| 1615 | |
| 1616 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, |
| 1617 | struct nd_region_desc *ndr_desc, |
| 1618 | struct acpi_nfit_system_address *spa) |
| 1619 | { |
| 1620 | int i, spa_type = nfit_spa_type(spa); |
| 1621 | struct device *dev = acpi_desc->dev; |
| 1622 | struct nd_interleave_set *nd_set; |
| 1623 | u16 nr = ndr_desc->num_mappings; |
| 1624 | struct nfit_set_info *info; |
| 1625 | |
| 1626 | if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE) |
| 1627 | /* pass */; |
| 1628 | else |
| 1629 | return 0; |
| 1630 | |
| 1631 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
| 1632 | if (!nd_set) |
| 1633 | return -ENOMEM; |
| 1634 | |
| 1635 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
| 1636 | if (!info) |
| 1637 | return -ENOMEM; |
| 1638 | for (i = 0; i < nr; i++) { |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 1639 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1640 | struct nfit_set_info_map *map = &info->mapping[i]; |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 1641 | struct nvdimm *nvdimm = mapping->nvdimm; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1642 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1643 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, |
| 1644 | spa->range_index, i); |
| 1645 | |
| 1646 | if (!memdev || !nfit_mem->dcr) { |
| 1647 | dev_err(dev, "%s: failed to find DCR\n", __func__); |
| 1648 | return -ENODEV; |
| 1649 | } |
| 1650 | |
| 1651 | map->region_offset = memdev->region_offset; |
| 1652 | map->serial_number = nfit_mem->dcr->serial_number; |
| 1653 | } |
| 1654 | |
| 1655 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 1656 | cmp_map, NULL); |
| 1657 | nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
| 1658 | ndr_desc->nd_set = nd_set; |
| 1659 | devm_kfree(dev, info); |
| 1660 | |
| 1661 | return 0; |
| 1662 | } |
| 1663 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1664 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
| 1665 | { |
| 1666 | struct acpi_nfit_interleave *idt = mmio->idt; |
| 1667 | u32 sub_line_offset, line_index, line_offset; |
| 1668 | u64 line_no, table_skip_count, table_offset; |
| 1669 | |
| 1670 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); |
| 1671 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); |
| 1672 | line_offset = idt->line_offset[line_index] |
| 1673 | * mmio->line_size; |
| 1674 | table_offset = table_skip_count * mmio->table_size; |
| 1675 | |
| 1676 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; |
| 1677 | } |
| 1678 | |
Ross Zwisler | de4a196 | 2015-08-20 16:27:38 -0600 | [diff] [blame] | 1679 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1680 | { |
| 1681 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 1682 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; |
Ross Zwisler | 68202c9 | 2016-07-29 14:59:12 -0600 | [diff] [blame] | 1683 | const u32 STATUS_MASK = 0x80000037; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1684 | |
| 1685 | if (mmio->num_lines) |
| 1686 | offset = to_interleave_offset(offset, mmio); |
| 1687 | |
Ross Zwisler | 68202c9 | 2016-07-29 14:59:12 -0600 | [diff] [blame] | 1688 | return readl(mmio->addr.base + offset) & STATUS_MASK; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1689 | } |
| 1690 | |
| 1691 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, |
| 1692 | resource_size_t dpa, unsigned int len, unsigned int write) |
| 1693 | { |
| 1694 | u64 cmd, offset; |
| 1695 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 1696 | |
| 1697 | enum { |
| 1698 | BCW_OFFSET_MASK = (1ULL << 48)-1, |
| 1699 | BCW_LEN_SHIFT = 48, |
| 1700 | BCW_LEN_MASK = (1ULL << 8) - 1, |
| 1701 | BCW_CMD_SHIFT = 56, |
| 1702 | }; |
| 1703 | |
| 1704 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; |
| 1705 | len = len >> L1_CACHE_SHIFT; |
| 1706 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; |
| 1707 | cmd |= ((u64) write) << BCW_CMD_SHIFT; |
| 1708 | |
| 1709 | offset = nfit_blk->cmd_offset + mmio->size * bw; |
| 1710 | if (mmio->num_lines) |
| 1711 | offset = to_interleave_offset(offset, mmio); |
| 1712 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1713 | writeq(cmd, mmio->addr.base + offset); |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 1714 | nvdimm_flush(nfit_blk->nd_region); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1715 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1716 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1717 | readq(mmio->addr.base + offset); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1718 | } |
| 1719 | |
| 1720 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, |
| 1721 | resource_size_t dpa, void *iobuf, size_t len, int rw, |
| 1722 | unsigned int lane) |
| 1723 | { |
| 1724 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 1725 | unsigned int copied = 0; |
| 1726 | u64 base_offset; |
| 1727 | int rc; |
| 1728 | |
| 1729 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES |
| 1730 | + lane * mmio->size; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1731 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
| 1732 | while (len) { |
| 1733 | unsigned int c; |
| 1734 | u64 offset; |
| 1735 | |
| 1736 | if (mmio->num_lines) { |
| 1737 | u32 line_offset; |
| 1738 | |
| 1739 | offset = to_interleave_offset(base_offset + copied, |
| 1740 | mmio); |
| 1741 | div_u64_rem(offset, mmio->line_size, &line_offset); |
| 1742 | c = min_t(size_t, len, mmio->line_size - line_offset); |
| 1743 | } else { |
| 1744 | offset = base_offset + nfit_blk->bdw_offset; |
| 1745 | c = len; |
| 1746 | } |
| 1747 | |
| 1748 | if (rw) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1749 | memcpy_to_pmem(mmio->addr.aperture + offset, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1750 | iobuf + copied, c); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1751 | else { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1752 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1753 | mmio_flush_range((void __force *) |
| 1754 | mmio->addr.aperture + offset, c); |
| 1755 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1756 | memcpy_from_pmem(iobuf + copied, |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1757 | mmio->addr.aperture + offset, c); |
| 1758 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1759 | |
| 1760 | copied += c; |
| 1761 | len -= c; |
| 1762 | } |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1763 | |
| 1764 | if (rw) |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 1765 | nvdimm_flush(nfit_blk->nd_region); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1766 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1767 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
| 1768 | return rc; |
| 1769 | } |
| 1770 | |
| 1771 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, |
| 1772 | resource_size_t dpa, void *iobuf, u64 len, int rw) |
| 1773 | { |
| 1774 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); |
| 1775 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 1776 | struct nd_region *nd_region = nfit_blk->nd_region; |
| 1777 | unsigned int lane, copied = 0; |
| 1778 | int rc = 0; |
| 1779 | |
| 1780 | lane = nd_region_acquire_lane(nd_region); |
| 1781 | while (len) { |
| 1782 | u64 c = min(len, mmio->size); |
| 1783 | |
| 1784 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, |
| 1785 | iobuf + copied, c, rw, lane); |
| 1786 | if (rc) |
| 1787 | break; |
| 1788 | |
| 1789 | copied += c; |
| 1790 | len -= c; |
| 1791 | } |
| 1792 | nd_region_release_lane(nd_region, lane); |
| 1793 | |
| 1794 | return rc; |
| 1795 | } |
| 1796 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1797 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
| 1798 | struct acpi_nfit_interleave *idt, u16 interleave_ways) |
| 1799 | { |
| 1800 | if (idt) { |
| 1801 | mmio->num_lines = idt->line_count; |
| 1802 | mmio->line_size = idt->line_size; |
| 1803 | if (interleave_ways == 0) |
| 1804 | return -ENXIO; |
| 1805 | mmio->table_size = mmio->num_lines * interleave_ways |
| 1806 | * mmio->line_size; |
| 1807 | } |
| 1808 | |
| 1809 | return 0; |
| 1810 | } |
| 1811 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1812 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
| 1813 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) |
| 1814 | { |
| 1815 | struct nd_cmd_dimm_flags flags; |
| 1816 | int rc; |
| 1817 | |
| 1818 | memset(&flags, 0, sizeof(flags)); |
| 1819 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1820 | sizeof(flags), NULL); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1821 | |
| 1822 | if (rc >= 0 && flags.status == 0) |
| 1823 | nfit_blk->dimm_flags = flags.flags; |
| 1824 | else if (rc == -ENOTTY) { |
| 1825 | /* fall back to a conservative default */ |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1826 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1827 | rc = 0; |
| 1828 | } else |
| 1829 | rc = -ENXIO; |
| 1830 | |
| 1831 | return rc; |
| 1832 | } |
| 1833 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1834 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
| 1835 | struct device *dev) |
| 1836 | { |
| 1837 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1838 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
| 1839 | struct nfit_blk_mmio *mmio; |
| 1840 | struct nfit_blk *nfit_blk; |
| 1841 | struct nfit_mem *nfit_mem; |
| 1842 | struct nvdimm *nvdimm; |
| 1843 | int rc; |
| 1844 | |
| 1845 | nvdimm = nd_blk_region_to_dimm(ndbr); |
| 1846 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1847 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { |
| 1848 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, |
| 1849 | nfit_mem ? "" : " nfit_mem", |
Dan Williams | 193ccca | 2015-06-30 16:09:39 -0400 | [diff] [blame] | 1850 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
| 1851 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1852 | return -ENXIO; |
| 1853 | } |
| 1854 | |
| 1855 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); |
| 1856 | if (!nfit_blk) |
| 1857 | return -ENOMEM; |
| 1858 | nd_blk_region_set_provider_data(ndbr, nfit_blk); |
| 1859 | nfit_blk->nd_region = to_nd_region(dev); |
| 1860 | |
| 1861 | /* map block aperture memory */ |
| 1862 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; |
| 1863 | mmio = &nfit_blk->mmio[BDW]; |
Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 1864 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
| 1865 | nfit_mem->spa_bdw->length, ARCH_MEMREMAP_PMEM); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1866 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1867 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
| 1868 | nvdimm_name(nvdimm)); |
| 1869 | return -ENOMEM; |
| 1870 | } |
| 1871 | mmio->size = nfit_mem->bdw->size; |
| 1872 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; |
| 1873 | mmio->idt = nfit_mem->idt_bdw; |
| 1874 | mmio->spa = nfit_mem->spa_bdw; |
| 1875 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, |
| 1876 | nfit_mem->memdev_bdw->interleave_ways); |
| 1877 | if (rc) { |
| 1878 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", |
| 1879 | __func__, nvdimm_name(nvdimm)); |
| 1880 | return rc; |
| 1881 | } |
| 1882 | |
| 1883 | /* map block control memory */ |
| 1884 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; |
| 1885 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; |
| 1886 | mmio = &nfit_blk->mmio[DCR]; |
Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 1887 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
| 1888 | nfit_mem->spa_dcr->length); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1889 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1890 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
| 1891 | nvdimm_name(nvdimm)); |
| 1892 | return -ENOMEM; |
| 1893 | } |
| 1894 | mmio->size = nfit_mem->dcr->window_size; |
| 1895 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; |
| 1896 | mmio->idt = nfit_mem->idt_dcr; |
| 1897 | mmio->spa = nfit_mem->spa_dcr; |
| 1898 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, |
| 1899 | nfit_mem->memdev_dcr->interleave_ways); |
| 1900 | if (rc) { |
| 1901 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", |
| 1902 | __func__, nvdimm_name(nvdimm)); |
| 1903 | return rc; |
| 1904 | } |
| 1905 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1906 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
| 1907 | if (rc < 0) { |
| 1908 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", |
| 1909 | __func__, nvdimm_name(nvdimm)); |
| 1910 | return rc; |
| 1911 | } |
| 1912 | |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 1913 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1914 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
| 1915 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1916 | if (mmio->line_size == 0) |
| 1917 | return 0; |
| 1918 | |
| 1919 | if ((u32) nfit_blk->cmd_offset % mmio->line_size |
| 1920 | + 8 > mmio->line_size) { |
| 1921 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); |
| 1922 | return -ENXIO; |
| 1923 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size |
| 1924 | + 8 > mmio->line_size) { |
| 1925 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); |
| 1926 | return -ENXIO; |
| 1927 | } |
| 1928 | |
| 1929 | return 0; |
| 1930 | } |
| 1931 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1932 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1933 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1934 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1935 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1936 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1937 | int cmd_rc, rc; |
| 1938 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1939 | cmd->address = spa->address; |
| 1940 | cmd->length = spa->length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1941 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
| 1942 | sizeof(*cmd), &cmd_rc); |
| 1943 | if (rc < 0) |
| 1944 | return rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1945 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1946 | } |
| 1947 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1948 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1949 | { |
| 1950 | int rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1951 | int cmd_rc; |
| 1952 | struct nd_cmd_ars_start ars_start; |
| 1953 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 1954 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1955 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1956 | memset(&ars_start, 0, sizeof(ars_start)); |
| 1957 | ars_start.address = spa->address; |
| 1958 | ars_start.length = spa->length; |
| 1959 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
| 1960 | ars_start.type = ND_ARS_PERSISTENT; |
| 1961 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) |
| 1962 | ars_start.type = ND_ARS_VOLATILE; |
| 1963 | else |
| 1964 | return -ENOTTY; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1965 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1966 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 1967 | sizeof(ars_start), &cmd_rc); |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1968 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1969 | if (rc < 0) |
| 1970 | return rc; |
| 1971 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1972 | } |
| 1973 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1974 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1975 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1976 | int rc, cmd_rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1977 | struct nd_cmd_ars_start ars_start; |
| 1978 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1979 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1980 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1981 | memset(&ars_start, 0, sizeof(ars_start)); |
| 1982 | ars_start.address = ars_status->restart_address; |
| 1983 | ars_start.length = ars_status->restart_length; |
| 1984 | ars_start.type = ars_status->type; |
| 1985 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 1986 | sizeof(ars_start), &cmd_rc); |
| 1987 | if (rc < 0) |
| 1988 | return rc; |
| 1989 | return cmd_rc; |
| 1990 | } |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1991 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1992 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
| 1993 | { |
| 1994 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1995 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| 1996 | int rc, cmd_rc; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1997 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1998 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
| 1999 | acpi_desc->ars_status_size, &cmd_rc); |
| 2000 | if (rc < 0) |
| 2001 | return rc; |
| 2002 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2003 | } |
| 2004 | |
| 2005 | static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2006 | struct nd_cmd_ars_status *ars_status) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2007 | { |
| 2008 | int rc; |
| 2009 | u32 i; |
| 2010 | |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2011 | for (i = 0; i < ars_status->num_records; i++) { |
| 2012 | rc = nvdimm_bus_add_poison(nvdimm_bus, |
| 2013 | ars_status->records[i].err_address, |
| 2014 | ars_status->records[i].length); |
| 2015 | if (rc) |
| 2016 | return rc; |
| 2017 | } |
| 2018 | |
| 2019 | return 0; |
| 2020 | } |
| 2021 | |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2022 | static void acpi_nfit_remove_resource(void *data) |
| 2023 | { |
| 2024 | struct resource *res = data; |
| 2025 | |
| 2026 | remove_resource(res); |
| 2027 | } |
| 2028 | |
| 2029 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, |
| 2030 | struct nd_region_desc *ndr_desc) |
| 2031 | { |
| 2032 | struct resource *res, *nd_res = ndr_desc->res; |
| 2033 | int is_pmem, ret; |
| 2034 | |
| 2035 | /* No operation if the region is already registered as PMEM */ |
| 2036 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), |
| 2037 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); |
| 2038 | if (is_pmem == REGION_INTERSECTS) |
| 2039 | return 0; |
| 2040 | |
| 2041 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); |
| 2042 | if (!res) |
| 2043 | return -ENOMEM; |
| 2044 | |
| 2045 | res->name = "Persistent Memory"; |
| 2046 | res->start = nd_res->start; |
| 2047 | res->end = nd_res->end; |
| 2048 | res->flags = IORESOURCE_MEM; |
| 2049 | res->desc = IORES_DESC_PERSISTENT_MEMORY; |
| 2050 | |
| 2051 | ret = insert_resource(&iomem_resource, res); |
| 2052 | if (ret) |
| 2053 | return ret; |
| 2054 | |
Sajjan, Vikas C | d932dd2 | 2016-07-04 10:02:51 +0530 | [diff] [blame] | 2055 | ret = devm_add_action_or_reset(acpi_desc->dev, |
| 2056 | acpi_nfit_remove_resource, |
| 2057 | res); |
| 2058 | if (ret) |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2059 | return ret; |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2060 | |
| 2061 | return 0; |
| 2062 | } |
| 2063 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2064 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2065 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2066 | struct acpi_nfit_memory_map *memdev, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2067 | struct nfit_spa *nfit_spa) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2068 | { |
| 2069 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, |
| 2070 | memdev->device_handle); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2071 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2072 | struct nd_blk_region_desc *ndbr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2073 | struct nfit_mem *nfit_mem; |
| 2074 | int blk_valid = 0; |
| 2075 | |
| 2076 | if (!nvdimm) { |
| 2077 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", |
| 2078 | spa->range_index, memdev->device_handle); |
| 2079 | return -ENODEV; |
| 2080 | } |
| 2081 | |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2082 | mapping->nvdimm = nvdimm; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2083 | switch (nfit_spa_type(spa)) { |
| 2084 | case NFIT_SPA_PM: |
| 2085 | case NFIT_SPA_VOLATILE: |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2086 | mapping->start = memdev->address; |
| 2087 | mapping->size = memdev->region_size; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2088 | break; |
| 2089 | case NFIT_SPA_DCR: |
| 2090 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 2091 | if (!nfit_mem || !nfit_mem->bdw) { |
| 2092 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", |
| 2093 | spa->range_index, nvdimm_name(nvdimm)); |
| 2094 | } else { |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2095 | mapping->size = nfit_mem->bdw->capacity; |
| 2096 | mapping->start = nfit_mem->bdw->start_address; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 2097 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2098 | blk_valid = 1; |
| 2099 | } |
| 2100 | |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2101 | ndr_desc->mapping = mapping; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2102 | ndr_desc->num_mappings = blk_valid; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2103 | ndbr_desc = to_blk_region_desc(ndr_desc); |
| 2104 | ndbr_desc->enable = acpi_nfit_blk_region_enable; |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 2105 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2106 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
| 2107 | ndr_desc); |
| 2108 | if (!nfit_spa->nd_region) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2109 | return -ENOMEM; |
| 2110 | break; |
| 2111 | } |
| 2112 | |
| 2113 | return 0; |
| 2114 | } |
| 2115 | |
Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2116 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
| 2117 | { |
| 2118 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || |
| 2119 | nfit_spa_type(spa) == NFIT_SPA_VCD || |
| 2120 | nfit_spa_type(spa) == NFIT_SPA_PDISK || |
| 2121 | nfit_spa_type(spa) == NFIT_SPA_PCD); |
| 2122 | } |
| 2123 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2124 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
| 2125 | struct nfit_spa *nfit_spa) |
| 2126 | { |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2127 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2128 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2129 | struct nd_blk_region_desc ndbr_desc; |
| 2130 | struct nd_region_desc *ndr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2131 | struct nfit_memdev *nfit_memdev; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2132 | struct nvdimm_bus *nvdimm_bus; |
| 2133 | struct resource res; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2134 | int count = 0, rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2135 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2136 | if (nfit_spa->nd_region) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2137 | return 0; |
| 2138 | |
Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2139 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2140 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", |
| 2141 | __func__); |
| 2142 | return 0; |
| 2143 | } |
| 2144 | |
| 2145 | memset(&res, 0, sizeof(res)); |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2146 | memset(&mappings, 0, sizeof(mappings)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2147 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2148 | res.start = spa->address; |
| 2149 | res.end = res.start + spa->length - 1; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2150 | ndr_desc = &ndbr_desc.ndr_desc; |
| 2151 | ndr_desc->res = &res; |
| 2152 | ndr_desc->provider_data = nfit_spa; |
| 2153 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; |
Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 2154 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
| 2155 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( |
| 2156 | spa->proximity_domain); |
| 2157 | else |
| 2158 | ndr_desc->numa_node = NUMA_NO_NODE; |
| 2159 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2160 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 2161 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2162 | struct nd_mapping_desc *mapping; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2163 | |
| 2164 | if (memdev->range_index != spa->range_index) |
| 2165 | continue; |
| 2166 | if (count >= ND_MAX_MAPPINGS) { |
| 2167 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", |
| 2168 | spa->range_index, ND_MAX_MAPPINGS); |
| 2169 | return -ENXIO; |
| 2170 | } |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2171 | mapping = &mappings[count++]; |
| 2172 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2173 | memdev, nfit_spa); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2174 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2175 | goto out; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2176 | } |
| 2177 | |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2178 | ndr_desc->mapping = mappings; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2179 | ndr_desc->num_mappings = count; |
| 2180 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2181 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2182 | goto out; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2183 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2184 | nvdimm_bus = acpi_desc->nvdimm_bus; |
| 2185 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2186 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2187 | if (rc) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2188 | dev_warn(acpi_desc->dev, |
| 2189 | "failed to insert pmem resource to iomem: %d\n", |
| 2190 | rc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2191 | goto out; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2192 | } |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2193 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2194 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 2195 | ndr_desc); |
| 2196 | if (!nfit_spa->nd_region) |
| 2197 | rc = -ENOMEM; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2198 | } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) { |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2199 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
| 2200 | ndr_desc); |
| 2201 | if (!nfit_spa->nd_region) |
| 2202 | rc = -ENOMEM; |
Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2203 | } else if (nfit_spa_is_virtual(spa)) { |
| 2204 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 2205 | ndr_desc); |
| 2206 | if (!nfit_spa->nd_region) |
| 2207 | rc = -ENOMEM; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2208 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2209 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2210 | out: |
| 2211 | if (rc) |
| 2212 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", |
| 2213 | nfit_spa->spa->range_index); |
| 2214 | return rc; |
| 2215 | } |
| 2216 | |
| 2217 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc, |
| 2218 | u32 max_ars) |
| 2219 | { |
| 2220 | struct device *dev = acpi_desc->dev; |
| 2221 | struct nd_cmd_ars_status *ars_status; |
| 2222 | |
| 2223 | if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) { |
| 2224 | memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size); |
| 2225 | return 0; |
| 2226 | } |
| 2227 | |
| 2228 | if (acpi_desc->ars_status) |
| 2229 | devm_kfree(dev, acpi_desc->ars_status); |
| 2230 | acpi_desc->ars_status = NULL; |
| 2231 | ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL); |
| 2232 | if (!ars_status) |
| 2233 | return -ENOMEM; |
| 2234 | acpi_desc->ars_status = ars_status; |
| 2235 | acpi_desc->ars_status_size = max_ars; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2236 | return 0; |
| 2237 | } |
| 2238 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2239 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc, |
| 2240 | struct nfit_spa *nfit_spa) |
| 2241 | { |
| 2242 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2243 | int rc; |
| 2244 | |
| 2245 | if (!nfit_spa->max_ars) { |
| 2246 | struct nd_cmd_ars_cap ars_cap; |
| 2247 | |
| 2248 | memset(&ars_cap, 0, sizeof(ars_cap)); |
| 2249 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); |
| 2250 | if (rc < 0) |
| 2251 | return rc; |
| 2252 | nfit_spa->max_ars = ars_cap.max_ars_out; |
| 2253 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; |
| 2254 | /* check that the supported scrub types match the spa type */ |
| 2255 | if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE && |
| 2256 | ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0) |
| 2257 | return -ENOTTY; |
| 2258 | else if (nfit_spa_type(spa) == NFIT_SPA_PM && |
| 2259 | ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0) |
| 2260 | return -ENOTTY; |
| 2261 | } |
| 2262 | |
| 2263 | if (ars_status_alloc(acpi_desc, nfit_spa->max_ars)) |
| 2264 | return -ENOMEM; |
| 2265 | |
| 2266 | rc = ars_get_status(acpi_desc); |
| 2267 | if (rc < 0 && rc != -ENOSPC) |
| 2268 | return rc; |
| 2269 | |
| 2270 | if (ars_status_process_records(acpi_desc->nvdimm_bus, |
| 2271 | acpi_desc->ars_status)) |
| 2272 | return -ENOMEM; |
| 2273 | |
| 2274 | return 0; |
| 2275 | } |
| 2276 | |
| 2277 | static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc, |
| 2278 | struct nfit_spa *nfit_spa) |
| 2279 | { |
| 2280 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2281 | unsigned int overflow_retry = scrub_overflow_abort; |
| 2282 | u64 init_ars_start = 0, init_ars_len = 0; |
| 2283 | struct device *dev = acpi_desc->dev; |
| 2284 | unsigned int tmo = scrub_timeout; |
| 2285 | int rc; |
| 2286 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2287 | if (!nfit_spa->ars_required || !nfit_spa->nd_region) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2288 | return; |
| 2289 | |
| 2290 | rc = ars_start(acpi_desc, nfit_spa); |
| 2291 | /* |
| 2292 | * If we timed out the initial scan we'll still be busy here, |
| 2293 | * and will wait another timeout before giving up permanently. |
| 2294 | */ |
| 2295 | if (rc < 0 && rc != -EBUSY) |
| 2296 | return; |
| 2297 | |
| 2298 | do { |
| 2299 | u64 ars_start, ars_len; |
| 2300 | |
| 2301 | if (acpi_desc->cancel) |
| 2302 | break; |
| 2303 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); |
| 2304 | if (rc == -ENOTTY) |
| 2305 | break; |
| 2306 | if (rc == -EBUSY && !tmo) { |
| 2307 | dev_warn(dev, "range %d ars timeout, aborting\n", |
| 2308 | spa->range_index); |
| 2309 | break; |
| 2310 | } |
| 2311 | |
| 2312 | if (rc == -EBUSY) { |
| 2313 | /* |
| 2314 | * Note, entries may be appended to the list |
| 2315 | * while the lock is dropped, but the workqueue |
| 2316 | * being active prevents entries being deleted / |
| 2317 | * freed. |
| 2318 | */ |
| 2319 | mutex_unlock(&acpi_desc->init_mutex); |
| 2320 | ssleep(1); |
| 2321 | tmo--; |
| 2322 | mutex_lock(&acpi_desc->init_mutex); |
| 2323 | continue; |
| 2324 | } |
| 2325 | |
| 2326 | /* we got some results, but there are more pending... */ |
| 2327 | if (rc == -ENOSPC && overflow_retry--) { |
| 2328 | if (!init_ars_len) { |
| 2329 | init_ars_len = acpi_desc->ars_status->length; |
| 2330 | init_ars_start = acpi_desc->ars_status->address; |
| 2331 | } |
| 2332 | rc = ars_continue(acpi_desc); |
| 2333 | } |
| 2334 | |
| 2335 | if (rc < 0) { |
| 2336 | dev_warn(dev, "range %d ars continuation failed\n", |
| 2337 | spa->range_index); |
| 2338 | break; |
| 2339 | } |
| 2340 | |
| 2341 | if (init_ars_len) { |
| 2342 | ars_start = init_ars_start; |
| 2343 | ars_len = init_ars_len; |
| 2344 | } else { |
| 2345 | ars_start = acpi_desc->ars_status->address; |
| 2346 | ars_len = acpi_desc->ars_status->length; |
| 2347 | } |
| 2348 | dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n", |
| 2349 | spa->range_index, ars_start, ars_len); |
| 2350 | /* notify the region about new poison entries */ |
| 2351 | nvdimm_region_notify(nfit_spa->nd_region, |
| 2352 | NVDIMM_REVALIDATE_POISON); |
| 2353 | break; |
| 2354 | } while (1); |
| 2355 | } |
| 2356 | |
| 2357 | static void acpi_nfit_scrub(struct work_struct *work) |
| 2358 | { |
| 2359 | struct device *dev; |
| 2360 | u64 init_scrub_length = 0; |
| 2361 | struct nfit_spa *nfit_spa; |
| 2362 | u64 init_scrub_address = 0; |
| 2363 | bool init_ars_done = false; |
| 2364 | struct acpi_nfit_desc *acpi_desc; |
| 2365 | unsigned int tmo = scrub_timeout; |
| 2366 | unsigned int overflow_retry = scrub_overflow_abort; |
| 2367 | |
| 2368 | acpi_desc = container_of(work, typeof(*acpi_desc), work); |
| 2369 | dev = acpi_desc->dev; |
| 2370 | |
| 2371 | /* |
| 2372 | * We scrub in 2 phases. The first phase waits for any platform |
| 2373 | * firmware initiated scrubs to complete and then we go search for the |
| 2374 | * affected spa regions to mark them scanned. In the second phase we |
| 2375 | * initiate a directed scrub for every range that was not scrubbed in |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2376 | * phase 1. If we're called for a 'rescan', we harmlessly pass through |
| 2377 | * the first phase, but really only care about running phase 2, where |
| 2378 | * regions can be notified of new poison. |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2379 | */ |
| 2380 | |
| 2381 | /* process platform firmware initiated scrubs */ |
| 2382 | retry: |
| 2383 | mutex_lock(&acpi_desc->init_mutex); |
| 2384 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2385 | struct nd_cmd_ars_status *ars_status; |
| 2386 | struct acpi_nfit_system_address *spa; |
| 2387 | u64 ars_start, ars_len; |
| 2388 | int rc; |
| 2389 | |
| 2390 | if (acpi_desc->cancel) |
| 2391 | break; |
| 2392 | |
| 2393 | if (nfit_spa->nd_region) |
| 2394 | continue; |
| 2395 | |
| 2396 | if (init_ars_done) { |
| 2397 | /* |
| 2398 | * No need to re-query, we're now just |
| 2399 | * reconciling all the ranges covered by the |
| 2400 | * initial scrub |
| 2401 | */ |
| 2402 | rc = 0; |
| 2403 | } else |
| 2404 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); |
| 2405 | |
| 2406 | if (rc == -ENOTTY) { |
| 2407 | /* no ars capability, just register spa and move on */ |
| 2408 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2409 | continue; |
| 2410 | } |
| 2411 | |
| 2412 | if (rc == -EBUSY && !tmo) { |
| 2413 | /* fallthrough to directed scrub in phase 2 */ |
| 2414 | dev_warn(dev, "timeout awaiting ars results, continuing...\n"); |
| 2415 | break; |
| 2416 | } else if (rc == -EBUSY) { |
| 2417 | mutex_unlock(&acpi_desc->init_mutex); |
| 2418 | ssleep(1); |
| 2419 | tmo--; |
| 2420 | goto retry; |
| 2421 | } |
| 2422 | |
| 2423 | /* we got some results, but there are more pending... */ |
| 2424 | if (rc == -ENOSPC && overflow_retry--) { |
| 2425 | ars_status = acpi_desc->ars_status; |
| 2426 | /* |
| 2427 | * Record the original scrub range, so that we |
| 2428 | * can recall all the ranges impacted by the |
| 2429 | * initial scrub. |
| 2430 | */ |
| 2431 | if (!init_scrub_length) { |
| 2432 | init_scrub_length = ars_status->length; |
| 2433 | init_scrub_address = ars_status->address; |
| 2434 | } |
| 2435 | rc = ars_continue(acpi_desc); |
| 2436 | if (rc == 0) { |
| 2437 | mutex_unlock(&acpi_desc->init_mutex); |
| 2438 | goto retry; |
| 2439 | } |
| 2440 | } |
| 2441 | |
| 2442 | if (rc < 0) { |
| 2443 | /* |
| 2444 | * Initial scrub failed, we'll give it one more |
| 2445 | * try below... |
| 2446 | */ |
| 2447 | break; |
| 2448 | } |
| 2449 | |
| 2450 | /* We got some final results, record completed ranges */ |
| 2451 | ars_status = acpi_desc->ars_status; |
| 2452 | if (init_scrub_length) { |
| 2453 | ars_start = init_scrub_address; |
| 2454 | ars_len = ars_start + init_scrub_length; |
| 2455 | } else { |
| 2456 | ars_start = ars_status->address; |
| 2457 | ars_len = ars_status->length; |
| 2458 | } |
| 2459 | spa = nfit_spa->spa; |
| 2460 | |
| 2461 | if (!init_ars_done) { |
| 2462 | init_ars_done = true; |
| 2463 | dev_dbg(dev, "init scrub %#llx + %#llx complete\n", |
| 2464 | ars_start, ars_len); |
| 2465 | } |
| 2466 | if (ars_start <= spa->address && ars_start + ars_len |
| 2467 | >= spa->address + spa->length) |
| 2468 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2469 | } |
| 2470 | |
| 2471 | /* |
| 2472 | * For all the ranges not covered by an initial scrub we still |
| 2473 | * want to see if there are errors, but it's ok to discover them |
| 2474 | * asynchronously. |
| 2475 | */ |
| 2476 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2477 | /* |
| 2478 | * Flag all the ranges that still need scrubbing, but |
| 2479 | * register them now to make data available. |
| 2480 | */ |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2481 | if (!nfit_spa->nd_region) { |
| 2482 | nfit_spa->ars_required = 1; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2483 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2484 | } |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2485 | } |
| 2486 | |
| 2487 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
| 2488 | acpi_nfit_async_scrub(acpi_desc, nfit_spa); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2489 | acpi_desc->scrub_count++; |
| 2490 | if (acpi_desc->scrub_count_state) |
| 2491 | sysfs_notify_dirent(acpi_desc->scrub_count_state); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2492 | mutex_unlock(&acpi_desc->init_mutex); |
| 2493 | } |
| 2494 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2495 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) |
| 2496 | { |
| 2497 | struct nfit_spa *nfit_spa; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2498 | int rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2499 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2500 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
| 2501 | if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) { |
| 2502 | /* BLK regions don't need to wait for ars results */ |
| 2503 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2504 | if (rc) |
| 2505 | return rc; |
| 2506 | } |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2507 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2508 | queue_work(nfit_wq, &acpi_desc->work); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2509 | return 0; |
| 2510 | } |
| 2511 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2512 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
| 2513 | struct nfit_table_prev *prev) |
| 2514 | { |
| 2515 | struct device *dev = acpi_desc->dev; |
| 2516 | |
| 2517 | if (!list_empty(&prev->spas) || |
| 2518 | !list_empty(&prev->memdevs) || |
| 2519 | !list_empty(&prev->dcrs) || |
| 2520 | !list_empty(&prev->bdws) || |
| 2521 | !list_empty(&prev->idts) || |
| 2522 | !list_empty(&prev->flushes)) { |
| 2523 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); |
| 2524 | return -ENXIO; |
| 2525 | } |
| 2526 | return 0; |
| 2527 | } |
| 2528 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2529 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
| 2530 | { |
| 2531 | struct device *dev = acpi_desc->dev; |
| 2532 | struct kernfs_node *nfit; |
| 2533 | struct device *bus_dev; |
| 2534 | |
| 2535 | if (!ars_supported(acpi_desc->nvdimm_bus)) |
| 2536 | return 0; |
| 2537 | |
| 2538 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); |
| 2539 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); |
| 2540 | if (!nfit) { |
| 2541 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); |
| 2542 | return -ENODEV; |
| 2543 | } |
| 2544 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); |
| 2545 | sysfs_put(nfit); |
| 2546 | if (!acpi_desc->scrub_count_state) { |
| 2547 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); |
| 2548 | return -ENODEV; |
| 2549 | } |
| 2550 | |
| 2551 | return 0; |
| 2552 | } |
| 2553 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2554 | static void acpi_nfit_destruct(void *data) |
| 2555 | { |
| 2556 | struct acpi_nfit_desc *acpi_desc = data; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2557 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2558 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 2559 | /* |
| 2560 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not |
| 2561 | * race teardown |
| 2562 | */ |
| 2563 | mutex_lock(&acpi_desc_lock); |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2564 | acpi_desc->cancel = 1; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2565 | /* |
| 2566 | * Bounce the nvdimm bus lock to make sure any in-flight |
| 2567 | * acpi_nfit_ars_rescan() submissions have had a chance to |
| 2568 | * either submit or see ->cancel set. |
| 2569 | */ |
| 2570 | device_lock(bus_dev); |
| 2571 | device_unlock(bus_dev); |
| 2572 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2573 | flush_workqueue(nfit_wq); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2574 | if (acpi_desc->scrub_count_state) |
| 2575 | sysfs_put(acpi_desc->scrub_count_state); |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2576 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
| 2577 | acpi_desc->nvdimm_bus = NULL; |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 2578 | list_del(&acpi_desc->list); |
| 2579 | mutex_unlock(&acpi_desc_lock); |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2580 | } |
| 2581 | |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 2582 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2583 | { |
| 2584 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2585 | struct nfit_table_prev prev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2586 | const void *end; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2587 | int rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2588 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2589 | if (!acpi_desc->nvdimm_bus) { |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2590 | acpi_nfit_init_dsms(acpi_desc); |
| 2591 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2592 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
| 2593 | &acpi_desc->nd_desc); |
| 2594 | if (!acpi_desc->nvdimm_bus) |
| 2595 | return -ENOMEM; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2596 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2597 | rc = devm_add_action_or_reset(dev, acpi_nfit_destruct, |
| 2598 | acpi_desc); |
| 2599 | if (rc) |
| 2600 | return rc; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2601 | |
| 2602 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); |
| 2603 | if (rc) |
| 2604 | return rc; |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 2605 | |
| 2606 | /* register this acpi_desc for mce notifications */ |
| 2607 | mutex_lock(&acpi_desc_lock); |
| 2608 | list_add_tail(&acpi_desc->list, &acpi_descs); |
| 2609 | mutex_unlock(&acpi_desc_lock); |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2610 | } |
| 2611 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2612 | mutex_lock(&acpi_desc->init_mutex); |
| 2613 | |
| 2614 | INIT_LIST_HEAD(&prev.spas); |
| 2615 | INIT_LIST_HEAD(&prev.memdevs); |
| 2616 | INIT_LIST_HEAD(&prev.dcrs); |
| 2617 | INIT_LIST_HEAD(&prev.bdws); |
| 2618 | INIT_LIST_HEAD(&prev.idts); |
| 2619 | INIT_LIST_HEAD(&prev.flushes); |
| 2620 | |
| 2621 | list_cut_position(&prev.spas, &acpi_desc->spas, |
| 2622 | acpi_desc->spas.prev); |
| 2623 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, |
| 2624 | acpi_desc->memdevs.prev); |
| 2625 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, |
| 2626 | acpi_desc->dcrs.prev); |
| 2627 | list_cut_position(&prev.bdws, &acpi_desc->bdws, |
| 2628 | acpi_desc->bdws.prev); |
| 2629 | list_cut_position(&prev.idts, &acpi_desc->idts, |
| 2630 | acpi_desc->idts.prev); |
| 2631 | list_cut_position(&prev.flushes, &acpi_desc->flushes, |
| 2632 | acpi_desc->flushes.prev); |
| 2633 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2634 | end = data + sz; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2635 | while (!IS_ERR_OR_NULL(data)) |
| 2636 | data = add_table(acpi_desc, &prev, data, end); |
| 2637 | |
| 2638 | if (IS_ERR(data)) { |
| 2639 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, |
| 2640 | PTR_ERR(data)); |
| 2641 | rc = PTR_ERR(data); |
| 2642 | goto out_unlock; |
| 2643 | } |
| 2644 | |
| 2645 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
| 2646 | if (rc) |
| 2647 | goto out_unlock; |
| 2648 | |
Dan Williams | 81ed4e3 | 2016-06-10 18:20:53 -0700 | [diff] [blame] | 2649 | rc = nfit_mem_init(acpi_desc); |
| 2650 | if (rc) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2651 | goto out_unlock; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2652 | |
| 2653 | rc = acpi_nfit_register_dimms(acpi_desc); |
| 2654 | if (rc) |
| 2655 | goto out_unlock; |
| 2656 | |
| 2657 | rc = acpi_nfit_register_regions(acpi_desc); |
| 2658 | |
| 2659 | out_unlock: |
| 2660 | mutex_unlock(&acpi_desc->init_mutex); |
| 2661 | return rc; |
| 2662 | } |
| 2663 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
| 2664 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2665 | struct acpi_nfit_flush_work { |
| 2666 | struct work_struct work; |
| 2667 | struct completion cmp; |
| 2668 | }; |
| 2669 | |
| 2670 | static void flush_probe(struct work_struct *work) |
| 2671 | { |
| 2672 | struct acpi_nfit_flush_work *flush; |
| 2673 | |
| 2674 | flush = container_of(work, typeof(*flush), work); |
| 2675 | complete(&flush->cmp); |
| 2676 | } |
| 2677 | |
| 2678 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) |
| 2679 | { |
| 2680 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 2681 | struct device *dev = acpi_desc->dev; |
| 2682 | struct acpi_nfit_flush_work flush; |
| 2683 | |
| 2684 | /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ |
| 2685 | device_lock(dev); |
| 2686 | device_unlock(dev); |
| 2687 | |
| 2688 | /* |
| 2689 | * Scrub work could take 10s of seconds, userspace may give up so we |
| 2690 | * need to be interruptible while waiting. |
| 2691 | */ |
| 2692 | INIT_WORK_ONSTACK(&flush.work, flush_probe); |
| 2693 | COMPLETION_INITIALIZER_ONSTACK(flush.cmp); |
| 2694 | queue_work(nfit_wq, &flush.work); |
| 2695 | return wait_for_completion_interruptible(&flush.cmp); |
| 2696 | } |
| 2697 | |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 2698 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
| 2699 | struct nvdimm *nvdimm, unsigned int cmd) |
| 2700 | { |
| 2701 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 2702 | |
| 2703 | if (nvdimm) |
| 2704 | return 0; |
| 2705 | if (cmd != ND_CMD_ARS_START) |
| 2706 | return 0; |
| 2707 | |
| 2708 | /* |
| 2709 | * The kernel and userspace may race to initiate a scrub, but |
| 2710 | * the scrub thread is prepared to lose that initial race. It |
| 2711 | * just needs guarantees that any ars it initiates are not |
| 2712 | * interrupted by any intervening start reqeusts from userspace. |
| 2713 | */ |
| 2714 | if (work_busy(&acpi_desc->work)) |
| 2715 | return -EBUSY; |
| 2716 | |
| 2717 | return 0; |
| 2718 | } |
| 2719 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 2720 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc) |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2721 | { |
| 2722 | struct device *dev = acpi_desc->dev; |
| 2723 | struct nfit_spa *nfit_spa; |
| 2724 | |
| 2725 | if (work_busy(&acpi_desc->work)) |
| 2726 | return -EBUSY; |
| 2727 | |
| 2728 | if (acpi_desc->cancel) |
| 2729 | return 0; |
| 2730 | |
| 2731 | mutex_lock(&acpi_desc->init_mutex); |
| 2732 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2733 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2734 | |
| 2735 | if (nfit_spa_type(spa) != NFIT_SPA_PM) |
| 2736 | continue; |
| 2737 | |
| 2738 | nfit_spa->ars_required = 1; |
| 2739 | } |
| 2740 | queue_work(nfit_wq, &acpi_desc->work); |
| 2741 | dev_dbg(dev, "%s: ars_scan triggered\n", __func__); |
| 2742 | mutex_unlock(&acpi_desc->init_mutex); |
| 2743 | |
| 2744 | return 0; |
| 2745 | } |
| 2746 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2747 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2748 | { |
| 2749 | struct nvdimm_bus_descriptor *nd_desc; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2750 | |
| 2751 | dev_set_drvdata(dev, acpi_desc); |
| 2752 | acpi_desc->dev = dev; |
| 2753 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
| 2754 | nd_desc = &acpi_desc->nd_desc; |
| 2755 | nd_desc->provider_name = "ACPI.NFIT"; |
Dan Williams | bc9775d | 2016-07-21 20:03:19 -0700 | [diff] [blame] | 2756 | nd_desc->module = THIS_MODULE; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2757 | nd_desc->ndctl = acpi_nfit_ctl; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2758 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 2759 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2760 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
| 2761 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2762 | INIT_LIST_HEAD(&acpi_desc->spas); |
| 2763 | INIT_LIST_HEAD(&acpi_desc->dcrs); |
| 2764 | INIT_LIST_HEAD(&acpi_desc->bdws); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2765 | INIT_LIST_HEAD(&acpi_desc->idts); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2766 | INIT_LIST_HEAD(&acpi_desc->flushes); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2767 | INIT_LIST_HEAD(&acpi_desc->memdevs); |
| 2768 | INIT_LIST_HEAD(&acpi_desc->dimms); |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 2769 | INIT_LIST_HEAD(&acpi_desc->list); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2770 | mutex_init(&acpi_desc->init_mutex); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2771 | INIT_WORK(&acpi_desc->work, acpi_nfit_scrub); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2772 | } |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2773 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2774 | |
| 2775 | static int acpi_nfit_add(struct acpi_device *adev) |
| 2776 | { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2777 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2778 | struct acpi_nfit_desc *acpi_desc; |
| 2779 | struct device *dev = &adev->dev; |
| 2780 | struct acpi_table_header *tbl; |
| 2781 | acpi_status status = AE_OK; |
| 2782 | acpi_size sz; |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 2783 | int rc = 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2784 | |
Lee, Chun-Yi | 8259542 | 2016-01-21 20:32:10 +0800 | [diff] [blame] | 2785 | status = acpi_get_table_with_size(ACPI_SIG_NFIT, 0, &tbl, &sz); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2786 | if (ACPI_FAILURE(status)) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2787 | /* This is ok, we could have an nvdimm hotplugged later */ |
| 2788 | dev_dbg(dev, "failed to find NFIT at startup\n"); |
| 2789 | return 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2790 | } |
| 2791 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2792 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 2793 | if (!acpi_desc) |
| 2794 | return -ENOMEM; |
| 2795 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2796 | |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 2797 | /* Save the acpi header for exporting the revision via sysfs */ |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2798 | acpi_desc->acpi_header = *tbl; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2799 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2800 | /* Evaluate _FIT and override with that if present */ |
| 2801 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 2802 | if (ACPI_SUCCESS(status) && buf.length > 0) { |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 2803 | union acpi_object *obj = buf.pointer; |
| 2804 | |
| 2805 | if (obj->type == ACPI_TYPE_BUFFER) |
| 2806 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
| 2807 | obj->buffer.length); |
| 2808 | else |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2809 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", |
| 2810 | __func__, (int) obj->type); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 2811 | kfree(buf.pointer); |
| 2812 | } else |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 2813 | /* skip over the lead-in header table */ |
| 2814 | rc = acpi_nfit_init(acpi_desc, (void *) tbl |
| 2815 | + sizeof(struct acpi_table_nfit), |
| 2816 | sz - sizeof(struct acpi_table_nfit)); |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 2817 | return rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2818 | } |
| 2819 | |
| 2820 | static int acpi_nfit_remove(struct acpi_device *adev) |
| 2821 | { |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 2822 | /* see acpi_nfit_destruct */ |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2823 | return 0; |
| 2824 | } |
| 2825 | |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 2826 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2827 | { |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 2828 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2829 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 2830 | union acpi_object *obj; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2831 | acpi_status status; |
| 2832 | int ret; |
| 2833 | |
| 2834 | dev_dbg(dev, "%s: event: %d\n", __func__, event); |
| 2835 | |
Vishal Verma | c09f121 | 2016-08-19 14:40:58 -0600 | [diff] [blame] | 2836 | if (event != NFIT_NOTIFY_UPDATE) |
| 2837 | return; |
| 2838 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2839 | if (!dev->driver) { |
| 2840 | /* dev->driver may be null if we're being removed */ |
| 2841 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 2842 | return; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2843 | } |
| 2844 | |
| 2845 | if (!acpi_desc) { |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2846 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 2847 | if (!acpi_desc) |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 2848 | return; |
| 2849 | acpi_nfit_desc_init(acpi_desc, dev); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2850 | } else { |
| 2851 | /* |
| 2852 | * Finish previous registration before considering new |
| 2853 | * regions. |
| 2854 | */ |
| 2855 | flush_workqueue(nfit_wq); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2856 | } |
| 2857 | |
| 2858 | /* Evaluate _FIT */ |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 2859 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2860 | if (ACPI_FAILURE(status)) { |
| 2861 | dev_err(dev, "failed to evaluate _FIT\n"); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 2862 | return; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2863 | } |
| 2864 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2865 | obj = buf.pointer; |
| 2866 | if (obj->type == ACPI_TYPE_BUFFER) { |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 2867 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
| 2868 | obj->buffer.length); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 2869 | if (ret) |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2870 | dev_err(dev, "failed to merge updated NFIT\n"); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 2871 | } else |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2872 | dev_err(dev, "Invalid _FIT\n"); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2873 | kfree(buf.pointer); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 2874 | } |
| 2875 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2876 | |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 2877 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
| 2878 | { |
| 2879 | device_lock(&adev->dev); |
| 2880 | __acpi_nfit_notify(&adev->dev, adev->handle, event); |
| 2881 | device_unlock(&adev->dev); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2882 | } |
| 2883 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2884 | static const struct acpi_device_id acpi_nfit_ids[] = { |
| 2885 | { "ACPI0012", 0 }, |
| 2886 | { "", 0 }, |
| 2887 | }; |
| 2888 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); |
| 2889 | |
| 2890 | static struct acpi_driver acpi_nfit_driver = { |
| 2891 | .name = KBUILD_MODNAME, |
| 2892 | .ids = acpi_nfit_ids, |
| 2893 | .ops = { |
| 2894 | .add = acpi_nfit_add, |
| 2895 | .remove = acpi_nfit_remove, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2896 | .notify = acpi_nfit_notify, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2897 | }, |
| 2898 | }; |
| 2899 | |
| 2900 | static __init int nfit_init(void) |
| 2901 | { |
| 2902 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
| 2903 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); |
| 2904 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); |
| 2905 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); |
| 2906 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); |
| 2907 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); |
| 2908 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); |
| 2909 | |
| 2910 | acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]); |
| 2911 | acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]); |
| 2912 | acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]); |
| 2913 | acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]); |
| 2914 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]); |
| 2915 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]); |
| 2916 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]); |
| 2917 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]); |
| 2918 | acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]); |
| 2919 | acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 2920 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE1, nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); |
| 2921 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE2, nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 2922 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_MSFT, nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2923 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2924 | nfit_wq = create_singlethread_workqueue("nfit"); |
| 2925 | if (!nfit_wq) |
| 2926 | return -ENOMEM; |
| 2927 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 2928 | nfit_mce_register(); |
| 2929 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2930 | return acpi_bus_register_driver(&acpi_nfit_driver); |
| 2931 | } |
| 2932 | |
| 2933 | static __exit void nfit_exit(void) |
| 2934 | { |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 2935 | nfit_mce_unregister(); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2936 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2937 | destroy_workqueue(nfit_wq); |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 2938 | WARN_ON(!list_empty(&acpi_descs)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2939 | } |
| 2940 | |
| 2941 | module_init(nfit_init); |
| 2942 | module_exit(nfit_exit); |
| 2943 | MODULE_LICENSE("GPL v2"); |
| 2944 | MODULE_AUTHOR("Intel Corporation"); |