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Maxime Ripard3d0b16a2015-07-27 12:17:09 +01001/*
2 * Allwinner sunXi SoCs Security ID support.
3 *
4 * Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
5 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010016 */
17
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010018#include <linux/device.h>
19#include <linux/io.h>
Icenowy Zheng1a963642017-03-31 13:44:48 +010020#include <linux/iopoll.h>
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010021#include <linux/module.h>
22#include <linux/nvmem-provider.h>
23#include <linux/of.h>
Icenowy Zheng4a72cda2017-03-31 13:44:47 +010024#include <linux/of_device.h>
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010025#include <linux/platform_device.h>
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010026#include <linux/slab.h>
27#include <linux/random.h>
28
Icenowy Zheng1a963642017-03-31 13:44:48 +010029/* Registers and special values for doing register-based SID readout on H3 */
30#define SUN8I_SID_PRCTL 0x40
31#define SUN8I_SID_RDKEY 0x60
32
33#define SUN8I_SID_OFFSET_MASK 0x1FF
34#define SUN8I_SID_OFFSET_SHIFT 16
35#define SUN8I_SID_OP_LOCK (0xAC << 8)
36#define SUN8I_SID_READ BIT(1)
37
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010038static struct nvmem_config econfig = {
39 .name = "sunxi-sid",
40 .read_only = true,
Srinivas Kandagatla9c7b16e2016-04-24 20:28:10 +010041 .stride = 4,
42 .word_size = 1,
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010043};
44
Icenowy Zheng4a72cda2017-03-31 13:44:47 +010045struct sunxi_sid_cfg {
Icenowy Zheng1a963642017-03-31 13:44:48 +010046 u32 value_offset;
Icenowy Zheng4a72cda2017-03-31 13:44:47 +010047 u32 size;
Icenowy Zheng1a963642017-03-31 13:44:48 +010048 bool need_register_readout;
Icenowy Zheng4a72cda2017-03-31 13:44:47 +010049};
50
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010051struct sunxi_sid {
52 void __iomem *base;
Icenowy Zheng1a963642017-03-31 13:44:48 +010053 u32 value_offset;
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010054};
55
56/* We read the entire key, due to a 32 bit read alignment requirement. Since we
57 * want to return the requested byte, this results in somewhat slower code and
58 * uses 4 times more reads as needed but keeps code simpler. Since the SID is
59 * only very rarely probed, this is not really an issue.
60 */
61static u8 sunxi_sid_read_byte(const struct sunxi_sid *sid,
62 const unsigned int offset)
63{
64 u32 sid_key;
65
66 sid_key = ioread32be(sid->base + round_down(offset, 4));
67 sid_key >>= (offset % 4) * 8;
68
69 return sid_key; /* Only return the last byte */
70}
71
Srinivas Kandagatla9c7b16e2016-04-24 20:28:10 +010072static int sunxi_sid_read(void *context, unsigned int offset,
73 void *val, size_t bytes)
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010074{
75 struct sunxi_sid *sid = context;
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010076 u8 *buf = val;
77
Icenowy Zheng1a963642017-03-31 13:44:48 +010078 /* Offset the read operation to the real position of SID */
79 offset += sid->value_offset;
80
Srinivas Kandagatla9c7b16e2016-04-24 20:28:10 +010081 while (bytes--)
82 *buf++ = sunxi_sid_read_byte(sid, offset++);
Maxime Ripard3d0b16a2015-07-27 12:17:09 +010083
84 return 0;
85}
86
Icenowy Zheng1a963642017-03-31 13:44:48 +010087static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
Icenowy Zheng0ab09d62018-03-09 14:47:17 +000088 const unsigned int offset,
89 u32 *out)
Icenowy Zheng1a963642017-03-31 13:44:48 +010090{
91 u32 reg_val;
92 int ret;
93
94 /* Set word, lock access, and set read command */
Icenowy Zheng0ab09d62018-03-09 14:47:17 +000095 reg_val = (offset & SUN8I_SID_OFFSET_MASK)
Icenowy Zheng1a963642017-03-31 13:44:48 +010096 << SUN8I_SID_OFFSET_SHIFT;
97 reg_val |= SUN8I_SID_OP_LOCK | SUN8I_SID_READ;
98 writel(reg_val, sid->base + SUN8I_SID_PRCTL);
99
100 ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
101 !(reg_val & SUN8I_SID_READ), 100, 250000);
102 if (ret)
103 return ret;
104
Icenowy Zheng0ab09d62018-03-09 14:47:17 +0000105 if (out)
106 *out = readl(sid->base + SUN8I_SID_RDKEY);
107
Icenowy Zheng1a963642017-03-31 13:44:48 +0100108 writel(0, sid->base + SUN8I_SID_PRCTL);
Icenowy Zheng0ab09d62018-03-09 14:47:17 +0000109
110 return 0;
111}
112
113/*
114 * On Allwinner H3, the value on the 0x200 offset of the SID controller seems
115 * to be not reliable at all.
116 * Read by the registers instead.
117 */
118static int sun8i_sid_read_byte_by_reg(const struct sunxi_sid *sid,
119 const unsigned int offset,
120 u8 *out)
121{
122 u32 word;
123 int ret;
124
125 ret = sun8i_sid_register_readout(sid, offset & ~0x03, &word);
126
127 if (ret)
128 return ret;
129
130 *out = (word >> ((offset & 0x3) * 8)) & 0xff;
131
132 return 0;
133}
134
135static int sun8i_sid_read_by_reg(void *context, unsigned int offset,
136 void *val, size_t bytes)
137{
138 struct sunxi_sid *sid = context;
139 u8 *buf = val;
140 int ret;
141
142 while (bytes--) {
143 ret = sun8i_sid_read_byte_by_reg(sid, offset++, buf++);
144 if (ret)
145 return ret;
146 }
147
Icenowy Zheng1a963642017-03-31 13:44:48 +0100148 return 0;
149}
150
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100151static int sunxi_sid_probe(struct platform_device *pdev)
152{
153 struct device *dev = &pdev->dev;
154 struct resource *res;
155 struct nvmem_device *nvmem;
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100156 struct sunxi_sid *sid;
Srinivas Kandagatla4876bfe2018-09-21 06:40:25 -0700157 int i, size;
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100158 char *randomness;
Icenowy Zheng4a72cda2017-03-31 13:44:47 +0100159 const struct sunxi_sid_cfg *cfg;
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100160
161 sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
162 if (!sid)
163 return -ENOMEM;
164
Icenowy Zheng4a72cda2017-03-31 13:44:47 +0100165 cfg = of_device_get_match_data(dev);
166 if (!cfg)
167 return -EINVAL;
Icenowy Zheng1a963642017-03-31 13:44:48 +0100168 sid->value_offset = cfg->value_offset;
Icenowy Zheng4a72cda2017-03-31 13:44:47 +0100169
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100170 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
171 sid->base = devm_ioremap_resource(dev, res);
172 if (IS_ERR(sid->base))
173 return PTR_ERR(sid->base);
174
Icenowy Zheng4a72cda2017-03-31 13:44:47 +0100175 size = cfg->size;
176
177 econfig.size = size;
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100178 econfig.dev = dev;
Icenowy Zheng0ab09d62018-03-09 14:47:17 +0000179 if (cfg->need_register_readout)
180 econfig.reg_read = sun8i_sid_read_by_reg;
181 else
182 econfig.reg_read = sunxi_sid_read;
Srinivas Kandagatla9c7b16e2016-04-24 20:28:10 +0100183 econfig.priv = sid;
Bartosz Golaszewski6eed8dd2018-09-21 06:40:10 -0700184 nvmem = devm_nvmem_register(dev, &econfig);
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100185 if (IS_ERR(nvmem))
186 return PTR_ERR(nvmem);
187
Kees Cook6396bb22018-06-12 14:03:40 -0700188 randomness = kzalloc(size, GFP_KERNEL);
Bartosz Golaszewski6eed8dd2018-09-21 06:40:10 -0700189 if (!randomness)
190 return -ENOMEM;
Maxime Ripardfb727072015-09-30 13:36:31 +0100191
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100192 for (i = 0; i < size; i++)
Icenowy Zheng0ab09d62018-03-09 14:47:17 +0000193 econfig.reg_read(sid, i, &randomness[i], 1);
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100194
195 add_device_randomness(randomness, size);
196 kfree(randomness);
197
198 platform_set_drvdata(pdev, nvmem);
199
200 return 0;
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100201}
202
Icenowy Zheng4a72cda2017-03-31 13:44:47 +0100203static const struct sunxi_sid_cfg sun4i_a10_cfg = {
204 .size = 0x10,
205};
206
207static const struct sunxi_sid_cfg sun7i_a20_cfg = {
208 .size = 0x200,
209};
210
Icenowy Zheng1a963642017-03-31 13:44:48 +0100211static const struct sunxi_sid_cfg sun8i_h3_cfg = {
212 .value_offset = 0x200,
213 .size = 0x100,
214 .need_register_readout = true,
215};
216
Icenowy Zhengb7fe57b2017-10-24 10:54:34 +0100217static const struct sunxi_sid_cfg sun50i_a64_cfg = {
218 .value_offset = 0x200,
219 .size = 0x100,
220};
221
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100222static const struct of_device_id sunxi_sid_of_match[] = {
Icenowy Zheng4a72cda2017-03-31 13:44:47 +0100223 { .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
224 { .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
Icenowy Zheng1a963642017-03-31 13:44:48 +0100225 { .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
Icenowy Zhengb7fe57b2017-10-24 10:54:34 +0100226 { .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100227 {/* sentinel */},
228};
229MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
230
231static struct platform_driver sunxi_sid_driver = {
232 .probe = sunxi_sid_probe,
Maxime Ripard3d0b16a2015-07-27 12:17:09 +0100233 .driver = {
234 .name = "eeprom-sunxi-sid",
235 .of_match_table = sunxi_sid_of_match,
236 },
237};
238module_platform_driver(sunxi_sid_driver);
239
240MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
241MODULE_DESCRIPTION("Allwinner sunxi security id driver");
242MODULE_LICENSE("GPL");