Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | */ |
| 9 | |
| 10 | #ifndef __DW_HDMI__ |
| 11 | #define __DW_HDMI__ |
| 12 | |
| 13 | #include <drm/drmP.h> |
| 14 | |
Russell King | b5814ff | 2015-03-27 12:50:58 +0000 | [diff] [blame] | 15 | struct dw_hdmi; |
| 16 | |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 17 | enum { |
| 18 | DW_HDMI_RES_8, |
| 19 | DW_HDMI_RES_10, |
| 20 | DW_HDMI_RES_12, |
| 21 | DW_HDMI_RES_MAX, |
| 22 | }; |
| 23 | |
| 24 | enum dw_hdmi_devtype { |
| 25 | IMX6Q_HDMI, |
| 26 | IMX6DL_HDMI, |
Andy Yan | 12b9f20 | 2015-01-07 15:48:27 +0800 | [diff] [blame] | 27 | RK3288_HDMI, |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 28 | }; |
| 29 | |
Laurent Pinchart | faba6c3 | 2017-01-17 10:29:06 +0200 | [diff] [blame] | 30 | enum dw_hdmi_phy_type { |
| 31 | DW_HDMI_PHY_DWC_HDMI_TX_PHY = 0x00, |
| 32 | DW_HDMI_PHY_DWC_MHL_PHY_HEAC = 0xb2, |
| 33 | DW_HDMI_PHY_DWC_MHL_PHY = 0xc2, |
| 34 | DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC = 0xe2, |
| 35 | DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY = 0xf2, |
| 36 | DW_HDMI_PHY_DWC_HDMI20_TX_PHY = 0xf3, |
| 37 | DW_HDMI_PHY_VENDOR_PHY = 0xfe, |
| 38 | }; |
| 39 | |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 40 | struct dw_hdmi_mpll_config { |
| 41 | unsigned long mpixelclock; |
| 42 | struct { |
| 43 | u16 cpce; |
| 44 | u16 gmp; |
| 45 | } res[DW_HDMI_RES_MAX]; |
| 46 | }; |
| 47 | |
| 48 | struct dw_hdmi_curr_ctrl { |
| 49 | unsigned long mpixelclock; |
| 50 | u16 curr[DW_HDMI_RES_MAX]; |
| 51 | }; |
| 52 | |
Yakir Yang | 034705a | 2015-03-31 23:56:10 -0400 | [diff] [blame] | 53 | struct dw_hdmi_phy_config { |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 54 | unsigned long mpixelclock; |
| 55 | u16 sym_ctr; /*clock symbol and transmitter control*/ |
| 56 | u16 term; /*transmission termination value*/ |
Yakir Yang | 034705a | 2015-03-31 23:56:10 -0400 | [diff] [blame] | 57 | u16 vlev_ctr; /* voltage level control */ |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 58 | }; |
| 59 | |
Laurent Pinchart | f1585f6 | 2017-03-06 01:36:15 +0200 | [diff] [blame^] | 60 | struct dw_hdmi_phy_ops { |
| 61 | int (*init)(struct dw_hdmi *hdmi, void *data, |
| 62 | struct drm_display_mode *mode); |
| 63 | void (*disable)(struct dw_hdmi *hdmi, void *data); |
| 64 | enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data); |
| 65 | }; |
| 66 | |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 67 | struct dw_hdmi_plat_data { |
| 68 | enum dw_hdmi_devtype dev_type; |
Laurent Pinchart | f1585f6 | 2017-03-06 01:36:15 +0200 | [diff] [blame^] | 69 | enum drm_mode_status (*mode_valid)(struct drm_connector *connector, |
| 70 | struct drm_display_mode *mode); |
| 71 | |
| 72 | /* Vendor PHY support */ |
| 73 | const struct dw_hdmi_phy_ops *phy_ops; |
| 74 | const char *phy_name; |
| 75 | void *phy_data; |
| 76 | |
| 77 | /* Synopsys PHY support */ |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 78 | const struct dw_hdmi_mpll_config *mpll_cfg; |
| 79 | const struct dw_hdmi_curr_ctrl *cur_ctr; |
Yakir Yang | 034705a | 2015-03-31 23:56:10 -0400 | [diff] [blame] | 80 | const struct dw_hdmi_phy_config *phy_config; |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 81 | }; |
| 82 | |
Laurent Pinchart | 69497eb | 2017-01-17 10:29:00 +0200 | [diff] [blame] | 83 | int dw_hdmi_probe(struct platform_device *pdev, |
| 84 | const struct dw_hdmi_plat_data *plat_data); |
| 85 | void dw_hdmi_remove(struct platform_device *pdev); |
Laurent Pinchart | ecaa98f | 2017-01-17 10:28:52 +0200 | [diff] [blame] | 86 | void dw_hdmi_unbind(struct device *dev); |
Laurent Pinchart | c608119 | 2017-01-17 10:28:57 +0200 | [diff] [blame] | 87 | int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder, |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 88 | const struct dw_hdmi_plat_data *plat_data); |
Russell King | b5814ff | 2015-03-27 12:50:58 +0000 | [diff] [blame] | 89 | |
| 90 | void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate); |
Russell King | b90120a | 2015-03-27 12:59:58 +0000 | [diff] [blame] | 91 | void dw_hdmi_audio_enable(struct dw_hdmi *hdmi); |
| 92 | void dw_hdmi_audio_disable(struct dw_hdmi *hdmi); |
Russell King | b5814ff | 2015-03-27 12:50:58 +0000 | [diff] [blame] | 93 | |
Andy Yan | b21f4b6 | 2014-12-05 14:26:31 +0800 | [diff] [blame] | 94 | #endif /* __IMX_HDMI_H__ */ |