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Yuval Mintzfe56b9e2015-10-26 11:02:25 +02001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintzfe56b9e2015-10-26 11:02:25 +02003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020031 */
32
33#ifndef _QED_CXT_H
34#define _QED_CXT_H
35
36#include <linux/types.h>
37#include <linux/slab.h>
38#include <linux/qed/qed_if.h>
39#include "qed_hsi.h"
40#include "qed.h"
41
42struct qed_cxt_info {
43 void *p_cxt;
44 u32 iid;
45 enum protocol_type type;
46};
47
Yuval Mintzdbb799c2016-06-03 14:35:35 +030048#define MAX_TID_BLOCKS 512
49struct qed_tid_mem {
50 u32 tid_size;
51 u32 num_tids_per_block;
52 u32 waste;
53 u8 *blocks[MAX_TID_BLOCKS]; /* 4K */
54};
55
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020056/**
57 * @brief qed_cxt_acquire - Acquire a new cid of a specific protocol type
58 *
59 * @param p_hwfn
60 * @param type
61 * @param p_cid
62 *
63 * @return int
64 */
65int qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn,
66 enum protocol_type type,
67 u32 *p_cid);
68
69/**
70 * @brief qedo_cid_get_cxt_info - Returns the context info for a specific cid
71 *
72 *
73 * @param p_hwfn
74 * @param p_info in/out
75 *
76 * @return int
77 */
78int qed_cxt_get_cid_info(struct qed_hwfn *p_hwfn,
79 struct qed_cxt_info *p_info);
80
Yuval Mintzdbb799c2016-06-03 14:35:35 +030081/**
82 * @brief qed_cxt_get_tid_mem_info
83 *
84 * @param p_hwfn
85 * @param p_info
86 *
87 * @return int
88 */
89int qed_cxt_get_tid_mem_info(struct qed_hwfn *p_hwfn,
90 struct qed_tid_mem *p_info);
91
92#define QED_CXT_ISCSI_TID_SEG PROTOCOLID_ISCSI
93#define QED_CXT_ROCE_TID_SEG PROTOCOLID_ROCE
Arun Easi1e128c82017-02-15 06:28:22 -080094#define QED_CXT_FCOE_TID_SEG PROTOCOLID_FCOE
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020095enum qed_cxt_elem_type {
96 QED_ELEM_CXT,
Yuval Mintzdbb799c2016-06-03 14:35:35 +030097 QED_ELEM_SRQ,
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020098 QED_ELEM_TASK
99};
100
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300101u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn,
102 enum protocol_type type, u32 *vf_cid);
103
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200104/**
105 * @brief qed_cxt_set_pf_params - Set the PF params for cxt init
106 *
107 * @param p_hwfn
Ram Amranif9dc4d12017-04-03 12:21:13 +0300108 * @param rdma_tasks - requested maximum
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200109 * @return int
110 */
Ram Amranif9dc4d12017-04-03 12:21:13 +0300111int qed_cxt_set_pf_params(struct qed_hwfn *p_hwfn, u32 rdma_tasks);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200112
113/**
114 * @brief qed_cxt_cfg_ilt_compute - compute ILT init parameters
115 *
116 * @param p_hwfn
Ram Amranif9dc4d12017-04-03 12:21:13 +0300117 * @param last_line
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200118 *
119 * @return int
120 */
Ram Amranif9dc4d12017-04-03 12:21:13 +0300121int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn, u32 *last_line);
122
123/**
124 * @brief qed_cxt_cfg_ilt_compute_excess - how many lines can be decreased
125 *
126 * @param p_hwfn
127 * @param used_lines
128 */
129u32 qed_cxt_cfg_ilt_compute_excess(struct qed_hwfn *p_hwfn, u32 used_lines);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200130
131/**
132 * @brief qed_cxt_mngr_alloc - Allocate and init the context manager struct
133 *
134 * @param p_hwfn
135 *
136 * @return int
137 */
138int qed_cxt_mngr_alloc(struct qed_hwfn *p_hwfn);
139
140/**
141 * @brief qed_cxt_mngr_free
142 *
143 * @param p_hwfn
144 */
145void qed_cxt_mngr_free(struct qed_hwfn *p_hwfn);
146
147/**
148 * @brief qed_cxt_tables_alloc - Allocate ILT shadow, Searcher T2, acquired map
149 *
150 * @param p_hwfn
151 *
152 * @return int
153 */
154int qed_cxt_tables_alloc(struct qed_hwfn *p_hwfn);
155
156/**
157 * @brief qed_cxt_mngr_setup - Reset the acquired CIDs
158 *
159 * @param p_hwfn
160 */
161void qed_cxt_mngr_setup(struct qed_hwfn *p_hwfn);
162
163/**
164 * @brief qed_cxt_hw_init_common - Initailze ILT and DQ, common phase, per path.
165 *
166 *
167 *
168 * @param p_hwfn
169 */
170void qed_cxt_hw_init_common(struct qed_hwfn *p_hwfn);
171
172/**
173 * @brief qed_cxt_hw_init_pf - Initailze ILT and DQ, PF phase, per path.
174 *
175 *
176 *
177 * @param p_hwfn
178 */
179void qed_cxt_hw_init_pf(struct qed_hwfn *p_hwfn);
180
181/**
182 * @brief qed_qm_init_pf - Initailze the QM PF phase, per path
183 *
184 * @param p_hwfn
185 */
186
187void qed_qm_init_pf(struct qed_hwfn *p_hwfn);
188
189/**
Sudarsana Reddy Kalluru39651ab2016-05-17 06:44:26 -0400190 * @brief Reconfigures QM pf on the fly
191 *
192 * @param p_hwfn
193 * @param p_ptt
194 *
195 * @return int
196 */
197int qed_qm_reconf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
198
199/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200200 * @brief qed_cxt_release - Release a cid
201 *
202 * @param p_hwfn
203 * @param cid
204 */
205void qed_cxt_release_cid(struct qed_hwfn *p_hwfn,
206 u32 cid);
Ram Amrani51ff1722016-10-01 21:59:57 +0300207int qed_cxt_dynamic_ilt_alloc(struct qed_hwfn *p_hwfn,
208 enum qed_cxt_elem_type elem_type, u32 iid);
209u32 qed_cxt_get_proto_tid_count(struct qed_hwfn *p_hwfn,
210 enum protocol_type type);
211u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn,
212 enum protocol_type type);
Ram Amranif1093942016-10-01 21:59:59 +0300213int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200214
Yuval Mintzdbb799c2016-06-03 14:35:35 +0300215#define QED_CTX_WORKING_MEM 0
216#define QED_CTX_FL_MEM 1
Arun Easi1e128c82017-02-15 06:28:22 -0800217int qed_cxt_get_task_ctx(struct qed_hwfn *p_hwfn,
218 u32 tid, u8 ctx_type, void **task_ctx);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200219#endif