blob: ec56794ad0399277693b9185c75b6abcf9241e4a [file] [log] [blame]
Rob Clarka7d3c952014-05-30 14:47:38 -04001/*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/* For debugging crashes, userspace can:
19 *
20 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
21 *
22 * To log the cmdstream in a format that is understood by freedreno/cffdump
23 * utility. By comparing the last successfully completed fence #, to the
24 * cmdstream for the next fence, you can narrow down which process and submit
25 * caused the gpu crash/lockup.
26 *
27 * This bypasses drm_debugfs_create_files() mainly because we need to use
28 * our own fops for a bit more control. In particular, we don't want to
29 * do anything if userspace doesn't have the debugfs file open.
Rob Clark79c21182016-06-16 11:54:41 -040030 *
31 * The module-param "rd_full", which defaults to false, enables snapshotting
32 * all (non-written) buffers in the submit, rather than just cmdstream bo's.
33 * This is useful to capture the contents of (for example) vbo's or textures,
34 * or shader programs (if not emitted inline in cmdstream).
Rob Clarka7d3c952014-05-30 14:47:38 -040035 */
36
37#ifdef CONFIG_DEBUG_FS
38
39#include <linux/kfifo.h>
40#include <linux/debugfs.h>
41#include <linux/circ_buf.h>
42#include <linux/wait.h>
43
44#include "msm_drv.h"
45#include "msm_gpu.h"
46#include "msm_gem.h"
47
Rob Clark79c21182016-06-16 11:54:41 -040048static bool rd_full = false;
49MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents");
50module_param_named(rd_full, rd_full, bool, 0600);
51
Rob Clarka7d3c952014-05-30 14:47:38 -040052enum rd_sect_type {
53 RD_NONE,
54 RD_TEST, /* ascii text */
55 RD_CMD, /* ascii text */
56 RD_GPUADDR, /* u32 gpuaddr, u32 size */
57 RD_CONTEXT, /* raw dump */
58 RD_CMDSTREAM, /* raw dump */
59 RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */
60 RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */
61 RD_FLUSH, /* empty, clear previous params */
62 RD_PROGRAM, /* shader program, raw dump */
63 RD_VERT_SHADER,
64 RD_FRAG_SHADER,
65 RD_BUFFER_CONTENTS,
66 RD_GPU_ID,
67};
68
69#define BUF_SZ 512 /* should be power of 2 */
70
71/* space used: */
72#define circ_count(circ) \
73 (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
74#define circ_count_to_end(circ) \
75 (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
76/* space available: */
77#define circ_space(circ) \
78 (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
79#define circ_space_to_end(circ) \
80 (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))
81
82struct msm_rd_state {
83 struct drm_device *dev;
84
85 bool open;
86
Rob Clarka7d3c952014-05-30 14:47:38 -040087 /* current submit to read out: */
88 struct msm_gem_submit *submit;
89
90 /* fifo access is synchronized on the producer side by
91 * struct_mutex held by submit code (otherwise we could
92 * end up w/ cmds logged in different order than they
93 * were executed). And read_lock synchronizes the reads
94 */
95 struct mutex read_lock;
96
97 wait_queue_head_t fifo_event;
98 struct circ_buf fifo;
99
100 char buf[BUF_SZ];
101};
102
103static void rd_write(struct msm_rd_state *rd, const void *buf, int sz)
104{
105 struct circ_buf *fifo = &rd->fifo;
106 const char *ptr = buf;
107
108 while (sz > 0) {
109 char *fptr = &fifo->buf[fifo->head];
110 int n;
111
112 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0);
113
Rob Clarkf44001e2017-10-02 10:28:37 -0400114 /* Note that smp_load_acquire() is not strictly required
115 * as CIRC_SPACE_TO_END() does not access the tail more
116 * than once.
117 */
Rob Clarka7d3c952014-05-30 14:47:38 -0400118 n = min(sz, circ_space_to_end(&rd->fifo));
119 memcpy(fptr, ptr, n);
120
Rob Clarkf44001e2017-10-02 10:28:37 -0400121 smp_store_release(&fifo->head, (fifo->head + n) & (BUF_SZ - 1));
Rob Clarka7d3c952014-05-30 14:47:38 -0400122 sz -= n;
123 ptr += n;
124
125 wake_up_all(&rd->fifo_event);
126 }
127}
128
129static void rd_write_section(struct msm_rd_state *rd,
130 enum rd_sect_type type, const void *buf, int sz)
131{
132 rd_write(rd, &type, 4);
133 rd_write(rd, &sz, 4);
134 rd_write(rd, buf, sz);
135}
136
137static ssize_t rd_read(struct file *file, char __user *buf,
138 size_t sz, loff_t *ppos)
139{
140 struct msm_rd_state *rd = file->private_data;
141 struct circ_buf *fifo = &rd->fifo;
142 const char *fptr = &fifo->buf[fifo->tail];
143 int n = 0, ret = 0;
144
145 mutex_lock(&rd->read_lock);
146
147 ret = wait_event_interruptible(rd->fifo_event,
148 circ_count(&rd->fifo) > 0);
149 if (ret)
150 goto out;
151
Rob Clarkf44001e2017-10-02 10:28:37 -0400152 /* Note that smp_load_acquire() is not strictly required
153 * as CIRC_CNT_TO_END() does not access the head more than
154 * once.
155 */
Rob Clarka7d3c952014-05-30 14:47:38 -0400156 n = min_t(int, sz, circ_count_to_end(&rd->fifo));
Dan Carpenter5745d212016-07-13 13:35:29 +0300157 if (copy_to_user(buf, fptr, n)) {
158 ret = -EFAULT;
Rob Clarka7d3c952014-05-30 14:47:38 -0400159 goto out;
Dan Carpenter5745d212016-07-13 13:35:29 +0300160 }
Rob Clarka7d3c952014-05-30 14:47:38 -0400161
Rob Clarkf44001e2017-10-02 10:28:37 -0400162 smp_store_release(&fifo->tail, (fifo->tail + n) & (BUF_SZ - 1));
Rob Clarka7d3c952014-05-30 14:47:38 -0400163 *ppos += n;
164
165 wake_up_all(&rd->fifo_event);
166
167out:
168 mutex_unlock(&rd->read_lock);
169 if (ret)
170 return ret;
171 return n;
172}
173
174static int rd_open(struct inode *inode, struct file *file)
175{
176 struct msm_rd_state *rd = inode->i_private;
177 struct drm_device *dev = rd->dev;
178 struct msm_drm_private *priv = dev->dev_private;
179 struct msm_gpu *gpu = priv->gpu;
180 uint64_t val;
181 uint32_t gpu_id;
182 int ret = 0;
183
184 mutex_lock(&dev->struct_mutex);
185
186 if (rd->open || !gpu) {
187 ret = -EBUSY;
188 goto out;
189 }
190
191 file->private_data = rd;
192 rd->open = true;
193
194 /* the parsing tools need to know gpu-id to know which
195 * register database to load.
196 */
197 gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val);
198 gpu_id = val;
199
200 rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id));
201
202out:
203 mutex_unlock(&dev->struct_mutex);
204 return ret;
205}
206
207static int rd_release(struct inode *inode, struct file *file)
208{
209 struct msm_rd_state *rd = inode->i_private;
210 rd->open = false;
211 return 0;
212}
213
214
215static const struct file_operations rd_debugfs_fops = {
216 .owner = THIS_MODULE,
217 .open = rd_open,
218 .read = rd_read,
219 .llseek = no_llseek,
220 .release = rd_release,
221};
222
223int msm_rd_debugfs_init(struct drm_minor *minor)
224{
225 struct msm_drm_private *priv = minor->dev->dev_private;
226 struct msm_rd_state *rd;
Noralf Trønnes81895b52017-01-26 23:56:11 +0100227 struct dentry *ent;
Rob Clarka7d3c952014-05-30 14:47:38 -0400228
229 /* only create on first minor: */
230 if (priv->rd)
231 return 0;
232
233 rd = kzalloc(sizeof(*rd), GFP_KERNEL);
234 if (!rd)
235 return -ENOMEM;
236
237 rd->dev = minor->dev;
238 rd->fifo.buf = rd->buf;
239
240 mutex_init(&rd->read_lock);
241 priv->rd = rd;
242
243 init_waitqueue_head(&rd->fifo_event);
244
Noralf Trønnes81895b52017-01-26 23:56:11 +0100245 ent = debugfs_create_file("rd", S_IFREG | S_IRUGO,
Rob Clarka7d3c952014-05-30 14:47:38 -0400246 minor->debugfs_root, rd, &rd_debugfs_fops);
Noralf Trønnes81895b52017-01-26 23:56:11 +0100247 if (!ent) {
Al Virobcd599e2016-08-07 12:22:20 -0400248 DRM_ERROR("Cannot create /sys/kernel/debug/dri/%pd/rd\n",
249 minor->debugfs_root);
Rob Clarka7d3c952014-05-30 14:47:38 -0400250 goto fail;
251 }
252
Rob Clarka7d3c952014-05-30 14:47:38 -0400253 return 0;
254
255fail:
Noralf Trønnes85eac472017-03-07 21:49:22 +0100256 msm_rd_debugfs_cleanup(priv);
Rob Clarka7d3c952014-05-30 14:47:38 -0400257 return -1;
258}
259
Noralf Trønnes85eac472017-03-07 21:49:22 +0100260void msm_rd_debugfs_cleanup(struct msm_drm_private *priv)
Rob Clarka7d3c952014-05-30 14:47:38 -0400261{
Rob Clarka7d3c952014-05-30 14:47:38 -0400262 struct msm_rd_state *rd = priv->rd;
263
264 if (!rd)
265 return;
266
267 priv->rd = NULL;
Rob Clarka7d3c952014-05-30 14:47:38 -0400268 mutex_destroy(&rd->read_lock);
Rob Clarka7d3c952014-05-30 14:47:38 -0400269 kfree(rd);
270}
271
Rob Clark6507e792016-06-16 11:49:09 -0400272static void snapshot_buf(struct msm_rd_state *rd,
273 struct msm_gem_submit *submit, int idx,
Rob Clarkd0651fe2016-11-11 11:08:45 -0500274 uint64_t iova, uint32_t size)
Rob Clark6507e792016-06-16 11:49:09 -0400275{
276 struct msm_gem_object *obj = submit->bos[idx].obj;
277 const char *buf;
278
Sushmita Susheelendra0e082702017-06-13 16:52:54 -0600279 buf = msm_gem_get_vaddr(&obj->base);
Rob Clark6507e792016-06-16 11:49:09 -0400280 if (IS_ERR(buf))
281 return;
282
Rob Clark79c21182016-06-16 11:54:41 -0400283 if (iova) {
284 buf += iova - submit->bos[idx].iova;
285 } else {
286 iova = submit->bos[idx].iova;
287 size = obj->base.size;
288 }
Rob Clark6507e792016-06-16 11:49:09 -0400289
290 rd_write_section(rd, RD_GPUADDR,
Rob Clarkd0651fe2016-11-11 11:08:45 -0500291 (uint32_t[3]){ iova, size, iova >> 32 }, 12);
Rob Clark6507e792016-06-16 11:49:09 -0400292 rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);
293
Sushmita Susheelendra0e082702017-06-13 16:52:54 -0600294 msm_gem_put_vaddr(&obj->base);
Rob Clark6507e792016-06-16 11:49:09 -0400295}
296
Rob Clarka7d3c952014-05-30 14:47:38 -0400297/* called under struct_mutex */
298void msm_rd_dump_submit(struct msm_gem_submit *submit)
299{
300 struct drm_device *dev = submit->dev;
301 struct msm_drm_private *priv = dev->dev_private;
302 struct msm_rd_state *rd = priv->rd;
303 char msg[128];
304 int i, n;
305
306 if (!rd->open)
307 return;
308
309 /* writing into fifo is serialized by caller, and
310 * rd->read_lock is used to serialize the reads
311 */
312 WARN_ON(!mutex_is_locked(&dev->struct_mutex));
313
314 n = snprintf(msg, sizeof(msg), "%.*s/%d: fence=%u",
315 TASK_COMM_LEN, current->comm, task_pid_nr(current),
Rob Clarkb6295f92016-03-15 18:26:28 -0400316 submit->fence->seqno);
Rob Clarka7d3c952014-05-30 14:47:38 -0400317
318 rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
319
Rob Clark79c21182016-06-16 11:54:41 -0400320 if (rd_full) {
321 for (i = 0; i < submit->nr_bos; i++) {
322 /* buffers that are written to probably don't start out
323 * with anything interesting:
324 */
325 if (submit->bos[i].flags & MSM_SUBMIT_BO_WRITE)
326 continue;
327
328 snapshot_buf(rd, submit, i, 0, 0);
329 }
330 }
Rob Clarka7d3c952014-05-30 14:47:38 -0400331
332 for (i = 0; i < submit->nr_cmds; i++) {
Jordan Crouse22dd5c12017-03-07 09:50:30 -0700333 uint64_t iova = submit->cmd[i].iova;
Rob Clarka7d3c952014-05-30 14:47:38 -0400334 uint32_t szd = submit->cmd[i].size; /* in dwords */
Rob Clarka7d3c952014-05-30 14:47:38 -0400335
Rob Clark79c21182016-06-16 11:54:41 -0400336 /* snapshot cmdstream bo's (if we haven't already): */
337 if (!rd_full) {
338 snapshot_buf(rd, submit, submit->cmd[i].idx,
339 submit->cmd[i].iova, szd * 4);
340 }
Rob Clarka7d3c952014-05-30 14:47:38 -0400341
342 switch (submit->cmd[i].type) {
343 case MSM_SUBMIT_CMD_IB_TARGET_BUF:
344 /* ignore IB-targets, we've logged the buffer, the
345 * parser tool will follow the IB based on the logged
346 * buffer/gpuaddr, so nothing more to do.
347 */
348 break;
349 case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
350 case MSM_SUBMIT_CMD_BUF:
351 rd_write_section(rd, RD_CMDSTREAM_ADDR,
Jordan Crouse22dd5c12017-03-07 09:50:30 -0700352 (uint32_t[3]){ iova, szd, iova >> 32 }, 12);
Rob Clarka7d3c952014-05-30 14:47:38 -0400353 break;
354 }
Rob Clarka7d3c952014-05-30 14:47:38 -0400355 }
356}
357#endif