Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 1 | /* |
| 2 | * UEFI Common Platform Error Record |
| 3 | * |
| 4 | * Copyright (C) 2010, Intel Corp. |
| 5 | * Author: Huang Ying <ying.huang@intel.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License version |
| 9 | * 2 as published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #ifndef LINUX_CPER_H |
| 22 | #define LINUX_CPER_H |
| 23 | |
| 24 | #include <linux/uuid.h> |
Chen, Gong | 2dfb7d5 | 2014-06-17 22:33:07 -0400 | [diff] [blame] | 25 | #include <linux/trace_seq.h> |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 26 | |
| 27 | /* CPER record signature and the size */ |
| 28 | #define CPER_SIG_RECORD "CPER" |
| 29 | #define CPER_SIG_SIZE 4 |
| 30 | /* Used in signature_end field in struct cper_record_header */ |
| 31 | #define CPER_SIG_END 0xffffffff |
| 32 | |
| 33 | /* |
| 34 | * CPER record header revision, used in revision field in struct |
| 35 | * cper_record_header |
| 36 | */ |
| 37 | #define CPER_RECORD_REV 0x0100 |
| 38 | |
| 39 | /* |
Chen, Gong | 3760cd2 | 2014-06-11 13:59:45 -0700 | [diff] [blame] | 40 | * CPER record length contains the CPER fields which are relevant for further |
| 41 | * handling of a memory error in userspace (we don't carry all the fields |
| 42 | * defined in the UEFI spec because some of them don't make any sense.) |
| 43 | * Currently, a length of 256 should be more than enough. |
| 44 | */ |
| 45 | #define CPER_REC_LEN 256 |
| 46 | /* |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 47 | * Severity difinition for error_severity in struct cper_record_header |
| 48 | * and section_severity in struct cper_section_descriptor |
| 49 | */ |
Huang Ying | c9aa308 | 2010-12-07 10:22:29 +0800 | [diff] [blame] | 50 | enum { |
| 51 | CPER_SEV_RECOVERABLE, |
| 52 | CPER_SEV_FATAL, |
| 53 | CPER_SEV_CORRECTED, |
| 54 | CPER_SEV_INFORMATIONAL, |
| 55 | }; |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 56 | |
| 57 | /* |
| 58 | * Validation bits difinition for validation_bits in struct |
| 59 | * cper_record_header. If set, corresponding fields in struct |
| 60 | * cper_record_header contain valid information. |
| 61 | * |
| 62 | * corresponds platform_id |
| 63 | */ |
| 64 | #define CPER_VALID_PLATFORM_ID 0x0001 |
| 65 | /* corresponds timestamp */ |
| 66 | #define CPER_VALID_TIMESTAMP 0x0002 |
| 67 | /* corresponds partition_id */ |
| 68 | #define CPER_VALID_PARTITION_ID 0x0004 |
| 69 | |
| 70 | /* |
| 71 | * Notification type used to generate error record, used in |
| 72 | * notification_type in struct cper_record_header |
| 73 | * |
| 74 | * Corrected Machine Check |
| 75 | */ |
| 76 | #define CPER_NOTIFY_CMC \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 77 | GUID_INIT(0x2DCE8BB1, 0xBDD7, 0x450e, 0xB9, 0xAD, 0x9C, 0xF4, \ |
| 78 | 0xEB, 0xD4, 0xF8, 0x90) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 79 | /* Corrected Platform Error */ |
| 80 | #define CPER_NOTIFY_CPE \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 81 | GUID_INIT(0x4E292F96, 0xD843, 0x4a55, 0xA8, 0xC2, 0xD4, 0x81, \ |
| 82 | 0xF2, 0x7E, 0xBE, 0xEE) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 83 | /* Machine Check Exception */ |
| 84 | #define CPER_NOTIFY_MCE \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 85 | GUID_INIT(0xE8F56FFE, 0x919C, 0x4cc5, 0xBA, 0x88, 0x65, 0xAB, \ |
| 86 | 0xE1, 0x49, 0x13, 0xBB) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 87 | /* PCI Express Error */ |
| 88 | #define CPER_NOTIFY_PCIE \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 89 | GUID_INIT(0xCF93C01F, 0x1A16, 0x4dfc, 0xB8, 0xBC, 0x9C, 0x4D, \ |
| 90 | 0xAF, 0x67, 0xC1, 0x04) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 91 | /* INIT Record (for IPF) */ |
| 92 | #define CPER_NOTIFY_INIT \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 93 | GUID_INIT(0xCC5263E8, 0x9308, 0x454a, 0x89, 0xD0, 0x34, 0x0B, \ |
| 94 | 0xD3, 0x9B, 0xC9, 0x8E) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 95 | /* Non-Maskable Interrupt */ |
| 96 | #define CPER_NOTIFY_NMI \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 97 | GUID_INIT(0x5BAD89FF, 0xB7E6, 0x42c9, 0x81, 0x4A, 0xCF, 0x24, \ |
| 98 | 0x85, 0xD6, 0xE9, 0x8A) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 99 | /* BOOT Error Record */ |
| 100 | #define CPER_NOTIFY_BOOT \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 101 | GUID_INIT(0x3D61A466, 0xAB40, 0x409a, 0xA6, 0x98, 0xF3, 0x62, \ |
| 102 | 0xD4, 0x64, 0xB3, 0x8F) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 103 | /* DMA Remapping Error */ |
| 104 | #define CPER_NOTIFY_DMAR \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 105 | GUID_INIT(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E, \ |
| 106 | 0x72, 0x2D, 0xEB, 0x41) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 107 | |
| 108 | /* |
| 109 | * Flags bits definitions for flags in struct cper_record_header |
| 110 | * If set, the error has been recovered |
| 111 | */ |
| 112 | #define CPER_HW_ERROR_FLAGS_RECOVERED 0x1 |
| 113 | /* If set, the error is for previous boot */ |
| 114 | #define CPER_HW_ERROR_FLAGS_PREVERR 0x2 |
| 115 | /* If set, the error is injected for testing */ |
| 116 | #define CPER_HW_ERROR_FLAGS_SIMULATED 0x4 |
| 117 | |
| 118 | /* |
| 119 | * CPER section header revision, used in revision field in struct |
| 120 | * cper_section_descriptor |
| 121 | */ |
| 122 | #define CPER_SEC_REV 0x0100 |
| 123 | |
| 124 | /* |
| 125 | * Validation bits difinition for validation_bits in struct |
| 126 | * cper_section_descriptor. If set, corresponding fields in struct |
| 127 | * cper_section_descriptor contain valid information. |
| 128 | * |
| 129 | * corresponds fru_id |
| 130 | */ |
| 131 | #define CPER_SEC_VALID_FRU_ID 0x1 |
| 132 | /* corresponds fru_text */ |
| 133 | #define CPER_SEC_VALID_FRU_TEXT 0x2 |
| 134 | |
| 135 | /* |
| 136 | * Flags bits definitions for flags in struct cper_section_descriptor |
| 137 | * |
| 138 | * If set, the section is associated with the error condition |
| 139 | * directly, and should be focused on |
| 140 | */ |
| 141 | #define CPER_SEC_PRIMARY 0x0001 |
| 142 | /* |
| 143 | * If set, the error was not contained within the processor or memory |
| 144 | * hierarchy and the error may have propagated to persistent storage |
| 145 | * or network |
| 146 | */ |
| 147 | #define CPER_SEC_CONTAINMENT_WARNING 0x0002 |
| 148 | /* If set, the component must be re-initialized or re-enabled prior to use */ |
| 149 | #define CPER_SEC_RESET 0x0004 |
| 150 | /* If set, Linux may choose to discontinue use of the resource */ |
| 151 | #define CPER_SEC_ERROR_THRESHOLD_EXCEEDED 0x0008 |
| 152 | /* |
| 153 | * If set, resource could not be queried for error information due to |
| 154 | * conflicts with other system software or resources. Some fields of |
| 155 | * the section will be invalid |
| 156 | */ |
| 157 | #define CPER_SEC_RESOURCE_NOT_ACCESSIBLE 0x0010 |
| 158 | /* |
| 159 | * If set, action has been taken to ensure error containment (such as |
| 160 | * poisoning data), but the error has not been fully corrected and the |
| 161 | * data has not been consumed. Linux may choose to take further |
| 162 | * corrective action before the data is consumed |
| 163 | */ |
| 164 | #define CPER_SEC_LATENT_ERROR 0x0020 |
| 165 | |
| 166 | /* |
| 167 | * Section type definitions, used in section_type field in struct |
| 168 | * cper_section_descriptor |
| 169 | * |
| 170 | * Processor Generic |
| 171 | */ |
| 172 | #define CPER_SEC_PROC_GENERIC \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 173 | GUID_INIT(0x9876CCAD, 0x47B4, 0x4bdb, 0xB6, 0x5E, 0x16, 0xF1, \ |
| 174 | 0x93, 0xC4, 0xF3, 0xDB) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 175 | /* Processor Specific: X86/X86_64 */ |
| 176 | #define CPER_SEC_PROC_IA \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 177 | GUID_INIT(0xDC3EA0B0, 0xA144, 0x4797, 0xB9, 0x5B, 0x53, 0xFA, \ |
| 178 | 0x24, 0x2B, 0x6E, 0x1D) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 179 | /* Processor Specific: IA64 */ |
| 180 | #define CPER_SEC_PROC_IPF \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 181 | GUID_INIT(0xE429FAF1, 0x3CB7, 0x11D4, 0x0B, 0xCA, 0x07, 0x00, \ |
| 182 | 0x80, 0xC7, 0x3C, 0x88, 0x81) |
Tyler Baicar | 2f74f09 | 2017-06-21 12:17:07 -0600 | [diff] [blame] | 183 | /* Processor Specific: ARM */ |
| 184 | #define CPER_SEC_PROC_ARM \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 185 | GUID_INIT(0xE19E3D16, 0xBC11, 0x11E4, 0x9C, 0xAA, 0xC2, 0x05, \ |
| 186 | 0x1D, 0x5D, 0x46, 0xB0) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 187 | /* Platform Memory */ |
| 188 | #define CPER_SEC_PLATFORM_MEM \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 189 | GUID_INIT(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \ |
| 190 | 0xED, 0x7C, 0x83, 0xB1) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 191 | #define CPER_SEC_PCIE \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 192 | GUID_INIT(0xD995E954, 0xBBC1, 0x430F, 0xAD, 0x91, 0xB4, 0x4D, \ |
| 193 | 0xCB, 0x3C, 0x6F, 0x35) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 194 | /* Firmware Error Record Reference */ |
| 195 | #define CPER_SEC_FW_ERR_REC_REF \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 196 | GUID_INIT(0x81212A96, 0x09ED, 0x4996, 0x94, 0x71, 0x8D, 0x72, \ |
| 197 | 0x9C, 0x8E, 0x69, 0xED) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 198 | /* PCI/PCI-X Bus */ |
| 199 | #define CPER_SEC_PCI_X_BUS \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 200 | GUID_INIT(0xC5753963, 0x3B84, 0x4095, 0xBF, 0x78, 0xED, 0xDA, \ |
| 201 | 0xD3, 0xF9, 0xC9, 0xDD) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 202 | /* PCI Component/Device */ |
| 203 | #define CPER_SEC_PCI_DEV \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 204 | GUID_INIT(0xEB5E4685, 0xCA66, 0x4769, 0xB6, 0xA2, 0x26, 0x06, \ |
| 205 | 0x8B, 0x00, 0x13, 0x26) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 206 | #define CPER_SEC_DMAR_GENERIC \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 207 | GUID_INIT(0x5B51FEF7, 0xC79D, 0x4434, 0x8F, 0x1B, 0xAA, 0x62, \ |
| 208 | 0xDE, 0x3E, 0x2C, 0x64) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 209 | /* Intel VT for Directed I/O specific DMAr */ |
| 210 | #define CPER_SEC_DMAR_VT \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 211 | GUID_INIT(0x71761D37, 0x32B2, 0x45cd, 0xA7, 0xD0, 0xB0, 0xFE, \ |
| 212 | 0xDD, 0x93, 0xE8, 0xCF) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 213 | /* IOMMU specific DMAr */ |
| 214 | #define CPER_SEC_DMAR_IOMMU \ |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 215 | GUID_INIT(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F, \ |
| 216 | 0xDF, 0xAA, 0x84, 0xEC) |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 217 | |
Huang Ying | c9aa308 | 2010-12-07 10:22:29 +0800 | [diff] [blame] | 218 | #define CPER_PROC_VALID_TYPE 0x0001 |
| 219 | #define CPER_PROC_VALID_ISA 0x0002 |
| 220 | #define CPER_PROC_VALID_ERROR_TYPE 0x0004 |
| 221 | #define CPER_PROC_VALID_OPERATION 0x0008 |
| 222 | #define CPER_PROC_VALID_FLAGS 0x0010 |
| 223 | #define CPER_PROC_VALID_LEVEL 0x0020 |
| 224 | #define CPER_PROC_VALID_VERSION 0x0040 |
| 225 | #define CPER_PROC_VALID_BRAND_INFO 0x0080 |
| 226 | #define CPER_PROC_VALID_ID 0x0100 |
| 227 | #define CPER_PROC_VALID_TARGET_ADDRESS 0x0200 |
| 228 | #define CPER_PROC_VALID_REQUESTOR_ID 0x0400 |
| 229 | #define CPER_PROC_VALID_RESPONDER_ID 0x0800 |
| 230 | #define CPER_PROC_VALID_IP 0x1000 |
| 231 | |
| 232 | #define CPER_MEM_VALID_ERROR_STATUS 0x0001 |
Chen, Gong | 147de14 | 2013-10-18 14:30:13 -0700 | [diff] [blame] | 233 | #define CPER_MEM_VALID_PA 0x0002 |
| 234 | #define CPER_MEM_VALID_PA_MASK 0x0004 |
Huang Ying | c9aa308 | 2010-12-07 10:22:29 +0800 | [diff] [blame] | 235 | #define CPER_MEM_VALID_NODE 0x0008 |
| 236 | #define CPER_MEM_VALID_CARD 0x0010 |
| 237 | #define CPER_MEM_VALID_MODULE 0x0020 |
| 238 | #define CPER_MEM_VALID_BANK 0x0040 |
| 239 | #define CPER_MEM_VALID_DEVICE 0x0080 |
| 240 | #define CPER_MEM_VALID_ROW 0x0100 |
| 241 | #define CPER_MEM_VALID_COLUMN 0x0200 |
| 242 | #define CPER_MEM_VALID_BIT_POSITION 0x0400 |
| 243 | #define CPER_MEM_VALID_REQUESTOR_ID 0x0800 |
| 244 | #define CPER_MEM_VALID_RESPONDER_ID 0x1000 |
| 245 | #define CPER_MEM_VALID_TARGET_ID 0x2000 |
| 246 | #define CPER_MEM_VALID_ERROR_TYPE 0x4000 |
Chen, Gong | 147de14 | 2013-10-18 14:30:13 -0700 | [diff] [blame] | 247 | #define CPER_MEM_VALID_RANK_NUMBER 0x8000 |
| 248 | #define CPER_MEM_VALID_CARD_HANDLE 0x10000 |
| 249 | #define CPER_MEM_VALID_MODULE_HANDLE 0x20000 |
Huang Ying | c9aa308 | 2010-12-07 10:22:29 +0800 | [diff] [blame] | 250 | |
| 251 | #define CPER_PCIE_VALID_PORT_TYPE 0x0001 |
| 252 | #define CPER_PCIE_VALID_VERSION 0x0002 |
| 253 | #define CPER_PCIE_VALID_COMMAND_STATUS 0x0004 |
| 254 | #define CPER_PCIE_VALID_DEVICE_ID 0x0008 |
| 255 | #define CPER_PCIE_VALID_SERIAL_NUMBER 0x0010 |
| 256 | #define CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS 0x0020 |
| 257 | #define CPER_PCIE_VALID_CAPABILITY 0x0040 |
| 258 | #define CPER_PCIE_VALID_AER_INFO 0x0080 |
| 259 | |
| 260 | #define CPER_PCIE_SLOT_SHIFT 3 |
| 261 | |
Tyler Baicar | 2f74f09 | 2017-06-21 12:17:07 -0600 | [diff] [blame] | 262 | #define CPER_ARM_VALID_MPIDR BIT(0) |
| 263 | #define CPER_ARM_VALID_AFFINITY_LEVEL BIT(1) |
| 264 | #define CPER_ARM_VALID_RUNNING_STATE BIT(2) |
| 265 | #define CPER_ARM_VALID_VENDOR_INFO BIT(3) |
| 266 | |
| 267 | #define CPER_ARM_INFO_VALID_MULTI_ERR BIT(0) |
| 268 | #define CPER_ARM_INFO_VALID_FLAGS BIT(1) |
| 269 | #define CPER_ARM_INFO_VALID_ERR_INFO BIT(2) |
| 270 | #define CPER_ARM_INFO_VALID_VIRT_ADDR BIT(3) |
| 271 | #define CPER_ARM_INFO_VALID_PHYSICAL_ADDR BIT(4) |
| 272 | |
| 273 | #define CPER_ARM_INFO_FLAGS_FIRST BIT(0) |
| 274 | #define CPER_ARM_INFO_FLAGS_LAST BIT(1) |
| 275 | #define CPER_ARM_INFO_FLAGS_PROPAGATED BIT(2) |
| 276 | #define CPER_ARM_INFO_FLAGS_OVERFLOW BIT(3) |
| 277 | |
Tyler Baicar | 301f55b | 2018-01-02 18:10:42 +0000 | [diff] [blame] | 278 | #define CPER_ARM_CACHE_ERROR 0 |
| 279 | #define CPER_ARM_TLB_ERROR 1 |
| 280 | #define CPER_ARM_BUS_ERROR 2 |
| 281 | #define CPER_ARM_VENDOR_ERROR 3 |
| 282 | #define CPER_ARM_MAX_TYPE CPER_ARM_VENDOR_ERROR |
| 283 | |
| 284 | #define CPER_ARM_ERR_VALID_TRANSACTION_TYPE BIT(0) |
| 285 | #define CPER_ARM_ERR_VALID_OPERATION_TYPE BIT(1) |
| 286 | #define CPER_ARM_ERR_VALID_LEVEL BIT(2) |
| 287 | #define CPER_ARM_ERR_VALID_PROC_CONTEXT_CORRUPT BIT(3) |
| 288 | #define CPER_ARM_ERR_VALID_CORRECTED BIT(4) |
| 289 | #define CPER_ARM_ERR_VALID_PRECISE_PC BIT(5) |
| 290 | #define CPER_ARM_ERR_VALID_RESTARTABLE_PC BIT(6) |
| 291 | #define CPER_ARM_ERR_VALID_PARTICIPATION_TYPE BIT(7) |
| 292 | #define CPER_ARM_ERR_VALID_TIME_OUT BIT(8) |
| 293 | #define CPER_ARM_ERR_VALID_ADDRESS_SPACE BIT(9) |
| 294 | #define CPER_ARM_ERR_VALID_MEM_ATTRIBUTES BIT(10) |
| 295 | #define CPER_ARM_ERR_VALID_ACCESS_MODE BIT(11) |
| 296 | |
| 297 | #define CPER_ARM_ERR_TRANSACTION_SHIFT 16 |
| 298 | #define CPER_ARM_ERR_TRANSACTION_MASK GENMASK(1,0) |
| 299 | #define CPER_ARM_ERR_OPERATION_SHIFT 18 |
| 300 | #define CPER_ARM_ERR_OPERATION_MASK GENMASK(3,0) |
| 301 | #define CPER_ARM_ERR_LEVEL_SHIFT 22 |
| 302 | #define CPER_ARM_ERR_LEVEL_MASK GENMASK(2,0) |
| 303 | #define CPER_ARM_ERR_PC_CORRUPT_SHIFT 25 |
| 304 | #define CPER_ARM_ERR_PC_CORRUPT_MASK GENMASK(0,0) |
| 305 | #define CPER_ARM_ERR_CORRECTED_SHIFT 26 |
| 306 | #define CPER_ARM_ERR_CORRECTED_MASK GENMASK(0,0) |
| 307 | #define CPER_ARM_ERR_PRECISE_PC_SHIFT 27 |
| 308 | #define CPER_ARM_ERR_PRECISE_PC_MASK GENMASK(0,0) |
| 309 | #define CPER_ARM_ERR_RESTARTABLE_PC_SHIFT 28 |
| 310 | #define CPER_ARM_ERR_RESTARTABLE_PC_MASK GENMASK(0,0) |
| 311 | #define CPER_ARM_ERR_PARTICIPATION_TYPE_SHIFT 29 |
| 312 | #define CPER_ARM_ERR_PARTICIPATION_TYPE_MASK GENMASK(1,0) |
| 313 | #define CPER_ARM_ERR_TIME_OUT_SHIFT 31 |
| 314 | #define CPER_ARM_ERR_TIME_OUT_MASK GENMASK(0,0) |
| 315 | #define CPER_ARM_ERR_ADDRESS_SPACE_SHIFT 32 |
| 316 | #define CPER_ARM_ERR_ADDRESS_SPACE_MASK GENMASK(1,0) |
| 317 | #define CPER_ARM_ERR_MEM_ATTRIBUTES_SHIFT 34 |
| 318 | #define CPER_ARM_ERR_MEM_ATTRIBUTES_MASK GENMASK(8,0) |
| 319 | #define CPER_ARM_ERR_ACCESS_MODE_SHIFT 43 |
| 320 | #define CPER_ARM_ERR_ACCESS_MODE_MASK GENMASK(0,0) |
| 321 | |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 322 | /* |
| 323 | * All tables and structs must be byte-packed to match CPER |
| 324 | * specification, since the tables are provided by the system BIOS |
| 325 | */ |
| 326 | #pragma pack(1) |
| 327 | |
| 328 | struct cper_record_header { |
| 329 | char signature[CPER_SIG_SIZE]; /* must be CPER_SIG_RECORD */ |
| 330 | __u16 revision; /* must be CPER_RECORD_REV */ |
| 331 | __u32 signature_end; /* must be CPER_SIG_END */ |
| 332 | __u16 section_count; |
| 333 | __u32 error_severity; |
| 334 | __u32 validation_bits; |
| 335 | __u32 record_length; |
| 336 | __u64 timestamp; |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 337 | guid_t platform_id; |
| 338 | guid_t partition_id; |
| 339 | guid_t creator_id; |
| 340 | guid_t notification_type; |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 341 | __u64 record_id; |
| 342 | __u32 flags; |
| 343 | __u64 persistence_information; |
| 344 | __u8 reserved[12]; /* must be zero */ |
| 345 | }; |
| 346 | |
| 347 | struct cper_section_descriptor { |
| 348 | __u32 section_offset; /* Offset in bytes of the |
| 349 | * section body from the base |
| 350 | * of the record header */ |
| 351 | __u32 section_length; |
| 352 | __u16 revision; /* must be CPER_RECORD_REV */ |
| 353 | __u8 validation_bits; |
| 354 | __u8 reserved; /* must be zero */ |
| 355 | __u32 flags; |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 356 | guid_t section_type; |
| 357 | guid_t fru_id; |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 358 | __u32 section_severity; |
| 359 | __u8 fru_text[20]; |
| 360 | }; |
| 361 | |
| 362 | /* Generic Processor Error Section */ |
| 363 | struct cper_sec_proc_generic { |
| 364 | __u64 validation_bits; |
| 365 | __u8 proc_type; |
| 366 | __u8 proc_isa; |
| 367 | __u8 proc_error_type; |
| 368 | __u8 operation; |
| 369 | __u8 flags; |
| 370 | __u8 level; |
| 371 | __u16 reserved; |
| 372 | __u64 cpu_version; |
| 373 | char cpu_brand[128]; |
| 374 | __u64 proc_id; |
| 375 | __u64 target_addr; |
| 376 | __u64 requestor_id; |
| 377 | __u64 responder_id; |
| 378 | __u64 ip; |
| 379 | }; |
| 380 | |
| 381 | /* IA32/X64 Processor Error Section */ |
| 382 | struct cper_sec_proc_ia { |
| 383 | __u64 validation_bits; |
| 384 | __u8 lapic_id; |
| 385 | __u8 cpuid[48]; |
| 386 | }; |
| 387 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 388 | /* IA32/X64 Processor Error Information Structure */ |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 389 | struct cper_ia_err_info { |
Andy Shevchenko | c002075 | 2017-07-19 21:28:52 +0300 | [diff] [blame] | 390 | guid_t err_type; |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 391 | __u64 validation_bits; |
| 392 | __u64 check_info; |
| 393 | __u64 target_id; |
| 394 | __u64 requestor_id; |
| 395 | __u64 responder_id; |
| 396 | __u64 ip; |
| 397 | }; |
| 398 | |
| 399 | /* IA32/X64 Processor Context Information Structure */ |
| 400 | struct cper_ia_proc_ctx { |
| 401 | __u16 reg_ctx_type; |
| 402 | __u16 reg_arr_size; |
| 403 | __u32 msr_addr; |
| 404 | __u64 mm_reg_addr; |
| 405 | }; |
| 406 | |
Tyler Baicar | 2f74f09 | 2017-06-21 12:17:07 -0600 | [diff] [blame] | 407 | /* ARM Processor Error Section */ |
| 408 | struct cper_sec_proc_arm { |
| 409 | __u32 validation_bits; |
| 410 | __u16 err_info_num; /* Number of Processor Error Info */ |
| 411 | __u16 context_info_num; /* Number of Processor Context Info Records*/ |
| 412 | __u32 section_length; |
| 413 | __u8 affinity_level; |
| 414 | __u8 reserved[3]; /* must be zero */ |
| 415 | __u64 mpidr; |
| 416 | __u64 midr; |
| 417 | __u32 running_state; /* Bit 0 set - Processor running. PSCI = 0 */ |
| 418 | __u32 psci_state; |
| 419 | }; |
| 420 | |
| 421 | /* ARM Processor Error Information Structure */ |
| 422 | struct cper_arm_err_info { |
| 423 | __u8 version; |
| 424 | __u8 length; |
| 425 | __u16 validation_bits; |
| 426 | __u8 type; |
| 427 | __u16 multiple_error; |
| 428 | __u8 flags; |
| 429 | __u64 error_info; |
| 430 | __u64 virt_fault_addr; |
| 431 | __u64 physical_fault_addr; |
| 432 | }; |
| 433 | |
| 434 | /* ARM Processor Context Information Structure */ |
| 435 | struct cper_arm_ctx_info { |
| 436 | __u16 version; |
| 437 | __u16 type; |
| 438 | __u32 size; |
| 439 | }; |
| 440 | |
Luck, Tony | 4c62360 | 2015-06-30 15:57:51 -0700 | [diff] [blame] | 441 | /* Old Memory Error Section UEFI 2.1, 2.2 */ |
| 442 | struct cper_sec_mem_err_old { |
| 443 | __u64 validation_bits; |
| 444 | __u64 error_status; |
| 445 | __u64 physical_addr; |
| 446 | __u64 physical_addr_mask; |
| 447 | __u16 node; |
| 448 | __u16 card; |
| 449 | __u16 module; |
| 450 | __u16 bank; |
| 451 | __u16 device; |
| 452 | __u16 row; |
| 453 | __u16 column; |
| 454 | __u16 bit_pos; |
| 455 | __u64 requestor_id; |
| 456 | __u64 responder_id; |
| 457 | __u64 target_id; |
| 458 | __u8 error_type; |
| 459 | }; |
| 460 | |
| 461 | /* Memory Error Section UEFI >= 2.3 */ |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 462 | struct cper_sec_mem_err { |
| 463 | __u64 validation_bits; |
| 464 | __u64 error_status; |
| 465 | __u64 physical_addr; |
| 466 | __u64 physical_addr_mask; |
| 467 | __u16 node; |
| 468 | __u16 card; |
| 469 | __u16 module; |
| 470 | __u16 bank; |
| 471 | __u16 device; |
| 472 | __u16 row; |
| 473 | __u16 column; |
| 474 | __u16 bit_pos; |
| 475 | __u64 requestor_id; |
| 476 | __u64 responder_id; |
| 477 | __u64 target_id; |
| 478 | __u8 error_type; |
Chen, Gong | 147de14 | 2013-10-18 14:30:13 -0700 | [diff] [blame] | 479 | __u8 reserved; |
| 480 | __u16 rank; |
| 481 | __u16 mem_array_handle; /* card handle in UEFI 2.4 */ |
| 482 | __u16 mem_dev_handle; /* module handle in UEFI 2.4 */ |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 483 | }; |
| 484 | |
Chen, Gong | 2dfb7d5 | 2014-06-17 22:33:07 -0400 | [diff] [blame] | 485 | struct cper_mem_err_compact { |
| 486 | __u64 validation_bits; |
| 487 | __u16 node; |
| 488 | __u16 card; |
| 489 | __u16 module; |
| 490 | __u16 bank; |
| 491 | __u16 device; |
| 492 | __u16 row; |
| 493 | __u16 column; |
| 494 | __u16 bit_pos; |
| 495 | __u64 requestor_id; |
| 496 | __u64 responder_id; |
| 497 | __u64 target_id; |
| 498 | __u16 rank; |
| 499 | __u16 mem_array_handle; |
| 500 | __u16 mem_dev_handle; |
| 501 | }; |
| 502 | |
Huang Ying | c9aa308 | 2010-12-07 10:22:29 +0800 | [diff] [blame] | 503 | struct cper_sec_pcie { |
| 504 | __u64 validation_bits; |
| 505 | __u32 port_type; |
| 506 | struct { |
| 507 | __u8 minor; |
| 508 | __u8 major; |
| 509 | __u8 reserved[2]; |
| 510 | } version; |
| 511 | __u16 command; |
| 512 | __u16 status; |
| 513 | __u32 reserved; |
| 514 | struct { |
| 515 | __u16 vendor_id; |
| 516 | __u16 device_id; |
| 517 | __u8 class_code[3]; |
| 518 | __u8 function; |
| 519 | __u8 device; |
| 520 | __u16 segment; |
| 521 | __u8 bus; |
| 522 | __u8 secondary_bus; |
| 523 | __u16 slot; |
| 524 | __u8 reserved; |
| 525 | } device_id; |
| 526 | struct { |
| 527 | __u32 lower; |
| 528 | __u32 upper; |
| 529 | } serial_number; |
| 530 | struct { |
| 531 | __u16 secondary_status; |
| 532 | __u16 control; |
| 533 | } bridge; |
| 534 | __u8 capability[60]; |
| 535 | __u8 aer_info[96]; |
| 536 | }; |
| 537 | |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 538 | /* Reset to default packing */ |
| 539 | #pragma pack() |
| 540 | |
Tyler Baicar | c6d8c8e | 2018-01-02 18:10:41 +0000 | [diff] [blame] | 541 | extern const char * const cper_proc_error_type_strs[4]; |
| 542 | |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 543 | u64 cper_next_record_id(void); |
Chen, Gong | 3760cd2 | 2014-06-11 13:59:45 -0700 | [diff] [blame] | 544 | const char *cper_severity_str(unsigned int); |
| 545 | const char *cper_mem_err_type_str(unsigned int); |
Huang Ying | c413d76 | 2011-02-21 13:54:43 +0800 | [diff] [blame] | 546 | void cper_print_bits(const char *prefix, unsigned int bits, |
Chen, Gong | 88f074f | 2013-10-18 14:28:59 -0700 | [diff] [blame] | 547 | const char * const strs[], unsigned int strs_size); |
Chen, Gong | 2dfb7d5 | 2014-06-17 22:33:07 -0400 | [diff] [blame] | 548 | void cper_mem_err_pack(const struct cper_sec_mem_err *, |
| 549 | struct cper_mem_err_compact *); |
| 550 | const char *cper_mem_err_unpack(struct trace_seq *, |
| 551 | struct cper_mem_err_compact *); |
Tyler Baicar | c6d8c8e | 2018-01-02 18:10:41 +0000 | [diff] [blame] | 552 | void cper_print_proc_arm(const char *pfx, |
| 553 | const struct cper_sec_proc_arm *proc); |
Huang Ying | 06d65de | 2010-05-18 14:35:19 +0800 | [diff] [blame] | 554 | |
| 555 | #endif |