blob: 1a523c81c06e528de4ac67bfe05d384ff054d6f5 [file] [log] [blame]
Li Yangbc141de2006-10-03 23:17:51 -05001/*
2 * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
3 *
4 * Author: Li Yang <LeoLi@freescale.com>
5 * Yin Olivia <Hong-hua.Yin@freescale.com>
6 *
7 * Description:
8 * MPC8360E MDS PB board specific routines.
9 *
10 * Changelog:
11 * Jun 21, 2006 Initial version
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/errno.h>
23#include <linux/reboot.h>
24#include <linux/pci.h>
25#include <linux/kdev_t.h>
26#include <linux/major.h>
27#include <linux/console.h>
28#include <linux/delay.h>
29#include <linux/seq_file.h>
30#include <linux/root_dev.h>
31#include <linux/initrd.h>
32
Li Yangf5a37b02006-10-11 19:04:22 +080033#include <asm/of_device.h>
Li Yangbc141de2006-10-03 23:17:51 -050034#include <asm/system.h>
35#include <asm/atomic.h>
36#include <asm/time.h>
37#include <asm/io.h>
38#include <asm/machdep.h>
39#include <asm/ipic.h>
40#include <asm/bootinfo.h>
41#include <asm/irq.h>
42#include <asm/prom.h>
43#include <asm/udbg.h>
44#include <sysdev/fsl_soc.h>
45#include <asm/qe.h>
46#include <asm/qe_ic.h>
47
48#include "mpc83xx.h"
49
50#undef DEBUG
51#ifdef DEBUG
52#define DBG(fmt...) udbg_printf(fmt)
53#else
54#define DBG(fmt...)
55#endif
56
57#ifndef CONFIG_PCI
58unsigned long isa_io_base = 0;
59unsigned long isa_mem_base = 0;
60#endif
61
62static u8 *bcsr_regs = NULL;
63
64u8 *get_bcsr(void)
65{
66 return bcsr_regs;
67}
68
69/* ************************************************************************
70 *
71 * Setup the architecture
72 *
73 */
74static void __init mpc8360_sys_setup_arch(void)
75{
76 struct device_node *np;
77
78 if (ppc_md.progress)
79 ppc_md.progress("mpc8360_sys_setup_arch()", 0);
80
81 np = of_find_node_by_type(NULL, "cpu");
82 if (np != 0) {
83 const unsigned int *fp =
84 get_property(np, "clock-frequency", NULL);
85 if (fp != 0)
86 loops_per_jiffy = *fp / HZ;
87 else
88 loops_per_jiffy = 50000000 / HZ;
89 of_node_put(np);
90 }
91
92 /* Map BCSR area */
93 np = of_find_node_by_name(NULL, "bcsr");
94 if (np != 0) {
95 struct resource res;
96
97 of_address_to_resource(np, 0, &res);
98 bcsr_regs = ioremap(res.start, res.end - res.start +1);
99 of_node_put(np);
100 }
101
102#ifdef CONFIG_PCI
103 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
104 add_bridge(np);
105
106 ppc_md.pci_swizzle = common_swizzle;
107 ppc_md.pci_exclude_device = mpc83xx_exclude_device;
108#endif
109
110#ifdef CONFIG_QUICC_ENGINE
111 qe_reset();
112
113 if ((np = of_find_node_by_name(np, "par_io")) != NULL) {
114 par_io_init(np);
115 of_node_put(np);
116
117 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
118 par_io_of_config(np);
119 }
120
121 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
122 != NULL){
123 /* Reset the Ethernet PHY */
124 bcsr_regs[9] &= ~0x20;
125 udelay(1000);
126 bcsr_regs[9] |= 0x20;
127 iounmap(bcsr_regs);
128 of_node_put(np);
129 }
130
131#endif /* CONFIG_QUICC_ENGINE */
132
133#ifdef CONFIG_BLK_DEV_INITRD
134 if (initrd_start)
135 ROOT_DEV = Root_RAM0;
136 else
137#endif
138#ifdef CONFIG_ROOT_NFS
139 ROOT_DEV = Root_NFS;
140#else
141 ROOT_DEV = Root_HDA1;
142#endif
143}
144
Li Yangf5a37b02006-10-11 19:04:22 +0800145static int __init mpc8360_declare_of_platform_devices(void)
146{
147 struct device_node *np;
148
149 for (np = NULL; (np = of_find_compatible_node(np, "network",
150 "ucc_geth")) != NULL;) {
151 int ucc_num;
152 char bus_id[BUS_ID_SIZE];
153
154 ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1;
155 snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num);
156 of_platform_device_create(np, bus_id, NULL);
157 }
158
159 return 0;
160}
161device_initcall(mpc8360_declare_of_platform_devices);
162
Li Yangbc141de2006-10-03 23:17:51 -0500163void __init mpc8360_sys_init_IRQ(void)
164{
165
166 struct device_node *np;
167
168 np = of_find_node_by_type(NULL, "ipic");
169 if (!np)
170 return;
171
172 ipic_init(np, 0);
173
174 /* Initialize the default interrupt mapping priorities,
175 * in case the boot rom changed something on us.
176 */
177 ipic_set_default_priority();
178 of_node_put(np);
179
180#ifdef CONFIG_QUICC_ENGINE
181 np = of_find_node_by_type(NULL, "qeic");
182 if (!np)
183 return;
184
185 qe_ic_init(np, 0);
186 of_node_put(np);
187#endif /* CONFIG_QUICC_ENGINE */
188}
189
190#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
191extern ulong ds1374_get_rtc_time(void);
192extern int ds1374_set_rtc_time(ulong);
193
194static int __init mpc8360_rtc_hookup(void)
195{
196 struct timespec tv;
197
198 ppc_md.get_rtc_time = ds1374_get_rtc_time;
199 ppc_md.set_rtc_time = ds1374_set_rtc_time;
200
201 tv.tv_nsec = 0;
202 tv.tv_sec = (ppc_md.get_rtc_time) ();
203 do_settimeofday(&tv);
204
205 return 0;
206}
207
208late_initcall(mpc8360_rtc_hookup);
209#endif
210
211/*
212 * Called very early, MMU is off, device-tree isn't unflattened
213 */
214static int __init mpc8360_sys_probe(void)
215{
216 char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
217 "model", NULL);
218 if (model == NULL)
219 return 0;
220 if (strcmp(model, "MPC8360EPB"))
221 return 0;
222
223 DBG("MPC8360EMDS-PB found\n");
224
225 return 1;
226}
227
228define_machine(mpc8360_sys) {
229 .name = "MPC8360E PB",
230 .probe = mpc8360_sys_probe,
231 .setup_arch = mpc8360_sys_setup_arch,
232 .init_IRQ = mpc8360_sys_init_IRQ,
233 .get_irq = ipic_get_irq,
234 .restart = mpc83xx_restart,
235 .time_init = mpc83xx_time_init,
236 .calibrate_decr = generic_calibrate_decr,
237 .progress = udbg_progress,
238};