David Brownell | 4c20386c | 2007-02-12 00:53:11 -0800 | [diff] [blame] | 1 | GPIO Interfaces |
| 2 | |
| 3 | This provides an overview of GPIO access conventions on Linux. |
| 4 | |
| 5 | |
| 6 | What is a GPIO? |
| 7 | =============== |
| 8 | A "General Purpose Input/Output" (GPIO) is a flexible software-controlled |
| 9 | digital signal. They are provided from many kinds of chip, and are familiar |
| 10 | to Linux developers working with embedded and custom hardware. Each GPIO |
| 11 | represents a bit connected to a particular pin, or "ball" on Ball Grid Array |
| 12 | (BGA) packages. Board schematics show which external hardware connects to |
| 13 | which GPIOs. Drivers can be written generically, so that board setup code |
| 14 | passes such pin configuration data to drivers. |
| 15 | |
| 16 | System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every |
| 17 | non-dedicated pin can be configured as a GPIO; and most chips have at least |
| 18 | several dozen of them. Programmable logic devices (like FPGAs) can easily |
| 19 | provide GPIOs; multifunction chips like power managers, and audio codecs |
| 20 | often have a few such pins to help with pin scarcity on SOCs; and there are |
| 21 | also "GPIO Expander" chips that connect using the I2C or SPI serial busses. |
| 22 | Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS |
| 23 | firmware knowing how they're used). |
| 24 | |
| 25 | The exact capabilities of GPIOs vary between systems. Common options: |
| 26 | |
| 27 | - Output values are writable (high=1, low=0). Some chips also have |
| 28 | options about how that value is driven, so that for example only one |
| 29 | value might be driven ... supporting "wire-OR" and similar schemes |
| 30 | for the other value. |
| 31 | |
| 32 | - Input values are likewise readable (1, 0). Some chips support readback |
| 33 | of pins configured as "output", which is very useful in such "wire-OR" |
| 34 | cases (to support bidirectional signaling). GPIO controllers may have |
| 35 | input de-glitch logic, sometimes with software controls. |
| 36 | |
| 37 | - Inputs can often be used as IRQ signals, often edge triggered but |
| 38 | sometimes level triggered. Such IRQs may be configurable as system |
| 39 | wakeup events, to wake the system from a low power state. |
| 40 | |
| 41 | - Usually a GPIO will be configurable as either input or output, as needed |
| 42 | by different product boards; single direction ones exist too. |
| 43 | |
| 44 | - Most GPIOs can be accessed while holding spinlocks, but those accessed |
| 45 | through a serial bus normally can't. Some systems support both types. |
| 46 | |
| 47 | On a given board each GPIO is used for one specific purpose like monitoring |
| 48 | MMC/SD card insertion/removal, detecting card writeprotect status, driving |
| 49 | a LED, configuring a transceiver, bitbanging a serial bus, poking a hardware |
| 50 | watchdog, sensing a switch, and so on. |
| 51 | |
| 52 | |
| 53 | GPIO conventions |
| 54 | ================ |
| 55 | Note that this is called a "convention" because you don't need to do it this |
| 56 | way, and it's no crime if you don't. There **are** cases where portability |
| 57 | is not the main issue; GPIOs are often used for the kind of board-specific |
| 58 | glue logic that may even change between board revisions, and can't ever be |
| 59 | used on a board that's wired differently. Only least-common-denominator |
| 60 | functionality can be very portable. Other features are platform-specific, |
| 61 | and that can be critical for glue logic. |
| 62 | |
| 63 | Plus, this doesn't define an implementation framework, just an interface. |
| 64 | One platform might implement it as simple inline functions accessing chip |
| 65 | registers; another might implement it by delegating through abstractions |
| 66 | used for several very different kinds of GPIO controller. |
| 67 | |
| 68 | That said, if the convention is supported on their platform, drivers should |
| 69 | use it when possible: |
| 70 | |
| 71 | #include <asm/gpio.h> |
| 72 | |
| 73 | If you stick to this convention then it'll be easier for other developers to |
| 74 | see what your code is doing, and help maintain it. |
| 75 | |
| 76 | |
| 77 | Identifying GPIOs |
| 78 | ----------------- |
| 79 | GPIOs are identified by unsigned integers in the range 0..MAX_INT. That |
| 80 | reserves "negative" numbers for other purposes like marking signals as |
David Brownell | f5de611 | 2007-02-16 01:27:14 -0800 | [diff] [blame^] | 81 | "not available on this board", or indicating faults. Code that doesn't |
| 82 | touch the underlying hardware treats these integers as opaque cookies. |
David Brownell | 4c20386c | 2007-02-12 00:53:11 -0800 | [diff] [blame] | 83 | |
| 84 | Platforms define how they use those integers, and usually #define symbols |
| 85 | for the GPIO lines so that board-specific setup code directly corresponds |
| 86 | to the relevant schematics. In contrast, drivers should only use GPIO |
| 87 | numbers passed to them from that setup code, using platform_data to hold |
| 88 | board-specific pin configuration data (along with other board specific |
| 89 | data they need). That avoids portability problems. |
| 90 | |
| 91 | So for example one platform uses numbers 32-159 for GPIOs; while another |
| 92 | uses numbers 0..63 with one set of GPIO controllers, 64-79 with another |
| 93 | type of GPIO controller, and on one particular board 80-95 with an FPGA. |
| 94 | The numbers need not be contiguous; either of those platforms could also |
| 95 | use numbers 2000-2063 to identify GPIOs in a bank of I2C GPIO expanders. |
| 96 | |
| 97 | Whether a platform supports multiple GPIO controllers is currently a |
| 98 | platform-specific implementation issue. |
| 99 | |
| 100 | |
| 101 | Using GPIOs |
| 102 | ----------- |
| 103 | One of the first things to do with a GPIO, often in board setup code when |
| 104 | setting up a platform_device using the GPIO, is mark its direction: |
| 105 | |
| 106 | /* set as input or output, returning 0 or negative errno */ |
| 107 | int gpio_direction_input(unsigned gpio); |
| 108 | int gpio_direction_output(unsigned gpio); |
| 109 | |
| 110 | The return value is zero for success, else a negative errno. It should |
| 111 | be checked, since the get/set calls don't have error returns and since |
| 112 | misconfiguration is possible. (These calls could sleep.) |
| 113 | |
| 114 | Setting the direction can fail if the GPIO number is invalid, or when |
| 115 | that particular GPIO can't be used in that mode. It's generally a bad |
| 116 | idea to rely on boot firmware to have set the direction correctly, since |
| 117 | it probably wasn't validated to do more than boot Linux. (Similarly, |
| 118 | that board setup code probably needs to multiplex that pin as a GPIO, |
| 119 | and configure pullups/pulldowns appropriately.) |
| 120 | |
| 121 | |
| 122 | Spinlock-Safe GPIO access |
| 123 | ------------------------- |
| 124 | Most GPIO controllers can be accessed with memory read/write instructions. |
| 125 | That doesn't need to sleep, and can safely be done from inside IRQ handlers. |
| 126 | |
| 127 | Use these calls to access such GPIOs: |
| 128 | |
| 129 | /* GPIO INPUT: return zero or nonzero */ |
| 130 | int gpio_get_value(unsigned gpio); |
| 131 | |
| 132 | /* GPIO OUTPUT */ |
| 133 | void gpio_set_value(unsigned gpio, int value); |
| 134 | |
| 135 | The values are boolean, zero for low, nonzero for high. When reading the |
| 136 | value of an output pin, the value returned should be what's seen on the |
| 137 | pin ... that won't always match the specified output value, because of |
| 138 | issues including wire-OR and output latencies. |
| 139 | |
| 140 | The get/set calls have no error returns because "invalid GPIO" should have |
| 141 | been reported earlier in gpio_set_direction(). However, note that not all |
| 142 | platforms can read the value of output pins; those that can't should always |
David Brownell | f5de611 | 2007-02-16 01:27:14 -0800 | [diff] [blame^] | 143 | return zero. Also, using these calls for GPIOs that can't safely be accessed |
| 144 | without sleeping (see below) is an error. |
David Brownell | 4c20386c | 2007-02-12 00:53:11 -0800 | [diff] [blame] | 145 | |
David Brownell | f5de611 | 2007-02-16 01:27:14 -0800 | [diff] [blame^] | 146 | Platform-specific implementations are encouraged to optimize the two |
David Brownell | 4c20386c | 2007-02-12 00:53:11 -0800 | [diff] [blame] | 147 | calls to access the GPIO value in cases where the GPIO number (and for |
| 148 | output, value) are constant. It's normal for them to need only a couple |
| 149 | of instructions in such cases (reading or writing a hardware register), |
| 150 | and not to need spinlocks. Such optimized calls can make bitbanging |
| 151 | applications a lot more efficient (in both space and time) than spending |
| 152 | dozens of instructions on subroutine calls. |
| 153 | |
| 154 | |
| 155 | GPIO access that may sleep |
| 156 | -------------------------- |
| 157 | Some GPIO controllers must be accessed using message based busses like I2C |
| 158 | or SPI. Commands to read or write those GPIO values require waiting to |
| 159 | get to the head of a queue to transmit a command and get its response. |
| 160 | This requires sleeping, which can't be done from inside IRQ handlers. |
| 161 | |
| 162 | Platforms that support this type of GPIO distinguish them from other GPIOs |
| 163 | by returning nonzero from this call: |
| 164 | |
| 165 | int gpio_cansleep(unsigned gpio); |
| 166 | |
| 167 | To access such GPIOs, a different set of accessors is defined: |
| 168 | |
| 169 | /* GPIO INPUT: return zero or nonzero, might sleep */ |
| 170 | int gpio_get_value_cansleep(unsigned gpio); |
| 171 | |
| 172 | /* GPIO OUTPUT, might sleep */ |
| 173 | void gpio_set_value_cansleep(unsigned gpio, int value); |
| 174 | |
| 175 | Other than the fact that these calls might sleep, and will not be ignored |
| 176 | for GPIOs that can't be accessed from IRQ handlers, these calls act the |
| 177 | same as the spinlock-safe calls. |
| 178 | |
| 179 | |
| 180 | Claiming and Releasing GPIOs (OPTIONAL) |
| 181 | --------------------------------------- |
| 182 | To help catch system configuration errors, two calls are defined. |
| 183 | However, many platforms don't currently support this mechanism. |
| 184 | |
| 185 | /* request GPIO, returning 0 or negative errno. |
| 186 | * non-null labels may be useful for diagnostics. |
| 187 | */ |
| 188 | int gpio_request(unsigned gpio, const char *label); |
| 189 | |
| 190 | /* release previously-claimed GPIO */ |
| 191 | void gpio_free(unsigned gpio); |
| 192 | |
| 193 | Passing invalid GPIO numbers to gpio_request() will fail, as will requesting |
| 194 | GPIOs that have already been claimed with that call. The return value of |
| 195 | gpio_request() must be checked. (These calls could sleep.) |
| 196 | |
| 197 | These calls serve two basic purposes. One is marking the signals which |
| 198 | are actually in use as GPIOs, for better diagnostics; systems may have |
| 199 | several hundred potential GPIOs, but often only a dozen are used on any |
| 200 | given board. Another is to catch conflicts between drivers, reporting |
| 201 | errors when drivers wrongly think they have exclusive use of that signal. |
| 202 | |
| 203 | These two calls are optional because not not all current Linux platforms |
| 204 | offer such functionality in their GPIO support; a valid implementation |
| 205 | could return success for all gpio_request() calls. Unlike the other calls, |
| 206 | the state they represent doesn't normally match anything from a hardware |
| 207 | register; it's just a software bitmap which clearly is not necessary for |
| 208 | correct operation of hardware or (bug free) drivers. |
| 209 | |
| 210 | Note that requesting a GPIO does NOT cause it to be configured in any |
| 211 | way; it just marks that GPIO as in use. Separate code must handle any |
| 212 | pin setup (e.g. controlling which pin the GPIO uses, pullup/pulldown). |
| 213 | |
| 214 | |
| 215 | GPIOs mapped to IRQs |
| 216 | -------------------- |
| 217 | GPIO numbers are unsigned integers; so are IRQ numbers. These make up |
| 218 | two logically distinct namespaces (GPIO 0 need not use IRQ 0). You can |
| 219 | map between them using calls like: |
| 220 | |
| 221 | /* map GPIO numbers to IRQ numbers */ |
| 222 | int gpio_to_irq(unsigned gpio); |
| 223 | |
| 224 | /* map IRQ numbers to GPIO numbers */ |
| 225 | int irq_to_gpio(unsigned irq); |
| 226 | |
| 227 | Those return either the corresponding number in the other namespace, or |
| 228 | else a negative errno code if the mapping can't be done. (For example, |
| 229 | some GPIOs can't used as IRQs.) It is an unchecked error to use a GPIO |
| 230 | number that hasn't been marked as an input using gpio_set_direction(), or |
| 231 | to use an IRQ number that didn't originally come from gpio_to_irq(). |
| 232 | |
| 233 | These two mapping calls are expected to cost on the order of a single |
| 234 | addition or subtraction. They're not allowed to sleep. |
| 235 | |
| 236 | Non-error values returned from gpio_to_irq() can be passed to request_irq() |
| 237 | or free_irq(). They will often be stored into IRQ resources for platform |
| 238 | devices, by the board-specific initialization code. Note that IRQ trigger |
| 239 | options are part of the IRQ interface, e.g. IRQF_TRIGGER_FALLING, as are |
| 240 | system wakeup capabilities. |
| 241 | |
| 242 | Non-error values returned from irq_to_gpio() would most commonly be used |
David Brownell | f5de611 | 2007-02-16 01:27:14 -0800 | [diff] [blame^] | 243 | with gpio_get_value(), for example to initialize or update driver state |
| 244 | when the IRQ is edge-triggered. |
David Brownell | 4c20386c | 2007-02-12 00:53:11 -0800 | [diff] [blame] | 245 | |
| 246 | |
| 247 | |
| 248 | What do these conventions omit? |
| 249 | =============================== |
| 250 | One of the biggest things these conventions omit is pin multiplexing, since |
| 251 | this is highly chip-specific and nonportable. One platform might not need |
| 252 | explicit multiplexing; another might have just two options for use of any |
| 253 | given pin; another might have eight options per pin; another might be able |
| 254 | to route a given GPIO to any one of several pins. (Yes, those examples all |
| 255 | come from systems that run Linux today.) |
| 256 | |
| 257 | Related to multiplexing is configuration and enabling of the pullups or |
| 258 | pulldowns integrated on some platforms. Not all platforms support them, |
| 259 | or support them in the same way; and any given board might use external |
| 260 | pullups (or pulldowns) so that the on-chip ones should not be used. |
| 261 | |
| 262 | There are other system-specific mechanisms that are not specified here, |
| 263 | like the aforementioned options for input de-glitching and wire-OR output. |
| 264 | Hardware may support reading or writing GPIOs in gangs, but that's usually |
David Brownell | f5de611 | 2007-02-16 01:27:14 -0800 | [diff] [blame^] | 265 | configuration dependent: for GPIOs sharing the same bank. (GPIOs are |
David Brownell | 4c20386c | 2007-02-12 00:53:11 -0800 | [diff] [blame] | 266 | commonly grouped in banks of 16 or 32, with a given SOC having several such |
David Brownell | f5de611 | 2007-02-16 01:27:14 -0800 | [diff] [blame^] | 267 | banks.) Some systems can trigger IRQs from output GPIOs. Code relying on |
| 268 | such mechanisms will necessarily be nonportable. |
David Brownell | 4c20386c | 2007-02-12 00:53:11 -0800 | [diff] [blame] | 269 | |
| 270 | Dynamic definition of GPIOs is not currently supported; for example, as |
| 271 | a side effect of configuring an add-on board with some GPIO expanders. |
| 272 | |
| 273 | These calls are purely for kernel space, but a userspace API could be built |
| 274 | on top of it. |