Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 1 | /* |
| 2 | * omap iommu: pagetable definitions |
| 3 | * |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 4 | * Copyright (C) 2008-2010 Nokia Corporation |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 5 | * |
| 6 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __PLAT_OMAP_IOMMU_H |
| 14 | #define __PLAT_OMAP_IOMMU_H |
| 15 | |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 16 | /* |
| 17 | * "L2 table" address mask and size definitions. |
| 18 | */ |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 19 | #define IOPGD_SHIFT 20 |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 20 | #define IOPGD_SIZE (1UL << IOPGD_SHIFT) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 21 | #define IOPGD_MASK (~(IOPGD_SIZE - 1)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 22 | |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 23 | /* |
| 24 | * "section" address mask and size definitions. |
| 25 | */ |
| 26 | #define IOSECTION_SHIFT 20 |
| 27 | #define IOSECTION_SIZE (1UL << IOSECTION_SHIFT) |
| 28 | #define IOSECTION_MASK (~(IOSECTION_SIZE - 1)) |
| 29 | |
| 30 | /* |
| 31 | * "supersection" address mask and size definitions. |
| 32 | */ |
| 33 | #define IOSUPER_SHIFT 24 |
| 34 | #define IOSUPER_SIZE (1UL << IOSUPER_SHIFT) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 35 | #define IOSUPER_MASK (~(IOSUPER_SIZE - 1)) |
| 36 | |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 37 | #define PTRS_PER_IOPGD (1UL << (32 - IOPGD_SHIFT)) |
| 38 | #define IOPGD_TABLE_SIZE (PTRS_PER_IOPGD * sizeof(u32)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 39 | |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 40 | /* |
| 41 | * "small page" address mask and size definitions. |
| 42 | */ |
| 43 | #define IOPTE_SHIFT 12 |
| 44 | #define IOPTE_SIZE (1UL << IOPTE_SHIFT) |
| 45 | #define IOPTE_MASK (~(IOPTE_SIZE - 1)) |
| 46 | |
| 47 | /* |
| 48 | * "large page" address mask and size definitions. |
| 49 | */ |
| 50 | #define IOLARGE_SHIFT 16 |
| 51 | #define IOLARGE_SIZE (1UL << IOLARGE_SHIFT) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 52 | #define IOLARGE_MASK (~(IOLARGE_SIZE - 1)) |
| 53 | |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 54 | #define PTRS_PER_IOPTE (1UL << (IOPGD_SHIFT - IOPTE_SHIFT)) |
| 55 | #define IOPTE_TABLE_SIZE (PTRS_PER_IOPTE * sizeof(u32)) |
| 56 | |
| 57 | #define IOPAGE_MASK IOPTE_MASK |
| 58 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame^] | 59 | /** |
| 60 | * omap_iommu_translate() - va to pa translation |
| 61 | * @d: omap iommu descriptor |
| 62 | * @va: virtual address |
| 63 | * @mask: omap iommu descriptor mask |
| 64 | * |
| 65 | * va to pa translation |
| 66 | */ |
| 67 | static inline phys_addr_t omap_iommu_translate(u32 d, u32 va, u32 mask) |
| 68 | { |
| 69 | return (d & mask) | (va & (~mask)); |
| 70 | } |
| 71 | |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 72 | /* |
| 73 | * some descriptor attributes. |
| 74 | */ |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 75 | #define IOPGD_TABLE (1 << 0) |
| 76 | #define IOPGD_SECTION (2 << 0) |
| 77 | #define IOPGD_SUPER (1 << 18 | 2 << 0) |
| 78 | |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 79 | #define iopgd_is_table(x) (((x) & 3) == IOPGD_TABLE) |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame^] | 80 | #define iopgd_is_section(x) (((x) & (1 << 18 | 3)) == IOPGD_SECTION) |
| 81 | #define iopgd_is_super(x) (((x) & (1 << 18 | 3)) == IOPGD_SUPER) |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 82 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 83 | #define IOPTE_SMALL (2 << 0) |
| 84 | #define IOPTE_LARGE (1 << 0) |
| 85 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame^] | 86 | #define iopte_is_small(x) (((x) & 2) == IOPTE_SMALL) |
| 87 | #define iopte_is_large(x) (((x) & 3) == IOPTE_LARGE) |
| 88 | |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 89 | /* to find an entry in a page-table-directory */ |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 90 | #define iopgd_index(da) (((da) >> IOPGD_SHIFT) & (PTRS_PER_IOPGD - 1)) |
| 91 | #define iopgd_offset(obj, da) ((obj)->iopgd + iopgd_index(da)) |
| 92 | |
Hiroshi DOYU | 1249335 | 2010-05-13 09:46:44 +0300 | [diff] [blame] | 93 | #define iopgd_page_paddr(iopgd) (*iopgd & ~((1 << 10) - 1)) |
| 94 | #define iopgd_page_vaddr(iopgd) ((u32 *)phys_to_virt(iopgd_page_paddr(iopgd))) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 95 | |
Hiroshi DOYU | 97ec7d5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 96 | /* to find an entry in the second-level page table. */ |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 97 | #define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1)) |
Hiroshi DOYU | 1249335 | 2010-05-13 09:46:44 +0300 | [diff] [blame] | 98 | #define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 99 | |
| 100 | static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, |
| 101 | u32 flags) |
| 102 | { |
| 103 | memset(e, 0, sizeof(*e)); |
| 104 | |
| 105 | e->da = da; |
| 106 | e->pa = pa; |
| 107 | e->valid = 1; |
| 108 | /* FIXME: add OMAP1 support */ |
| 109 | e->pgsz = flags & MMU_CAM_PGSZ_MASK; |
| 110 | e->endian = flags & MMU_RAM_ENDIAN_MASK; |
| 111 | e->elsz = flags & MMU_RAM_ELSZ_MASK; |
| 112 | e->mixed = flags & MMU_RAM_MIXED_MASK; |
| 113 | |
| 114 | return iopgsz_to_bytes(e->pgsz); |
| 115 | } |
| 116 | |
| 117 | #define to_iommu(dev) \ |
| 118 | (struct iommu *)platform_get_drvdata(to_platform_device(dev)) |
| 119 | |
| 120 | #endif /* __PLAT_OMAP_IOMMU_H */ |