Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> |
| 3 | * Copyright © 2006-2007 Intel Corporation |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | */ |
| 27 | #include <linux/i2c.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 28 | #include <linux/slab.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 29 | #include "drmP.h" |
| 30 | #include "drm.h" |
| 31 | #include "drm_crtc.h" |
| 32 | #include "intel_drv.h" |
| 33 | #include "i915_drm.h" |
| 34 | #include "i915_drv.h" |
| 35 | #include "dvo.h" |
| 36 | |
| 37 | #define SIL164_ADDR 0x38 |
| 38 | #define CH7xxx_ADDR 0x76 |
| 39 | #define TFP410_ADDR 0x38 |
Thomas Richter | 7434a25 | 2012-07-18 19:22:30 +0200 | [diff] [blame] | 40 | #define NS2501_ADDR 0x38 |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 41 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 42 | static const struct intel_dvo_device intel_dvo_devices[] = { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 43 | { |
| 44 | .type = INTEL_DVO_CHIP_TMDS, |
| 45 | .name = "sil164", |
| 46 | .dvo_reg = DVOC, |
| 47 | .slave_addr = SIL164_ADDR, |
| 48 | .dev_ops = &sil164_ops, |
| 49 | }, |
| 50 | { |
| 51 | .type = INTEL_DVO_CHIP_TMDS, |
| 52 | .name = "ch7xxx", |
| 53 | .dvo_reg = DVOC, |
| 54 | .slave_addr = CH7xxx_ADDR, |
| 55 | .dev_ops = &ch7xxx_ops, |
| 56 | }, |
| 57 | { |
| 58 | .type = INTEL_DVO_CHIP_LVDS, |
| 59 | .name = "ivch", |
| 60 | .dvo_reg = DVOA, |
| 61 | .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ |
| 62 | .dev_ops = &ivch_ops, |
| 63 | }, |
| 64 | { |
| 65 | .type = INTEL_DVO_CHIP_TMDS, |
| 66 | .name = "tfp410", |
| 67 | .dvo_reg = DVOC, |
| 68 | .slave_addr = TFP410_ADDR, |
| 69 | .dev_ops = &tfp410_ops, |
| 70 | }, |
| 71 | { |
| 72 | .type = INTEL_DVO_CHIP_LVDS, |
| 73 | .name = "ch7017", |
| 74 | .dvo_reg = DVOC, |
| 75 | .slave_addr = 0x75, |
Chris Wilson | a6b17b4 | 2010-09-21 12:34:25 +0100 | [diff] [blame] | 76 | .gpio = GMBUS_PORT_DPB, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 77 | .dev_ops = &ch7017_ops, |
Thomas Richter | 7434a25 | 2012-07-18 19:22:30 +0200 | [diff] [blame] | 78 | }, |
| 79 | { |
| 80 | .type = INTEL_DVO_CHIP_TMDS, |
| 81 | .name = "ns2501", |
| 82 | .dvo_reg = DVOC, |
| 83 | .slave_addr = NS2501_ADDR, |
| 84 | .dev_ops = &ns2501_ops, |
| 85 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 86 | }; |
| 87 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 88 | struct intel_dvo { |
| 89 | struct intel_encoder base; |
| 90 | |
| 91 | struct intel_dvo_device dev; |
| 92 | |
| 93 | struct drm_display_mode *panel_fixed_mode; |
| 94 | bool panel_wants_dither; |
| 95 | }; |
| 96 | |
| 97 | static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder) |
| 98 | { |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 99 | return container_of(encoder, struct intel_dvo, base.base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 100 | } |
| 101 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 102 | static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) |
| 103 | { |
| 104 | return container_of(intel_attached_encoder(connector), |
| 105 | struct intel_dvo, base); |
| 106 | } |
| 107 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 108 | static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) |
| 109 | { |
| 110 | struct drm_i915_private *dev_priv = encoder->dev->dev_private; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 111 | struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder); |
| 112 | u32 dvo_reg = intel_dvo->dev.dvo_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 113 | u32 temp = I915_READ(dvo_reg); |
| 114 | |
| 115 | if (mode == DRM_MODE_DPMS_ON) { |
| 116 | I915_WRITE(dvo_reg, temp | DVO_ENABLE); |
| 117 | I915_READ(dvo_reg); |
Daniel Vetter | fac3274 | 2012-08-12 19:27:12 +0200 | [diff] [blame^] | 118 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 119 | } else { |
Daniel Vetter | fac3274 | 2012-08-12 19:27:12 +0200 | [diff] [blame^] | 120 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 121 | I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); |
| 122 | I915_READ(dvo_reg); |
| 123 | } |
| 124 | } |
| 125 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 126 | static int intel_dvo_mode_valid(struct drm_connector *connector, |
| 127 | struct drm_display_mode *mode) |
| 128 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 129 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 130 | |
| 131 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
| 132 | return MODE_NO_DBLESCAN; |
| 133 | |
| 134 | /* XXX: Validate clock range */ |
| 135 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 136 | if (intel_dvo->panel_fixed_mode) { |
| 137 | if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 138 | return MODE_PANEL; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 139 | if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 140 | return MODE_PANEL; |
| 141 | } |
| 142 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 143 | return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 144 | } |
| 145 | |
| 146 | static bool intel_dvo_mode_fixup(struct drm_encoder *encoder, |
Laurent Pinchart | e811f5a | 2012-07-17 17:56:50 +0200 | [diff] [blame] | 147 | const struct drm_display_mode *mode, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 148 | struct drm_display_mode *adjusted_mode) |
| 149 | { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 150 | struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 151 | |
| 152 | /* If we have timings from the BIOS for the panel, put them in |
| 153 | * to the adjusted mode. The CRTC will be set up for this mode, |
| 154 | * with the panel scaling set up to source from the H/VDisplay |
| 155 | * of the original mode. |
| 156 | */ |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 157 | if (intel_dvo->panel_fixed_mode != NULL) { |
| 158 | #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 159 | C(hdisplay); |
| 160 | C(hsync_start); |
| 161 | C(hsync_end); |
| 162 | C(htotal); |
| 163 | C(vdisplay); |
| 164 | C(vsync_start); |
| 165 | C(vsync_end); |
| 166 | C(vtotal); |
| 167 | C(clock); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 168 | #undef C |
| 169 | } |
| 170 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 171 | if (intel_dvo->dev.dev_ops->mode_fixup) |
| 172 | return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 173 | |
| 174 | return true; |
| 175 | } |
| 176 | |
| 177 | static void intel_dvo_mode_set(struct drm_encoder *encoder, |
| 178 | struct drm_display_mode *mode, |
| 179 | struct drm_display_mode *adjusted_mode) |
| 180 | { |
| 181 | struct drm_device *dev = encoder->dev; |
| 182 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 183 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 184 | struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 185 | int pipe = intel_crtc->pipe; |
| 186 | u32 dvo_val; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 187 | u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 188 | int dpll_reg = DPLL(pipe); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 189 | |
| 190 | switch (dvo_reg) { |
| 191 | case DVOA: |
| 192 | default: |
| 193 | dvo_srcdim_reg = DVOA_SRCDIM; |
| 194 | break; |
| 195 | case DVOB: |
| 196 | dvo_srcdim_reg = DVOB_SRCDIM; |
| 197 | break; |
| 198 | case DVOC: |
| 199 | dvo_srcdim_reg = DVOC_SRCDIM; |
| 200 | break; |
| 201 | } |
| 202 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 203 | intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 204 | |
| 205 | /* Save the data order, since I don't know what it should be set to. */ |
| 206 | dvo_val = I915_READ(dvo_reg) & |
| 207 | (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); |
| 208 | dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | |
| 209 | DVO_BLANK_ACTIVE_HIGH; |
| 210 | |
| 211 | if (pipe == 1) |
| 212 | dvo_val |= DVO_PIPE_B_SELECT; |
| 213 | dvo_val |= DVO_PIPE_STALL; |
| 214 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
| 215 | dvo_val |= DVO_HSYNC_ACTIVE_HIGH; |
| 216 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
| 217 | dvo_val |= DVO_VSYNC_ACTIVE_HIGH; |
| 218 | |
| 219 | I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED); |
| 220 | |
| 221 | /*I915_WRITE(DVOB_SRCDIM, |
| 222 | (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | |
| 223 | (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ |
| 224 | I915_WRITE(dvo_srcdim_reg, |
| 225 | (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | |
| 226 | (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); |
| 227 | /*I915_WRITE(DVOB, dvo_val);*/ |
| 228 | I915_WRITE(dvo_reg, dvo_val); |
| 229 | } |
| 230 | |
| 231 | /** |
| 232 | * Detect the output connection on our DVO device. |
| 233 | * |
| 234 | * Unimplemented. |
| 235 | */ |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 236 | static enum drm_connector_status |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 237 | intel_dvo_detect(struct drm_connector *connector, bool force) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 238 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 239 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 240 | return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 241 | } |
| 242 | |
| 243 | static int intel_dvo_get_modes(struct drm_connector *connector) |
| 244 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 245 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 246 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 247 | |
| 248 | /* We should probably have an i2c driver get_modes function for those |
| 249 | * devices which will have a fixed set of modes determined by the chip |
| 250 | * (TV-out, for example), but for now with just TMDS and LVDS, |
| 251 | * that's not the case. |
| 252 | */ |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 253 | intel_ddc_get_modes(connector, |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 254 | intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 255 | if (!list_empty(&connector->probed_modes)) |
| 256 | return 1; |
| 257 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 258 | if (intel_dvo->panel_fixed_mode != NULL) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 259 | struct drm_display_mode *mode; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 260 | mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 261 | if (mode) { |
| 262 | drm_mode_probed_add(connector, mode); |
| 263 | return 1; |
| 264 | } |
| 265 | } |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 266 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 267 | return 0; |
| 268 | } |
| 269 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 270 | static void intel_dvo_destroy(struct drm_connector *connector) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 271 | { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 272 | drm_sysfs_connector_remove(connector); |
| 273 | drm_connector_cleanup(connector); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 274 | kfree(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 275 | } |
| 276 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 277 | static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = { |
| 278 | .dpms = intel_dvo_dpms, |
| 279 | .mode_fixup = intel_dvo_mode_fixup, |
| 280 | .prepare = intel_encoder_prepare, |
| 281 | .mode_set = intel_dvo_mode_set, |
| 282 | .commit = intel_encoder_commit, |
| 283 | }; |
| 284 | |
| 285 | static const struct drm_connector_funcs intel_dvo_connector_funcs = { |
Keith Packard | c9fb15f | 2009-05-30 20:42:28 -0700 | [diff] [blame] | 286 | .dpms = drm_helper_connector_dpms, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 287 | .detect = intel_dvo_detect, |
| 288 | .destroy = intel_dvo_destroy, |
| 289 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 290 | }; |
| 291 | |
| 292 | static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { |
| 293 | .mode_valid = intel_dvo_mode_valid, |
| 294 | .get_modes = intel_dvo_get_modes, |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 295 | .best_encoder = intel_best_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 296 | }; |
| 297 | |
Hannes Eder | b358d0a | 2008-12-18 21:18:47 +0100 | [diff] [blame] | 298 | static void intel_dvo_enc_destroy(struct drm_encoder *encoder) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 299 | { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 300 | struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 301 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 302 | if (intel_dvo->dev.dev_ops->destroy) |
| 303 | intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); |
| 304 | |
| 305 | kfree(intel_dvo->panel_fixed_mode); |
| 306 | |
| 307 | intel_encoder_destroy(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 308 | } |
| 309 | |
| 310 | static const struct drm_encoder_funcs intel_dvo_enc_funcs = { |
| 311 | .destroy = intel_dvo_enc_destroy, |
| 312 | }; |
| 313 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 314 | /** |
| 315 | * Attempts to get a fixed panel timing for LVDS (currently only the i830). |
| 316 | * |
| 317 | * Other chips with DVO LVDS will need to extend this to deal with the LVDS |
| 318 | * chip being on DVOB/C and having multiple pipes. |
| 319 | */ |
| 320 | static struct drm_display_mode * |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 321 | intel_dvo_get_current_mode(struct drm_connector *connector) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 322 | { |
| 323 | struct drm_device *dev = connector->dev; |
| 324 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 325 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 326 | uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 327 | struct drm_display_mode *mode = NULL; |
| 328 | |
| 329 | /* If the DVO port is active, that'll be the LVDS, so we can pull out |
| 330 | * its timings to get how the BIOS set up the panel. |
| 331 | */ |
| 332 | if (dvo_val & DVO_ENABLE) { |
| 333 | struct drm_crtc *crtc; |
| 334 | int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; |
| 335 | |
Chris Wilson | f875c15 | 2010-09-09 15:44:14 +0100 | [diff] [blame] | 336 | crtc = intel_get_crtc_for_pipe(dev, pipe); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 337 | if (crtc) { |
| 338 | mode = intel_crtc_mode_get(dev, crtc); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 339 | if (mode) { |
| 340 | mode->type |= DRM_MODE_TYPE_PREFERRED; |
| 341 | if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) |
| 342 | mode->flags |= DRM_MODE_FLAG_PHSYNC; |
| 343 | if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) |
| 344 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
| 345 | } |
| 346 | } |
| 347 | } |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 348 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 349 | return mode; |
| 350 | } |
| 351 | |
| 352 | void intel_dvo_init(struct drm_device *dev) |
| 353 | { |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 354 | struct drm_i915_private *dev_priv = dev->dev_private; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 355 | struct intel_encoder *intel_encoder; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 356 | struct intel_dvo *intel_dvo; |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 357 | struct intel_connector *intel_connector; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 358 | int i; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 359 | int encoder_type = DRM_MODE_ENCODER_NONE; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 360 | |
| 361 | intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL); |
| 362 | if (!intel_dvo) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 363 | return; |
| 364 | |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 365 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
| 366 | if (!intel_connector) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 367 | kfree(intel_dvo); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 368 | return; |
| 369 | } |
| 370 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 371 | intel_encoder = &intel_dvo->base; |
Chris Wilson | 373a3cf | 2010-09-15 12:03:59 +0100 | [diff] [blame] | 372 | drm_encoder_init(dev, &intel_encoder->base, |
| 373 | &intel_dvo_enc_funcs, encoder_type); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 374 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 375 | /* Now, try to find a controller */ |
| 376 | for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 377 | struct drm_connector *connector = &intel_connector->base; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 378 | const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 379 | struct i2c_adapter *i2c; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 380 | int gpio; |
| 381 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 382 | /* Allow the I2C driver info to specify the GPIO to be used in |
| 383 | * special cases, but otherwise default to what's defined |
| 384 | * in the spec. |
| 385 | */ |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 386 | if (intel_gmbus_is_port_valid(dvo->gpio)) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 387 | gpio = dvo->gpio; |
| 388 | else if (dvo->type == INTEL_DVO_CHIP_LVDS) |
Chris Wilson | f573c66 | 2010-09-28 23:34:44 +0100 | [diff] [blame] | 389 | gpio = GMBUS_PORT_SSC; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 390 | else |
Chris Wilson | a6b17b4 | 2010-09-21 12:34:25 +0100 | [diff] [blame] | 391 | gpio = GMBUS_PORT_DPB; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 392 | |
| 393 | /* Set up the I2C bus necessary for the chip we're probing. |
| 394 | * It appears that everything is on GPIOE except for panels |
| 395 | * on i830 laptops, which are on GPIOB (DVOA). |
| 396 | */ |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 397 | i2c = intel_gmbus_get_adapter(dev_priv, gpio); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 398 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 399 | intel_dvo->dev = *dvo; |
Chris Wilson | f573c66 | 2010-09-28 23:34:44 +0100 | [diff] [blame] | 400 | if (!dvo->dev_ops->init(&intel_dvo->dev, i2c)) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 401 | continue; |
| 402 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 403 | intel_encoder->type = INTEL_OUTPUT_DVO; |
| 404 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 405 | switch (dvo->type) { |
| 406 | case INTEL_DVO_CHIP_TMDS: |
Daniel Vetter | 66a9278 | 2012-07-12 20:08:18 +0200 | [diff] [blame] | 407 | intel_encoder->cloneable = true; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 408 | drm_connector_init(dev, connector, |
| 409 | &intel_dvo_connector_funcs, |
| 410 | DRM_MODE_CONNECTOR_DVII); |
| 411 | encoder_type = DRM_MODE_ENCODER_TMDS; |
| 412 | break; |
| 413 | case INTEL_DVO_CHIP_LVDS: |
Daniel Vetter | 66a9278 | 2012-07-12 20:08:18 +0200 | [diff] [blame] | 414 | intel_encoder->cloneable = false; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 415 | drm_connector_init(dev, connector, |
| 416 | &intel_dvo_connector_funcs, |
| 417 | DRM_MODE_CONNECTOR_LVDS); |
| 418 | encoder_type = DRM_MODE_ENCODER_LVDS; |
| 419 | break; |
| 420 | } |
| 421 | |
| 422 | drm_connector_helper_add(connector, |
| 423 | &intel_dvo_connector_helper_funcs); |
| 424 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
| 425 | connector->interlace_allowed = false; |
| 426 | connector->doublescan_allowed = false; |
| 427 | |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 428 | drm_encoder_helper_add(&intel_encoder->base, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 429 | &intel_dvo_helper_funcs); |
| 430 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 431 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 432 | if (dvo->type == INTEL_DVO_CHIP_LVDS) { |
| 433 | /* For our LVDS chipsets, we should hopefully be able |
| 434 | * to dig the fixed panel mode out of the BIOS data. |
| 435 | * However, it's in a different format from the BIOS |
| 436 | * data on chipsets with integrated LVDS (stored in AIM |
| 437 | * headers, likely), so for now, just get the current |
| 438 | * mode being output through DVO. |
| 439 | */ |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 440 | intel_dvo->panel_fixed_mode = |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 441 | intel_dvo_get_current_mode(connector); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 442 | intel_dvo->panel_wants_dither = true; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 443 | } |
| 444 | |
| 445 | drm_sysfs_connector_add(connector); |
| 446 | return; |
| 447 | } |
| 448 | |
Chris Wilson | 373a3cf | 2010-09-15 12:03:59 +0100 | [diff] [blame] | 449 | drm_encoder_cleanup(&intel_encoder->base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 450 | kfree(intel_dvo); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 451 | kfree(intel_connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 452 | } |