blob: 41d84d9a2316268e1dec9b7b288d42753339db2d [file] [log] [blame]
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +02001/*
2 * Setup code for AT91SAM Evaluation Kits with Device Tree support
3 *
4 * Covers: * AT91SAM9G45-EKES board
5 * * AT91SAM9M10-EKES board
6 * * AT91SAM9M10G45-EK board
7 *
8 * Copyright (C) 2011 Atmel,
9 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
10 *
11 * Licensed under GPLv2 or later.
12 */
13
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/gpio.h>
18#include <linux/irqdomain.h>
19#include <linux/of_irq.h>
20#include <linux/of_platform.h>
21
22#include <mach/hardware.h>
23#include <mach/board.h>
24#include <mach/system_rev.h>
25#include <mach/at91sam9_smc.h>
26
27#include <asm/setup.h>
28#include <asm/irq.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31#include <asm/mach/irq.h>
32
33#include "sam9_smc.h"
34#include "generic.h"
35
36
37static void __init ek_init_early(void)
38{
39 /* Initialize processor: 12.000 MHz crystal */
40 at91_initialize(12000000);
41
42 /* DGBU on ttyS0. (Rx & Tx only) */
43 at91_register_uart(0, 0, 0);
44
45 /* set serial console to ttyS0 (ie, DBGU) */
46 at91_set_serial_console(0);
47}
48
49/* det_pin is not connected */
50static struct atmel_nand_data __initdata ek_nand_data = {
51 .ale = 21,
52 .cle = 22,
53 .rdy_pin = AT91_PIN_PC8,
54 .enable_pin = AT91_PIN_PC14,
55};
56
57static struct sam9_smc_config __initdata ek_nand_smc_config = {
58 .ncs_read_setup = 0,
59 .nrd_setup = 2,
60 .ncs_write_setup = 0,
61 .nwe_setup = 2,
62
63 .ncs_read_pulse = 4,
64 .nrd_pulse = 4,
65 .ncs_write_pulse = 4,
66 .nwe_pulse = 4,
67
68 .read_cycle = 7,
69 .write_cycle = 7,
70
71 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
72 .tdf_cycles = 3,
73};
74
75static void __init ek_add_device_nand(void)
76{
77 ek_nand_data.bus_width_16 = board_have_nand_16bit();
78 /* setup bus-width (8 or 16) */
79 if (ek_nand_data.bus_width_16)
80 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
81 else
82 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
83
84 /* configure chip-select 3 (NAND) */
Jean-Christophe PLAGNIOL-VILLARDfaee0cc2011-10-14 01:37:09 +080085 sam9_smc_configure(0, 3, &ek_nand_smc_config);
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020086
87 at91_add_device_nand(&ek_nand_data);
88}
89
90static const struct of_device_id aic_of_match[] __initconst = {
91 { .compatible = "atmel,at91rm9200-aic", },
92 {},
93};
94
95static void __init at91_dt_init_irq(void)
96{
97 irq_domain_generate_simple(aic_of_match, 0xfffff000, 0);
98 at91_init_irq_default();
99}
100
101static void __init at91_dt_device_init(void)
102{
103 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
104
105 /* NAND */
106 ek_add_device_nand();
107}
108
109static const char *at91_dt_board_compat[] __initdata = {
110 "atmel,at91sam9m10g45ek",
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800111 "calao,usb-a9g20",
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200112 NULL
113};
114
115DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
116 /* Maintainer: Atmel */
117 .timer = &at91sam926x_timer,
118 .map_io = at91_map_io,
119 .init_early = ek_init_early,
120 .init_irq = at91_dt_init_irq,
121 .init_machine = at91_dt_device_init,
122 .dt_compat = at91_dt_board_compat,
123MACHINE_END