Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | * Driver for Solarflare Solarstorm network controllers and boards |
| 3 | * Copyright 2006-2008 Solarflare Communications Inc. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published |
| 7 | * by the Free Software Foundation, incorporated herein by reference. |
| 8 | */ |
| 9 | /* |
| 10 | * Useful functions for working with MDIO clause 45 PHYs |
| 11 | */ |
| 12 | #include <linux/types.h> |
| 13 | #include <linux/ethtool.h> |
| 14 | #include <linux/delay.h> |
| 15 | #include "net_driver.h" |
| 16 | #include "mdio_10g.h" |
Steve Hodgson | 8b9dc8d | 2009-01-29 17:49:09 +0000 | [diff] [blame] | 17 | #include "workarounds.h" |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 18 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 19 | unsigned efx_mdio_id_oui(u32 id) |
Ben Hutchings | 3f39a5e | 2009-02-27 13:07:15 +0000 | [diff] [blame] | 20 | { |
| 21 | unsigned oui = 0; |
| 22 | int i; |
| 23 | |
| 24 | /* The bits of the OUI are designated a..x, with a=0 and b variable. |
| 25 | * In the id register c is the MSB but the OUI is conventionally |
| 26 | * written as bytes h..a, p..i, x..q. Reorder the bits accordingly. */ |
| 27 | for (i = 0; i < 22; ++i) |
| 28 | if (id & (1 << (i + 10))) |
| 29 | oui |= 1 << (i ^ 7); |
| 30 | |
| 31 | return oui; |
| 32 | } |
| 33 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 34 | int efx_mdio_reset_mmd(struct efx_nic *port, int mmd, |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 35 | int spins, int spintime) |
| 36 | { |
| 37 | u32 ctrl; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 38 | |
| 39 | /* Catch callers passing values in the wrong units (or just silly) */ |
| 40 | EFX_BUG_ON_PARANOID(spins * spintime >= 5000); |
| 41 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 42 | efx_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 43 | /* Wait for the reset bit to clear. */ |
| 44 | do { |
| 45 | msleep(spintime); |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 46 | ctrl = efx_mdio_read(port, mmd, MDIO_CTRL1); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 47 | spins--; |
| 48 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 49 | } while (spins && (ctrl & MDIO_CTRL1_RESET)); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 50 | |
| 51 | return spins ? spins : -ETIMEDOUT; |
| 52 | } |
| 53 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 54 | static int efx_mdio_check_mmd(struct efx_nic *efx, int mmd, int fault_fatal) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 55 | { |
| 56 | int status; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 57 | |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 58 | if (LOOPBACK_INTERNAL(efx)) |
| 59 | return 0; |
| 60 | |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 61 | if (mmd != MDIO_MMD_AN) { |
| 62 | /* Read MMD STATUS2 to check it is responding. */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 63 | status = efx_mdio_read(efx, mmd, MDIO_STAT2); |
| 64 | if ((status & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL) { |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 65 | EFX_ERR(efx, "PHY MMD %d not responding.\n", mmd); |
| 66 | return -EIO; |
| 67 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 68 | } |
| 69 | |
| 70 | /* Read MMD STATUS 1 to check for fault. */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 71 | status = efx_mdio_read(efx, mmd, MDIO_STAT1); |
| 72 | if (status & MDIO_STAT1_FAULT) { |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 73 | if (fault_fatal) { |
| 74 | EFX_ERR(efx, "PHY MMD %d reporting fatal" |
| 75 | " fault: status %x\n", mmd, status); |
| 76 | return -EIO; |
| 77 | } else { |
| 78 | EFX_LOG(efx, "PHY MMD %d reporting status" |
| 79 | " %x (expected)\n", mmd, status); |
| 80 | } |
| 81 | } |
| 82 | return 0; |
| 83 | } |
| 84 | |
| 85 | /* This ought to be ridiculous overkill. We expect it to fail rarely */ |
| 86 | #define MDIO45_RESET_TIME 1000 /* ms */ |
| 87 | #define MDIO45_RESET_ITERS 100 |
| 88 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 89 | int efx_mdio_wait_reset_mmds(struct efx_nic *efx, unsigned int mmd_mask) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 90 | { |
| 91 | const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS; |
| 92 | int tries = MDIO45_RESET_ITERS; |
| 93 | int rc = 0; |
| 94 | int in_reset; |
| 95 | |
| 96 | while (tries) { |
| 97 | int mask = mmd_mask; |
| 98 | int mmd = 0; |
| 99 | int stat; |
| 100 | in_reset = 0; |
| 101 | while (mask) { |
| 102 | if (mask & 1) { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 103 | stat = efx_mdio_read(efx, mmd, MDIO_CTRL1); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 104 | if (stat < 0) { |
| 105 | EFX_ERR(efx, "failed to read status of" |
| 106 | " MMD %d\n", mmd); |
| 107 | return -EIO; |
| 108 | } |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 109 | if (stat & MDIO_CTRL1_RESET) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 110 | in_reset |= (1 << mmd); |
| 111 | } |
| 112 | mask = mask >> 1; |
| 113 | mmd++; |
| 114 | } |
| 115 | if (!in_reset) |
| 116 | break; |
| 117 | tries--; |
| 118 | msleep(spintime); |
| 119 | } |
| 120 | if (in_reset != 0) { |
| 121 | EFX_ERR(efx, "not all MMDs came out of reset in time." |
| 122 | " MMDs still in reset: %x\n", in_reset); |
| 123 | rc = -ETIMEDOUT; |
| 124 | } |
| 125 | return rc; |
| 126 | } |
| 127 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 128 | int efx_mdio_check_mmds(struct efx_nic *efx, |
| 129 | unsigned int mmd_mask, unsigned int fatal_mask) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 130 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 131 | int mmd = 0, probe_mmd, devs1, devs2; |
Ben Hutchings | 27dd2ca | 2008-12-12 21:44:14 -0800 | [diff] [blame] | 132 | u32 devices; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 133 | |
| 134 | /* Historically we have probed the PHYXS to find out what devices are |
| 135 | * present,but that doesn't work so well if the PHYXS isn't expected |
| 136 | * to exist, if so just find the first item in the list supplied. */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 137 | probe_mmd = (mmd_mask & MDIO_DEVS_PHYXS) ? MDIO_MMD_PHYXS : |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 138 | __ffs(mmd_mask); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 139 | |
| 140 | /* Check all the expected MMDs are present */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 141 | devs1 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS1); |
| 142 | devs2 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS2); |
| 143 | if (devs1 < 0 || devs2 < 0) { |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 144 | EFX_ERR(efx, "failed to read devices present\n"); |
| 145 | return -EIO; |
| 146 | } |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 147 | devices = devs1 | (devs2 << 16); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 148 | if ((devices & mmd_mask) != mmd_mask) { |
| 149 | EFX_ERR(efx, "required MMDs not present: got %x, " |
| 150 | "wanted %x\n", devices, mmd_mask); |
| 151 | return -ENODEV; |
| 152 | } |
| 153 | EFX_TRACE(efx, "Devices present: %x\n", devices); |
| 154 | |
| 155 | /* Check all required MMDs are responding and happy. */ |
| 156 | while (mmd_mask) { |
| 157 | if (mmd_mask & 1) { |
| 158 | int fault_fatal = fatal_mask & 1; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 159 | if (efx_mdio_check_mmd(efx, mmd, fault_fatal)) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 160 | return -EIO; |
| 161 | } |
| 162 | mmd_mask = mmd_mask >> 1; |
| 163 | fatal_mask = fatal_mask >> 1; |
| 164 | mmd++; |
| 165 | } |
| 166 | |
| 167 | return 0; |
| 168 | } |
| 169 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 170 | bool efx_mdio_links_ok(struct efx_nic *efx, unsigned int mmd_mask) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 171 | { |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 172 | /* If the port is in loopback, then we should only consider a subset |
| 173 | * of mmd's */ |
| 174 | if (LOOPBACK_INTERNAL(efx)) |
Ben Hutchings | dc8cfa5 | 2008-09-01 12:46:50 +0100 | [diff] [blame] | 175 | return true; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 176 | else if (efx->loopback_mode == LOOPBACK_NETWORK) |
Ben Hutchings | dc8cfa5 | 2008-09-01 12:46:50 +0100 | [diff] [blame] | 177 | return false; |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 178 | else if (efx_phy_mode_disabled(efx->phy_mode)) |
| 179 | return false; |
Steve Hodgson | 6779776 | 2009-01-29 17:51:15 +0000 | [diff] [blame] | 180 | else if (efx->loopback_mode == LOOPBACK_PHYXS) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 181 | mmd_mask &= ~(MDIO_DEVS_PHYXS | |
| 182 | MDIO_DEVS_PCS | |
| 183 | MDIO_DEVS_PMAPMD | |
| 184 | MDIO_DEVS_AN); |
Steve Hodgson | 6779776 | 2009-01-29 17:51:15 +0000 | [diff] [blame] | 185 | else if (efx->loopback_mode == LOOPBACK_PCS) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 186 | mmd_mask &= ~(MDIO_DEVS_PCS | |
| 187 | MDIO_DEVS_PMAPMD | |
| 188 | MDIO_DEVS_AN); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 189 | else if (efx->loopback_mode == LOOPBACK_PMAPMD) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 190 | mmd_mask &= ~(MDIO_DEVS_PMAPMD | |
| 191 | MDIO_DEVS_AN); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 192 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 193 | return mdio45_links_ok(&efx->mdio, mmd_mask); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 194 | } |
| 195 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 196 | void efx_mdio_transmit_disable(struct efx_nic *efx) |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 197 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 198 | efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, |
| 199 | MDIO_PMA_TXDIS, MDIO_PMD_TXDIS_GLOBAL, |
| 200 | efx->phy_mode & PHY_MODE_TX_DISABLED); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 201 | } |
| 202 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 203 | void efx_mdio_phy_reconfigure(struct efx_nic *efx) |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 204 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 205 | efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, |
| 206 | MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK, |
| 207 | efx->loopback_mode == LOOPBACK_PMAPMD); |
| 208 | efx_mdio_set_flag(efx, MDIO_MMD_PCS, |
| 209 | MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK, |
| 210 | efx->loopback_mode == LOOPBACK_PCS); |
| 211 | efx_mdio_set_flag(efx, MDIO_MMD_PHYXS, |
| 212 | MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK, |
| 213 | efx->loopback_mode == LOOPBACK_NETWORK); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 214 | } |
| 215 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 216 | static void efx_mdio_set_mmd_lpower(struct efx_nic *efx, |
| 217 | int lpower, int mmd) |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 218 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 219 | int stat = efx_mdio_read(efx, mmd, MDIO_STAT1); |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 220 | |
| 221 | EFX_TRACE(efx, "Setting low power mode for MMD %d to %d\n", |
| 222 | mmd, lpower); |
| 223 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 224 | if (stat & MDIO_STAT1_LPOWERABLE) { |
| 225 | efx_mdio_set_flag(efx, mmd, MDIO_CTRL1, |
| 226 | MDIO_CTRL1_LPOWER, lpower); |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 227 | } |
| 228 | } |
| 229 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 230 | void efx_mdio_set_mmds_lpower(struct efx_nic *efx, |
| 231 | int low_power, unsigned int mmd_mask) |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 232 | { |
| 233 | int mmd = 0; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 234 | mmd_mask &= ~MDIO_DEVS_AN; |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 235 | while (mmd_mask) { |
| 236 | if (mmd_mask & 1) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 237 | efx_mdio_set_mmd_lpower(efx, low_power, mmd); |
Ben Hutchings | 3e133c4 | 2008-11-04 20:34:56 +0000 | [diff] [blame] | 238 | mmd_mask = (mmd_mask >> 1); |
| 239 | mmd++; |
| 240 | } |
| 241 | } |
| 242 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 243 | /** |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 244 | * efx_mdio_set_settings - Set (some of) the PHY settings over MDIO. |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 245 | * @efx: Efx NIC |
| 246 | * @ecmd: New settings |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 247 | */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 248 | int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 249 | { |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 250 | struct ethtool_cmd prev; |
Ben Hutchings | fc2b5e6 | 2009-10-23 08:33:27 +0000 | [diff] [blame^] | 251 | bool xnp; |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 252 | int reg; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 253 | |
| 254 | efx->phy_op->get_settings(efx, &prev); |
| 255 | |
| 256 | if (ecmd->advertising == prev.advertising && |
| 257 | ecmd->speed == prev.speed && |
| 258 | ecmd->duplex == prev.duplex && |
| 259 | ecmd->port == prev.port && |
| 260 | ecmd->autoneg == prev.autoneg) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 261 | return 0; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 262 | |
| 263 | /* We can only change these settings for -T PHYs */ |
| 264 | if (prev.port != PORT_TP || ecmd->port != PORT_TP) |
| 265 | return -EINVAL; |
| 266 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 267 | /* Check that PHY supports these settings */ |
Ben Hutchings | fc2b5e6 | 2009-10-23 08:33:27 +0000 | [diff] [blame^] | 268 | if (!ecmd->autoneg || |
| 269 | (ecmd->advertising | SUPPORTED_Autoneg) & ~prev.supported) |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 270 | return -EINVAL; |
| 271 | |
Ben Hutchings | fc2b5e6 | 2009-10-23 08:33:27 +0000 | [diff] [blame^] | 272 | xnp = (ecmd->advertising & ADVERTISED_10000baseT_Full |
| 273 | || EFX_WORKAROUND_13204(efx)); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 274 | |
Ben Hutchings | fc2b5e6 | 2009-10-23 08:33:27 +0000 | [diff] [blame^] | 275 | /* Set up the base page */ |
| 276 | reg = ADVERTISE_CSMA; |
| 277 | if (ecmd->advertising & ADVERTISED_10baseT_Half) |
| 278 | reg |= ADVERTISE_10HALF; |
| 279 | if (ecmd->advertising & ADVERTISED_10baseT_Full) |
| 280 | reg |= ADVERTISE_10FULL; |
| 281 | if (ecmd->advertising & ADVERTISED_100baseT_Half) |
| 282 | reg |= ADVERTISE_100HALF; |
| 283 | if (ecmd->advertising & ADVERTISED_100baseT_Full) |
| 284 | reg |= ADVERTISE_100FULL; |
| 285 | if (xnp) |
| 286 | reg |= ADVERTISE_RESV; |
| 287 | else if (ecmd->advertising & (ADVERTISED_1000baseT_Half | |
| 288 | ADVERTISED_1000baseT_Full)) |
| 289 | reg |= ADVERTISE_NPAGE; |
| 290 | reg |= mii_advertise_flowctrl(efx->wanted_fc); |
| 291 | efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 292 | |
Ben Hutchings | fc2b5e6 | 2009-10-23 08:33:27 +0000 | [diff] [blame^] | 293 | /* Set up the (extended) next page if necessary */ |
| 294 | if (efx->phy_op->set_npage_adv) |
| 295 | efx->phy_op->set_npage_adv(efx, ecmd->advertising); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 296 | |
Ben Hutchings | fc2b5e6 | 2009-10-23 08:33:27 +0000 | [diff] [blame^] | 297 | /* Enable and restart AN */ |
| 298 | reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1); |
| 299 | reg |= MDIO_AN_CTRL1_ENABLE; |
| 300 | if (!(EFX_WORKAROUND_15195(efx) && |
| 301 | LOOPBACK_MASK(efx) & efx->phy_op->loopbacks)) |
| 302 | reg |= MDIO_AN_CTRL1_RESTART; |
| 303 | if (xnp) |
| 304 | reg |= MDIO_AN_CTRL1_XNP; |
| 305 | else |
| 306 | reg &= ~MDIO_AN_CTRL1_XNP; |
| 307 | efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 308 | |
| 309 | return 0; |
| 310 | } |
| 311 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 312 | enum efx_fc_type efx_mdio_get_pause(struct efx_nic *efx) |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 313 | { |
Ben Hutchings | 18ea024 | 2009-10-23 08:33:17 +0000 | [diff] [blame] | 314 | BUILD_BUG_ON(EFX_FC_AUTO & (EFX_FC_RX | EFX_FC_TX)); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 315 | |
Ben Hutchings | 18ea024 | 2009-10-23 08:33:17 +0000 | [diff] [blame] | 316 | if (!(efx->wanted_fc & EFX_FC_AUTO)) |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 317 | return efx->wanted_fc; |
Ben Hutchings | 18ea024 | 2009-10-23 08:33:17 +0000 | [diff] [blame] | 318 | |
| 319 | WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN)); |
| 320 | |
| 321 | return mii_resolve_flowctrl_fdx( |
| 322 | mii_advertise_flowctrl(efx->wanted_fc), |
| 323 | efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA)); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 324 | } |